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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id c3-v6sm4966632pfn.62.2018.05.16.08.52.59 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 16 May 2018 08:52:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=AwjiM5r4GwDBOEYqDQfDwjPqxnxEcPVFlhKq+cNRwBA=; b=I1le5JaD0d7zxjiJ9JY3ZO6o/yyn1cYCUPNIL0aP4zD0fXVuYchru73hKxIk0a7OtB 66n9HZBtJnFtNwoX0d8cLdqGM6nO8RfnEktoSruesIaaiGkAiSh0eNoEZmZIAwijXmOh XbJcJpiFcwPDMio2wZahMlu+yz+9O+CKLhRi4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=AwjiM5r4GwDBOEYqDQfDwjPqxnxEcPVFlhKq+cNRwBA=; b=TDPnqceE8uUhEA7GJs1onwH7YPRe9OM7Sl5hvUZEqsYWXvdItPvfQeqJHcnlr6cbuT j0uN2QjHV6Aoq0tsFTQBhygVdE88TYdlD9kID0Geer69j6yubhQYVBF7ssD6ZUcYGiof iBYFKDTcFAygn/L/+FnJqBgEfSar+mZ3+KOT/GRsuTSYOfaVf0pfgGG84C56dSUn0+Hq Hvozbx7mcs+MwoAT5WlBc1ifckQ7iyzebzluruOn4w2Z6YqU4MC+dhXs5amaw0Dq0DWq +XGcqv7eme+mtJAezXfe5G04GLOExXToQVWnPkUZpMQvduBLRmb69Necg35MQBbtUgkG EQ/Q== X-Gm-Message-State: ALKqPweVNLJNmfNkF/5tZ+N/pL7/es53JI/k0LI7ZH4KgH7ZSFTuhzN4 eQUmSEPrahYga1o5OJ9Mc+tQ/eMG6Sw= X-Google-Smtp-Source: AB8JxZr/yRxkYSy3NBevWvRQnH5/Z36i1Kkhe1ui8lbwMFS5RykMOPXwwgBBdkIyEie3Vb5E5SN53w== X-Received: by 2002:a17:902:d681:: with SMTP id v1-v6mr1467232ply.16.1526485980638; Wed, 16 May 2018 08:53:00 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 16 May 2018 08:52:25 -0700 Message-Id: <20180516155243.16937-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180516155243.16937-1-richard.henderson@linaro.org> References: <20180516155243.16937-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::236 Subject: [Qemu-devel] [PULL 10/28] target/arm: squash FZ16 behaviour for conversions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 From: Alex Benn=C3=A9e The ARM ARM specifies FZ16 is suppressed for conversions. Rather than pushing this logic into the softfloat code we can simply save the FZ state and temporarily disable it for the softfloat call. Reviewed-by: Peter Maydell Signed-off-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- target/arm/helper.c | 40 ++++++++++++++++++++++++++++++++++++---- 1 file changed, 36 insertions(+), 4 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 1762042fc7..238a3ceba8 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11542,22 +11542,54 @@ uint32_t HELPER(set_neon_rmode)(uint32_t rmode, C= PUARMState *env) /* Half precision conversions. */ float32 HELPER(vfp_fcvt_f16_to_f32)(float16 a, void *fpstp, uint32_t ahp_m= ode) { - return float16_to_float32(a, !ahp_mode, fpstp); + /* Squash FZ16 to 0 for the duration of conversion. In this case, + * it would affect flushing input denormals. + */ + float_status *fpst =3D fpstp; + flag save =3D get_flush_inputs_to_zero(fpst); + set_flush_inputs_to_zero(false, fpst); + float32 r =3D float16_to_float32(a, !ahp_mode, fpst); + set_flush_inputs_to_zero(save, fpst); + return r; } =20 float16 HELPER(vfp_fcvt_f32_to_f16)(float32 a, void *fpstp, uint32_t ahp_m= ode) { - return float32_to_float16(a, !ahp_mode, fpstp); + /* Squash FZ16 to 0 for the duration of conversion. In this case, + * it would affect flushing output denormals. + */ + float_status *fpst =3D fpstp; + flag save =3D get_flush_to_zero(fpst); + set_flush_to_zero(false, fpst); + float16 r =3D float32_to_float16(a, !ahp_mode, fpst); + set_flush_to_zero(save, fpst); + return r; } =20 float64 HELPER(vfp_fcvt_f16_to_f64)(float16 a, void *fpstp, uint32_t ahp_m= ode) { - return float16_to_float64(a, !ahp_mode, fpstp); + /* Squash FZ16 to 0 for the duration of conversion. In this case, + * it would affect flushing input denormals. + */ + float_status *fpst =3D fpstp; + flag save =3D get_flush_inputs_to_zero(fpst); + set_flush_inputs_to_zero(false, fpst); + float64 r =3D float16_to_float64(a, !ahp_mode, fpst); + set_flush_inputs_to_zero(save, fpst); + return r; } =20 float16 HELPER(vfp_fcvt_f64_to_f16)(float64 a, void *fpstp, uint32_t ahp_m= ode) { - return float64_to_float16(a, !ahp_mode, fpstp); + /* Squash FZ16 to 0 for the duration of conversion. In this case, + * it would affect flushing output denormals. + */ + float_status *fpst =3D fpstp; + flag save =3D get_flush_to_zero(fpst); + set_flush_to_zero(false, fpst); + float16 r =3D float64_to_float16(a, !ahp_mode, fpst); + set_flush_to_zero(save, fpst); + return r; } =20 #define float32_two make_float32(0x40000000) --=20 2.17.0