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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id g11-v6sm941419pgq.62.2018.05.15.15.26.22 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 15 May 2018 15:26:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vX12ZtlpQa6Nv7/rq1wfPxTqdC3HQkrlkn2HkZRVyV4=; b=IYK+B3BY4uF2ehyfhzGCfgJtgOysuc5Vfvtm/7lmqhAgx2TnGa+sqYebvU7OXILqGW 0v52Qrq8OpUMDJ3q2zhnHbAiBghgTyePh/WXs7W4KJxSSDXaoxxFmzxvjwgXjq76gaf4 5xTehqn5UbreL6+EIYFEoZYXNN/pzMsNMLX6Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vX12ZtlpQa6Nv7/rq1wfPxTqdC3HQkrlkn2HkZRVyV4=; b=QTDMohCZ43ZUBG+NHtUPjxrti3bvMP6qLVBxwhZwIZwgi6QgMHEi0DSobXnejzN87r o42yPEFf0mKVaT9MPqeW6z4ACPABhVVPbO/N8y6sNiG5fiMtGw5sZiC7nKQaJv3tOjds G4D4xbplo05GadlMDmVriDnC8TgRoNzQ8qgbTnTwLxGwFSksY4Y+21rqrH8kfTLqUV1C qHZR2oGIWHsERpf/92G1MqHcOXCz9rOB+2UcSMbZ+PvI1xFzfLQHgEzjP1Iu/0CpG4vd EfN/sI5o/kq8uGseQ5alcNTUQUx2DmafzI4je8dbeHc5s/J+EUc52aZwypuYCyTsDGsZ zE+A== X-Gm-Message-State: ALKqPwf8enf6i0SmLLs8XaXfFwoIyFcv9/kOVwpiPYh10Yi2DTdFeL/s xbkDI87GH9lsIdjKYGoFtgLd7g0XBZ4= X-Google-Smtp-Source: AB8JxZrHDd2UcV8MzE69Dwfy3D6Yg6pMANbrn0ucUNabMmC0fHuQqU6qjfq7ow1gOI3xN1Yvs+cGeg== X-Received: by 2002:a17:902:c6b:: with SMTP id 98-v6mr6136415pls.270.1526423183331; Tue, 15 May 2018 15:26:23 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 15 May 2018 15:25:40 -0700 Message-Id: <20180515222540.9988-29-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180515222540.9988-1-richard.henderson@linaro.org> References: <20180515222540.9988-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::243 Subject: [Qemu-devel] [PATCH v6 28/28] fpu/softfloat: Define floatN_silence_nan in terms of parts_silence_nan X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Isolate the target-specific choice to 3 functions instead of 6. The code in floatx80_default_nan tried to be over-general. There are only two targets that support this format: x86 and m68k. Thus there is no point in inventing a mechanism for snan_bit_is_one. Move routines that no longer have ifdefs out of softfloat-specialize.h. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- fpu/softfloat-specialize.h | 81 ++------------------------------------ fpu/softfloat.c | 31 +++++++++++++++ 2 files changed, 35 insertions(+), 77 deletions(-) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index ec4fb6ba8b..16c0bcb6fa 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -278,24 +278,6 @@ int float16_is_signaling_nan(float16 a_, float_status = *status) #endif } =20 -/*------------------------------------------------------------------------= ---- -| Returns a quiet NaN from a signalling NaN for the half-precision -| floating point value `a'. -*-------------------------------------------------------------------------= ---*/ - -float16 float16_silence_nan(float16 a, float_status *status) -{ -#ifdef NO_SIGNALING_NANS - g_assert_not_reached(); -#else - if (snan_bit_is_one(status)) { - return float16_default_nan(status); - } else { - return a | (1 << 9); - } -#endif -} - /*------------------------------------------------------------------------= ---- | Returns 1 if the single-precision floating-point value `a' is a quiet | NaN; otherwise returns 0. @@ -334,30 +316,6 @@ int float32_is_signaling_nan(float32 a_, float_status = *status) #endif } =20 -/*------------------------------------------------------------------------= ---- -| Returns a quiet NaN from a signalling NaN for the single-precision -| floating point value `a'. -*-------------------------------------------------------------------------= ---*/ - -float32 float32_silence_nan(float32 a, float_status *status) -{ -#ifdef NO_SIGNALING_NANS - g_assert_not_reached(); -#else - if (snan_bit_is_one(status)) { -# ifdef TARGET_HPPA - a &=3D ~0x00400000; - a |=3D 0x00200000; - return a; -# else - return float32_default_nan(status); -# endif - } else { - return a | (1 << 22); - } -#endif -} - /*------------------------------------------------------------------------= ---- | Returns the result of converting the single-precision floating-point NaN | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid @@ -706,31 +664,6 @@ int float64_is_signaling_nan(float64 a_, float_status = *status) #endif } =20 -/*------------------------------------------------------------------------= ---- -| Returns a quiet NaN from a signalling NaN for the double-precision -| floating point value `a'. -*-------------------------------------------------------------------------= ---*/ - -float64 float64_silence_nan(float64 a, float_status *status) -{ -#ifdef NO_SIGNALING_NANS - g_assert_not_reached(); -#else - if (snan_bit_is_one(status)) { -# ifdef TARGET_HPPA - a &=3D ~0x0008000000000000ULL; - a |=3D 0x0004000000000000ULL; - return a; -# else - return float64_default_nan(status); -# endif - } else { - return a | LIT64(0x0008000000000000); - } -#endif -} - - /*------------------------------------------------------------------------= ---- | Returns the result of converting the double-precision floating-point NaN | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid @@ -886,16 +819,10 @@ int floatx80_is_signaling_nan(floatx80 a, float_statu= s *status) =20 floatx80 floatx80_silence_nan(floatx80 a, float_status *status) { -#ifdef NO_SIGNALING_NANS - g_assert_not_reached(); -#else - if (snan_bit_is_one(status)) { - return floatx80_default_nan(status); - } else { - a.low |=3D LIT64(0xC000000000000000); - return a; - } -#endif + /* None of the targets that have snan_bit_is_one use floatx80. */ + assert(!snan_bit_is_one(status)); + a.low |=3D LIT64(0xC000000000000000); + return a; } =20 /*------------------------------------------------------------------------= ---- diff --git a/fpu/softfloat.c b/fpu/softfloat.c index c8b33e35f4..8cd2400081 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -2134,6 +2134,37 @@ float128 float128_default_nan(float_status *status) return r; } =20 +/*------------------------------------------------------------------------= ---- +| Returns a quiet NaN from a signalling NaN for the floating point value `= a'. +*-------------------------------------------------------------------------= ---*/ + +float16 float16_silence_nan(float16 a, float_status *status) +{ + FloatParts p =3D float16_unpack_raw(a); + p.frac <<=3D float16_params.frac_shift; + p =3D parts_silence_nan(p, status); + p.frac >>=3D float16_params.frac_shift; + return float16_pack_raw(p); +} + +float32 float32_silence_nan(float32 a, float_status *status) +{ + FloatParts p =3D float32_unpack_raw(a); + p.frac <<=3D float32_params.frac_shift; + p =3D parts_silence_nan(p, status); + p.frac >>=3D float32_params.frac_shift; + return float32_pack_raw(p); +} + +float64 float64_silence_nan(float64 a, float_status *status) +{ + FloatParts p =3D float64_unpack_raw(a); + p.frac <<=3D float64_params.frac_shift; + p =3D parts_silence_nan(p, status); + p.frac >>=3D float64_params.frac_shift; + return float64_pack_raw(p); +} + /*------------------------------------------------------------------------= ---- | Takes a 64-bit fixed-point value `absZ' with binary point between bits 6 | and 7, and returns the properly rounded 32-bit integer corresponding to = the --=20 2.17.0