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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id y2-v6sm14512457pgp.92.2018.05.14.15.12.35 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 14 May 2018 15:12:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3Gt6m5cGwrRSwWZ854aVfOdGATsWs+vxTefTZvehpJc=; b=IC0Mhdyz1pIkQRdu7TQVS1K+eebs3RGicGGpfrpPYyI6FXcyb4axp4NMAsePVmoNHW V58zd0YDr5AVZtJ2rkkTq2pe7Ue1+VoolphTSXI9d43jlirWe5vJEN67bxh+NLfhsF/v xV9uT0f3bt5SpI2/MKMkGOWnffqM+blHxijaU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3Gt6m5cGwrRSwWZ854aVfOdGATsWs+vxTefTZvehpJc=; b=nPJugY69LM9ZAbQNYQ6HB6eM7PdwpyDkhzNo1NKjIfMV+LqKKysNvJ7JpkRliTyG60 LBvMXb3kpinNPlrzLLNdOLq7ze1cbqxgoGu37PYUTGP73vCML5txxKxy7TkhtLYv8kuT WSvwvrJB+CAEI5gyoXmX6uDdFjYAgo/cAJW1Fx4wyhur/RSQpae0YfPD01WjLv9ZJD4A +uHHYmTthc2Qk3wYaNO53yU/aAy0salD+x493/9rRHmbiSs/IHxaaS83vX/5arceuVOg yYrCSgAyf1EbinRZzxFOOSW4Lshp6OSUs4q0eD9936l6pj7Lst4jVN2vFBy879+Cq0e5 cSzA== X-Gm-Message-State: ALKqPweVSH5WgFiwFdxhmL6bLetoMMrk7c2Htgx4WgqOs8YF0OZ8f/Yf 0nLHUnWNgMvqiRWcgZxA/gJ08hOuEPg= X-Google-Smtp-Source: AB8JxZpBAfgA9WWq4j2Z6Wf2GuWyNqtHzI8ZYs3/aMZ8ey4uIqqIIbYLqmTDYCtYO7Bi3Jr1wSjb4g== X-Received: by 2002:a63:8849:: with SMTP id l70-v6mr10026762pgd.49.1526335956835; Mon, 14 May 2018 15:12:36 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 14 May 2018 15:12:02 -0700 Message-Id: <20180514221219.7091-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180514221219.7091-1-richard.henderson@linaro.org> References: <20180514221219.7091-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [PATCH v5 11/28] target/arm: squash FZ16 behaviour for conversions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 From: Alex Benn=C3=A9e The ARM ARM specifies FZ16 is suppressed for conversions. Rather than pushing this logic into the softfloat code we can simply save the FZ state and temporarily disable it for the softfloat call. Reviewed-by: Peter Maydell Signed-off-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- v4 - float16_to_floatX squished the wrong softfloat bit for FZ16; need to adjust input denormals in this case. --- target/arm/helper.c | 40 ++++++++++++++++++++++++++++++++++++---- 1 file changed, 36 insertions(+), 4 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index a1c1dc5bbe..e05c7230d4 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11542,22 +11542,54 @@ uint32_t HELPER(set_neon_rmode)(uint32_t rmode, C= PUARMState *env) /* Half precision conversions. */ float32 HELPER(vfp_fcvt_f16_to_f32)(float16 a, void *fpstp, uint32_t ahp_m= ode) { - return float16_to_float32(a, !ahp_mode, fpstp); + /* Squash FZ16 to 0 for the duration of conversion. In this case, + * it would affect flushing input denormals. + */ + float_status *fpst =3D fpstp; + flag save =3D get_flush_inputs_to_zero(fpst); + set_flush_inputs_to_zero(false, fpst); + float32 r =3D float16_to_float32(a, !ahp_mode, fpst); + set_flush_inputs_to_zero(save, fpst); + return r; } =20 float16 HELPER(vfp_fcvt_f32_to_f16)(float32 a, void *fpstp, uint32_t ahp_m= ode) { - return float32_to_float16(a, !ahp_mode, fpstp); + /* Squash FZ16 to 0 for the duration of conversion. In this case, + * it would affect flushing output denormals. + */ + float_status *fpst =3D fpstp; + flag save =3D get_flush_to_zero(fpst); + set_flush_to_zero(false, fpst); + float16 r =3D float32_to_float16(a, !ahp_mode, fpst); + set_flush_to_zero(save, fpst); + return r; } =20 float64 HELPER(vfp_fcvt_f16_to_f64)(float16 a, void *fpstp, uint32_t ahp_m= ode) { - return float16_to_float64(a, !ahp_mode, fpstp); + /* Squash FZ16 to 0 for the duration of conversion. In this case, + * it would affect flushing input denormals. + */ + float_status *fpst =3D fpstp; + flag save =3D get_flush_inputs_to_zero(fpst); + set_flush_inputs_to_zero(false, fpst); + float64 r =3D float16_to_float64(a, !ahp_mode, fpst); + set_flush_inputs_to_zero(save, fpst); + return r; } =20 float16 HELPER(vfp_fcvt_f64_to_f16)(float64 a, void *fpstp, uint32_t ahp_m= ode) { - return float64_to_float16(a, !ahp_mode, fpstp); + /* Squash FZ16 to 0 for the duration of conversion. In this case, + * it would affect flushing output denormals. + */ + float_status *fpst =3D fpstp; + flag save =3D get_flush_to_zero(fpst); + set_flush_to_zero(false, fpst); + float16 r =3D float64_to_float16(a, !ahp_mode, fpst); + set_flush_to_zero(save, fpst); + return r; } =20 #define float32_two make_float32(0x40000000) --=20 2.17.0