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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id r76-v6sm4509462pfl.1.2018.05.10.21.23.38 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 21:23:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1lY73R3Cbw8tBI+8Ovo7cwbtTAlyxzG/opbV7x2Z9IQ=; b=DNuT+Sg8e08A0mMTr7sAoDW4XbazuzLsnGpZonTAV7LdzrK/6YbrcP4ZeUaqkhxTNd FDerul/vt8oEb/O/B35iLs2F1FnKMqqxLLRx+IYIqecpa3kqCEZHcyqM5+9NEpTGDAgZ /GJRJzIGnK84uTKKRlyOXiygmwNXK2nUc/TKg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1lY73R3Cbw8tBI+8Ovo7cwbtTAlyxzG/opbV7x2Z9IQ=; b=DppqnXsiuTiO2M5Jh8Am6dXNKSzXjIPqh7eOMUBX7gVIICyqaERNqS0kGXcIzerYkl iIjoVbBNx8+932C0XoAT6S0HyBI+505U0hy77yrShBeGzJpazC3eTGQq6vrnx//I1yFT mvPzbYKwojqkT+EbyM3vUL3WfnMkIVpznCJBhZTYbhtzWw/aILJn6zPd2wax9nnGVcL2 W/09ABWqmTxT3cXSobApSRrBY7VFRj/wMDlKiA3x5vEZ05JlBlHiJpFekc9GmO5IjZh/ 3Bl0KhQv4G+7SoP9VQq9We3n4MoJKnP8qgw+f9qq6ufLn7/k19HhRpFWmoIDx/wxKi68 ljMA== X-Gm-Message-State: ALKqPwfP8NjZ2YHHv7D2ipWaDVqkUJ29nTOUnI0X7iBQskCoPfMj2zkS Eg7hJVmUTEWfiLxYKIF6RWC5J9ywkMo= X-Google-Smtp-Source: AB8JxZoQpngvrVTFNHyhLHphcjZ6woalAs6yarAuXKS1za0xuV7FaSnsbpodb6ld7CRHZpvfsLAVmA== X-Received: by 2002:a17:902:4081:: with SMTP id c1-v6mr41963pld.60.1526012619987; Thu, 10 May 2018 21:23:39 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 21:23:20 -0700 Message-Id: <20180511042324.5070-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511042324.5070-1-richard.henderson@linaro.org> References: <20180511042324.5070-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::242 Subject: [Qemu-devel] [PULL 09/13] target/openrisc: Convert dec_M X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Stafford Horne Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Acked-by: Stafford Horne Signed-off-by: Richard Henderson --- target/openrisc/translate.c | 41 ++++++++++++------------------------ target/openrisc/insns.decode | 3 +++ 2 files changed, 16 insertions(+), 28 deletions(-) diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c index f2f9a0c0d2..548e0230b3 100644 --- a/target/openrisc/translate.c +++ b/target/openrisc/translate.c @@ -1031,32 +1031,21 @@ static bool trans_l_rori(DisasContext *dc, arg_dal = *a, uint32_t insn) return true; } =20 -static void dec_M(DisasContext *dc, uint32_t insn) +static bool trans_l_movhi(DisasContext *dc, arg_l_movhi *a, uint32_t insn) { - uint32_t op0; - uint32_t rd; - uint32_t K16; - op0 =3D extract32(insn, 16, 1); - rd =3D extract32(insn, 21, 5); - K16 =3D extract32(insn, 0, 16); + LOG_DIS("l.movhi r%d, %d\n", a->d, a->k); + check_r0_write(a->d); + tcg_gen_movi_tl(cpu_R[a->d], a->k << 16); + return true; +} =20 - check_r0_write(rd); - switch (op0) { - case 0x0: /* l.movhi */ - LOG_DIS("l.movhi r%d, %d\n", rd, K16); - tcg_gen_movi_tl(cpu_R[rd], (K16 << 16)); - break; - - case 0x1: /* l.macrc */ - LOG_DIS("l.macrc r%d\n", rd); - tcg_gen_trunc_i64_tl(cpu_R[rd], cpu_mac); - tcg_gen_movi_i64(cpu_mac, 0); - break; - - default: - gen_illegal_exception(dc); - break; - } +static bool trans_l_macrc(DisasContext *dc, arg_l_macrc *a, uint32_t insn) +{ + LOG_DIS("l.macrc r%d\n", a->d); + check_r0_write(a->d); + tcg_gen_trunc_i64_tl(cpu_R[a->d], cpu_mac); + tcg_gen_movi_i64(cpu_mac, 0); + return true; } =20 static void dec_comp(DisasContext *dc, uint32_t insn) @@ -1481,10 +1470,6 @@ static void disas_openrisc_insn(DisasContext *dc, Op= enRISCCPU *cpu) =20 op0 =3D extract32(insn, 26, 6); switch (op0) { - case 0x06: - dec_M(dc, insn); - break; - case 0x2f: dec_compi(dc, insn); break; diff --git a/target/openrisc/insns.decode b/target/openrisc/insns.decode index fb8ba5812a..84f71c13b3 100644 --- a/target/openrisc/insns.decode +++ b/target/openrisc/insns.decode @@ -95,6 +95,9 @@ l_mtspr 110000 ..... a:5 b:5 ........... k= =3D%mtspr_k =20 l_maci 010011 ----- a:5 i:s16 =20 +l_movhi 000110 d:5 ----0 k:16 +l_macrc 000110 d:5 ----1 00000000 00000000 + #### # Arithmetic Instructions #### --=20 2.17.0