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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id n18-v6sm5420915pfg.36.2018.05.10.19.45.07 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 19:45:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kc8rnh6pj5UXC0xkc35hjY/+cgtx+pbc5lCUKIGhNBQ=; b=QMn5zzmxYSfSX+ysPM/jdxrbyPX8w4PtPdd9sx8nPpiWgDsp5xdj4zmyRaMgxhBSft MwVkk0uHc5esfeNZQONg1gm0kVdxbg0VUIm24H8WmvJZbmj7m7uyklpEJBg654xT3Qxc 4GQ+ht3vQtHHYf9INRoAk2ApjMz8yN+AGl8OE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kc8rnh6pj5UXC0xkc35hjY/+cgtx+pbc5lCUKIGhNBQ=; b=a47UvaEqacWx2jh1Gg2JMOsUUket4RNWnNnINYDQQ44lHDUjPVP8Q272vsK1VCCtMz DgvqFnq/ArZDSYz3vONjMiNNuKLEo1iaz2TkUGVHjK0aIzo/IAfl6MofbF42Z33nHONK WHpw0AtdKOWf78ZWJASe3PDIaLgnUO9PoltlLLza3OweWsUE64xLYsi0nX/61GOKSmB7 9ggR9wleu9wqaYeCvlygG0R1yxFbEEwCaFGw1m1J96j3TeVi7UITogbl0JMBrWNbZttc Id9//TuFU6Vnos51jq+IElXYQIVA2+Hl3tzKpHv//ZaCCYfCxi+9uHJC6qJ8FgdXCPSx zJUw== X-Gm-Message-State: ALKqPwf2t+kz7kp7KkXm6QPbEnDW56s8aK1g0p89S75MYy7DE8UbmG0P yRsFhEr7b4EgSj82MT/4MUlmFnbYbUE= X-Google-Smtp-Source: AB8JxZr6xMilK//weYRh6KhS6173i4M6b/yy2migJ7+GyQSWfKtAxWIisfNypatFunOB2qPYc19aow== X-Received: by 2002:a17:902:2468:: with SMTP id m37-v6mr3779815plg.388.1526006708768; Thu, 10 May 2018 19:45:08 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 19:44:44 -0700 Message-Id: <20180511024454.31679-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511024454.31679-1-richard.henderson@linaro.org> References: <20180511024454.31679-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::244 Subject: [Qemu-devel] [PATCH v3 01/11] target/arm: Implement FMOV (general) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Adding the fp16 moves to/from general registers. Cc: qemu-stable@nongnu.org Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index b0471c842e..10d3856351 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5700,6 +5700,15 @@ static void handle_fmov(DisasContext *s, int rd, int= rn, int type, bool itof) tcg_gen_st_i64(tcg_rn, cpu_env, fp_reg_hi_offset(s, rd)); clear_vec_high(s, true, rd); break; + case 3: + /* 16 bit */ + tmp =3D tcg_temp_new_i64(); + tcg_gen_ext16u_i64(tmp, tcg_rn); + write_fp_dreg(s, rd, tmp); + tcg_temp_free_i64(tmp); + break; + default: + g_assert_not_reached(); } } else { TCGv_i64 tcg_rd =3D cpu_reg(s, rd); @@ -5717,6 +5726,12 @@ static void handle_fmov(DisasContext *s, int rd, int= rn, int type, bool itof) /* 64 bits from top half */ tcg_gen_ld_i64(tcg_rd, cpu_env, fp_reg_hi_offset(s, rn)); break; + case 3: + /* 16 bit */ + tcg_gen_ld16u_i64(tcg_rd, cpu_env, fp_reg_offset(s, rn, MO_16)= ); + break; + default: + g_assert_not_reached(); } } } @@ -5756,6 +5771,12 @@ static void disas_fp_int_conv(DisasContext *s, uint3= 2_t insn) case 0xa: /* 64 bit */ case 0xd: /* 64 bit to top half of quad */ break; + case 0x6: /* 16-bit float, 32-bit int */ + case 0xe: /* 16-bit float, 64-bit int */ + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ default: /* all other sf/type/rmode combinations are invalid */ unallocated_encoding(s); --=20 2.17.0