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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id n18-v6sm5420915pfg.36.2018.05.10.19.45.07 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 19:45:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kc8rnh6pj5UXC0xkc35hjY/+cgtx+pbc5lCUKIGhNBQ=; b=QMn5zzmxYSfSX+ysPM/jdxrbyPX8w4PtPdd9sx8nPpiWgDsp5xdj4zmyRaMgxhBSft MwVkk0uHc5esfeNZQONg1gm0kVdxbg0VUIm24H8WmvJZbmj7m7uyklpEJBg654xT3Qxc 4GQ+ht3vQtHHYf9INRoAk2ApjMz8yN+AGl8OE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kc8rnh6pj5UXC0xkc35hjY/+cgtx+pbc5lCUKIGhNBQ=; b=a47UvaEqacWx2jh1Gg2JMOsUUket4RNWnNnINYDQQ44lHDUjPVP8Q272vsK1VCCtMz DgvqFnq/ArZDSYz3vONjMiNNuKLEo1iaz2TkUGVHjK0aIzo/IAfl6MofbF42Z33nHONK WHpw0AtdKOWf78ZWJASe3PDIaLgnUO9PoltlLLza3OweWsUE64xLYsi0nX/61GOKSmB7 9ggR9wleu9wqaYeCvlygG0R1yxFbEEwCaFGw1m1J96j3TeVi7UITogbl0JMBrWNbZttc Id9//TuFU6Vnos51jq+IElXYQIVA2+Hl3tzKpHv//ZaCCYfCxi+9uHJC6qJ8FgdXCPSx zJUw== X-Gm-Message-State: ALKqPwf2t+kz7kp7KkXm6QPbEnDW56s8aK1g0p89S75MYy7DE8UbmG0P yRsFhEr7b4EgSj82MT/4MUlmFnbYbUE= X-Google-Smtp-Source: AB8JxZr6xMilK//weYRh6KhS6173i4M6b/yy2migJ7+GyQSWfKtAxWIisfNypatFunOB2qPYc19aow== X-Received: by 2002:a17:902:2468:: with SMTP id m37-v6mr3779815plg.388.1526006708768; Thu, 10 May 2018 19:45:08 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 19:44:44 -0700 Message-Id: <20180511024454.31679-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511024454.31679-1-richard.henderson@linaro.org> References: <20180511024454.31679-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::244 Subject: [Qemu-devel] [PATCH v3 01/11] target/arm: Implement FMOV (general) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Adding the fp16 moves to/from general registers. Cc: qemu-stable@nongnu.org Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index b0471c842e..10d3856351 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5700,6 +5700,15 @@ static void handle_fmov(DisasContext *s, int rd, int= rn, int type, bool itof) tcg_gen_st_i64(tcg_rn, cpu_env, fp_reg_hi_offset(s, rd)); clear_vec_high(s, true, rd); break; + case 3: + /* 16 bit */ + tmp =3D tcg_temp_new_i64(); + tcg_gen_ext16u_i64(tmp, tcg_rn); + write_fp_dreg(s, rd, tmp); + tcg_temp_free_i64(tmp); + break; + default: + g_assert_not_reached(); } } else { TCGv_i64 tcg_rd =3D cpu_reg(s, rd); @@ -5717,6 +5726,12 @@ static void handle_fmov(DisasContext *s, int rd, int= rn, int type, bool itof) /* 64 bits from top half */ tcg_gen_ld_i64(tcg_rd, cpu_env, fp_reg_hi_offset(s, rn)); break; + case 3: + /* 16 bit */ + tcg_gen_ld16u_i64(tcg_rd, cpu_env, fp_reg_offset(s, rn, MO_16)= ); + break; + default: + g_assert_not_reached(); } } } @@ -5756,6 +5771,12 @@ static void disas_fp_int_conv(DisasContext *s, uint3= 2_t insn) case 0xa: /* 64 bit */ case 0xd: /* 64 bit to top half of quad */ break; + case 0x6: /* 16-bit float, 32-bit int */ + case 0xe: /* 16-bit float, 64-bit int */ + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ default: /* all other sf/type/rmode combinations are invalid */ unallocated_encoding(s); --=20 2.17.0 From nobody Wed Oct 29 11:37:29 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526007142694694.8559194911232; Thu, 10 May 2018 19:52:22 -0700 (PDT) Received: from localhost ([::1]:36471 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGyAP-0001Fe-Te for importer@patchew.org; Thu, 10 May 2018 22:52:21 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43777) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGy3X-00021k-Cz for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGy3T-0005xs-HV for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:15 -0400 Received: from mail-pl0-x244.google.com ([2607:f8b0:400e:c01::244]:43289) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGy3T-0005xj-C5 for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:11 -0400 Received: by mail-pl0-x244.google.com with SMTP id a39-v6so2408479pla.10 for ; Thu, 10 May 2018 19:45:11 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id n18-v6sm5420915pfg.36.2018.05.10.19.45.08 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 19:45:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=I3PSoTtMStTJ7R72mjpDN+LuXGvjQpqcgD+JZkivJBk=; b=MwzUKz5+TtAILdynEdyYCM6REhnHoZRDRLu8UvVQ9U+9HJyCMtdHtWpBTbkrIhn2XN 4+wWb2MPo0pmEKodRhpz7e00ghU4+7i+4iJ1+RsIRQO0PPHsTKNMJI1sXZlyZtEOBd3i DbE500GqAuioWEU0SNZm/0rXAzNgaLzx6Sjr4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=I3PSoTtMStTJ7R72mjpDN+LuXGvjQpqcgD+JZkivJBk=; b=H+x7P5ejzDgpyyTgeRVAQql3FwZruXABuFJGOJZfsdKwUouIE0O94qNmZCqoNqmnSy Ko8X355M7vRps6NUkBELsd4yn5Vss6jCCefpAFELQ5gGAIGNc/iKQFgpT9cAKsu9ErAp 0otmGCp8QOvrnBdSEoLLaLsiiovHfkKhxB3bd/3ohEsuroZbdlf9s4HVUtxHSyWJCdJI TfM3jvsdPnrdVlBmShnrItEuTr7bLw09cDF+LLt9FRzhBzN0Js5JDxYW0ste8mRejxdD qLKj5b6iHQHtJ6sulIw7xwtDstoRUBIPth45FcMgptHYfRY5IDfRx3XiAa6GSNw2UH6D ka4Q== X-Gm-Message-State: ALKqPwcUafG5mMRkO1M0w5Wgq4LLWXq2haCCc4pCWkzvdZtyHd3juVmH gSehMNWaORfQlHT1iv/DfcTA0WF163s= X-Google-Smtp-Source: AB8JxZryECxRsfDL9nIgQk0m69RA8RCzkdQTHV+upBMlOeNUDBie+rz48gTOFJA2SaGFFXqyPQUvhg== X-Received: by 2002:a17:902:6bca:: with SMTP id m10-v6mr3680127plt.6.1526006710110; Thu, 10 May 2018 19:45:10 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 19:44:45 -0700 Message-Id: <20180511024454.31679-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511024454.31679-1-richard.henderson@linaro.org> References: <20180511024454.31679-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::244 Subject: [Qemu-devel] [PATCH v3 02/11] target/arm: Early exit after unallocated_encoding in disas_fp_int_conv X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" No sense in emitting code after the exception. Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 10d3856351..edb4dc243f 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5780,7 +5780,7 @@ static void disas_fp_int_conv(DisasContext *s, uint32= _t insn) default: /* all other sf/type/rmode combinations are invalid */ unallocated_encoding(s); - break; + return; } =20 if (!fp_access_check(s)) { --=20 2.17.0 From nobody Wed Oct 29 11:37:29 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526007011748268.8117197833991; Thu, 10 May 2018 19:50:11 -0700 (PDT) Received: from localhost ([::1]:36451 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGy8I-0006yr-Vh for importer@patchew.org; Thu, 10 May 2018 22:50:11 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43753) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGy3W-0001xu-8H for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGy3U-0005yb-TC for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:14 -0400 Received: from mail-pl0-x244.google.com ([2607:f8b0:400e:c01::244]:32846) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGy3U-0005y2-L5 for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:12 -0400 Received: by mail-pl0-x244.google.com with SMTP id n10-v6so2421913plp.0 for ; Thu, 10 May 2018 19:45:12 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id n18-v6sm5420915pfg.36.2018.05.10.19.45.10 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 19:45:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QT8ASjtS0LVDIt3nPzO8APmyPfiEdpd8UtM1B4qiCmY=; b=WCHHqfiQz3xxk2fKas8E1eUPLLBud7FUa7sFwbW1VqhlVoNI0UlRNRrVqqrmIS0Eou ugNtbi5boA2TXoiNFFy1KAASv74/ReT5NG6WOmcIlWpk8sqzgi+HPXf53HZMa/KEhz+/ cFSU+u184gHU357omA2/rx2ihVAMoH40qM7h8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QT8ASjtS0LVDIt3nPzO8APmyPfiEdpd8UtM1B4qiCmY=; b=aqtq7FZLcMdWdF1kf+MPKwpPVEPTeqhN4WjtCNJF14ZTvbRwT2cclxmVb8rFor6x0A PyNb0JgEPqm/ExZI8TMAnEVK0OiaHKeIjIZs6V9FI+TYA1GRiRakME7cBzZGCsFLSYN0 KSG0o+wBjxC7J4RQBgaK3Ws0Zbbnv9UCukklYrH+tZwv6Kgmxzlmo6VOZAkb93h8xt81 b8WvAj8T2UAqqQ+xXI1OithE9C+WvubJUlodcKI/F3ES4k/0DQQVYDCjU1MDjuSIm7pZ 71/GeeFYXHGWcVwf946zmnsr/gmY6FZMdeVEAx22SXOGYGHsJwfyNzixJamJi2QiiHM/ PLpg== X-Gm-Message-State: ALKqPwcDvPiPbW6nr4kAaBn+Op3GGmZZIwjJnNhHuofGVyy0vsbGn0K+ Rs6Smx2UKOjpdIWEFhZ+ILYDyCgNKvk= X-Google-Smtp-Source: AB8JxZrknCIxh/9pxulEoEkUiu7d8eFSnoHF2Dd+VhuLej313nUVT/7g817uADDx8tOWNrw7qs/u3g== X-Received: by 2002:a17:902:2924:: with SMTP id g33-v6mr3739356plb.26.1526006711320; Thu, 10 May 2018 19:45:11 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 19:44:46 -0700 Message-Id: <20180511024454.31679-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511024454.31679-1-richard.henderson@linaro.org> References: <20180511024454.31679-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::244 Subject: [Qemu-devel] [PATCH v3 03/11] target/arm: Implement FCVT (scalar, integer) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Cc: qemu-stable@nongnu.org Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- target/arm/helper.h | 6 +++ target/arm/helper.c | 38 ++++++++++++++- target/arm/translate-a64.c | 96 +++++++++++++++++++++++++++++++------- 3 files changed, 122 insertions(+), 18 deletions(-) diff --git a/target/arm/helper.h b/target/arm/helper.h index 1969b37f2d..ce89968b2d 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -151,6 +151,10 @@ DEF_HELPER_3(vfp_touhd_round_to_zero, i64, f64, i32, p= tr) DEF_HELPER_3(vfp_tould_round_to_zero, i64, f64, i32, ptr) DEF_HELPER_3(vfp_touhh, i32, f16, i32, ptr) DEF_HELPER_3(vfp_toshh, i32, f16, i32, ptr) +DEF_HELPER_3(vfp_toulh, i32, f16, i32, ptr) +DEF_HELPER_3(vfp_toslh, i32, f16, i32, ptr) +DEF_HELPER_3(vfp_touqh, i64, f16, i32, ptr) +DEF_HELPER_3(vfp_tosqh, i64, f16, i32, ptr) DEF_HELPER_3(vfp_toshs, i32, f32, i32, ptr) DEF_HELPER_3(vfp_tosls, i32, f32, i32, ptr) DEF_HELPER_3(vfp_tosqs, i64, f32, i32, ptr) @@ -177,6 +181,8 @@ DEF_HELPER_3(vfp_ultod, f64, i64, i32, ptr) DEF_HELPER_3(vfp_uqtod, f64, i64, i32, ptr) DEF_HELPER_3(vfp_sltoh, f16, i32, i32, ptr) DEF_HELPER_3(vfp_ultoh, f16, i32, i32, ptr) +DEF_HELPER_3(vfp_sqtoh, f16, i64, i32, ptr) +DEF_HELPER_3(vfp_uqtoh, f16, i64, i32, ptr) =20 DEF_HELPER_FLAGS_2(set_rmode, TCG_CALL_NO_RWG, i32, i32, ptr) DEF_HELPER_FLAGS_2(set_neon_rmode, TCG_CALL_NO_RWG, i32, i32, env) diff --git a/target/arm/helper.c b/target/arm/helper.c index 817f9d81a0..c6fd7f9479 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11427,8 +11427,12 @@ VFP_CONV_FIX_A64(uq, s, 32, 64, uint64) #undef VFP_CONV_FIX_A64 =20 /* Conversion to/from f16 can overflow to infinity before/after scaling. - * Therefore we convert to f64 (which does not round), scale, - * and then convert f64 to f16 (which may round). + * Therefore we convert to f64, scale, and then convert f64 to f16; or + * vice versa for conversion to integer. + * + * For 16- and 32-bit integers, the conversion to f64 never rounds. + * For 64-bit integers, any integer that would cause rounding will also + * overflow to f16 infinity, so there is no double rounding problem. */ =20 static float16 do_postscale_fp16(float64 f, int shift, float_status *fpst) @@ -11446,6 +11450,16 @@ float16 HELPER(vfp_ultoh)(uint32_t x, uint32_t shi= ft, void *fpst) return do_postscale_fp16(uint32_to_float64(x, fpst), shift, fpst); } =20 +float16 HELPER(vfp_sqtoh)(uint64_t x, uint32_t shift, void *fpst) +{ + return do_postscale_fp16(int64_to_float64(x, fpst), shift, fpst); +} + +float16 HELPER(vfp_uqtoh)(uint64_t x, uint32_t shift, void *fpst) +{ + return do_postscale_fp16(uint64_to_float64(x, fpst), shift, fpst); +} + static float64 do_prescale_fp16(float16 f, int shift, float_status *fpst) { if (unlikely(float16_is_any_nan(f))) { @@ -11475,6 +11489,26 @@ uint32_t HELPER(vfp_touhh)(float16 x, uint32_t shi= ft, void *fpst) return float64_to_uint16(do_prescale_fp16(x, shift, fpst), fpst); } =20 +uint32_t HELPER(vfp_toslh)(float16 x, uint32_t shift, void *fpst) +{ + return float64_to_int32(do_prescale_fp16(x, shift, fpst), fpst); +} + +uint32_t HELPER(vfp_toulh)(float16 x, uint32_t shift, void *fpst) +{ + return float64_to_uint32(do_prescale_fp16(x, shift, fpst), fpst); +} + +uint64_t HELPER(vfp_tosqh)(float16 x, uint32_t shift, void *fpst) +{ + return float64_to_int64(do_prescale_fp16(x, shift, fpst), fpst); +} + +uint64_t HELPER(vfp_touqh)(float16 x, uint32_t shift, void *fpst) +{ + return float64_to_uint64(do_prescale_fp16(x, shift, fpst), fpst); +} + /* Set the current fp rounding mode and return the old one. * The argument is a softfloat float_round_ value. */ diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index edb4dc243f..14f35e878a 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5511,11 +5511,11 @@ static void handle_fpfpcvt(DisasContext *s, int rd,= int rn, int opcode, bool itof, int rmode, int scale, int sf, int ty= pe) { bool is_signed =3D !(opcode & 1); - bool is_double =3D type; TCGv_ptr tcg_fpstatus; - TCGv_i32 tcg_shift; + TCGv_i32 tcg_shift, tcg_single; + TCGv_i64 tcg_double; =20 - tcg_fpstatus =3D get_fpstatus_ptr(false); + tcg_fpstatus =3D get_fpstatus_ptr(type =3D=3D 3); =20 tcg_shift =3D tcg_const_i32(64 - scale); =20 @@ -5533,8 +5533,9 @@ static void handle_fpfpcvt(DisasContext *s, int rd, i= nt rn, int opcode, tcg_int =3D tcg_extend; } =20 - if (is_double) { - TCGv_i64 tcg_double =3D tcg_temp_new_i64(); + switch (type) { + case 1: /* float64 */ + tcg_double =3D tcg_temp_new_i64(); if (is_signed) { gen_helper_vfp_sqtod(tcg_double, tcg_int, tcg_shift, tcg_fpstatus); @@ -5544,8 +5545,10 @@ static void handle_fpfpcvt(DisasContext *s, int rd, = int rn, int opcode, } write_fp_dreg(s, rd, tcg_double); tcg_temp_free_i64(tcg_double); - } else { - TCGv_i32 tcg_single =3D tcg_temp_new_i32(); + break; + + case 0: /* float32 */ + tcg_single =3D tcg_temp_new_i32(); if (is_signed) { gen_helper_vfp_sqtos(tcg_single, tcg_int, tcg_shift, tcg_fpstatus); @@ -5555,6 +5558,23 @@ static void handle_fpfpcvt(DisasContext *s, int rd, = int rn, int opcode, } write_fp_sreg(s, rd, tcg_single); tcg_temp_free_i32(tcg_single); + break; + + case 3: /* float16 */ + tcg_single =3D tcg_temp_new_i32(); + if (is_signed) { + gen_helper_vfp_sqtoh(tcg_single, tcg_int, + tcg_shift, tcg_fpstatus); + } else { + gen_helper_vfp_uqtoh(tcg_single, tcg_int, + tcg_shift, tcg_fpstatus); + } + write_fp_sreg(s, rd, tcg_single); + tcg_temp_free_i32(tcg_single); + break; + + default: + g_assert_not_reached(); } } else { TCGv_i64 tcg_int =3D cpu_reg(s, rd); @@ -5571,8 +5591,9 @@ static void handle_fpfpcvt(DisasContext *s, int rd, i= nt rn, int opcode, =20 gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus); =20 - if (is_double) { - TCGv_i64 tcg_double =3D read_fp_dreg(s, rn); + switch (type) { + case 1: /* float64 */ + tcg_double =3D read_fp_dreg(s, rn); if (is_signed) { if (!sf) { gen_helper_vfp_tosld(tcg_int, tcg_double, @@ -5590,9 +5611,14 @@ static void handle_fpfpcvt(DisasContext *s, int rd, = int rn, int opcode, tcg_shift, tcg_fpstatus); } } + if (!sf) { + tcg_gen_ext32u_i64(tcg_int, tcg_int); + } tcg_temp_free_i64(tcg_double); - } else { - TCGv_i32 tcg_single =3D read_fp_sreg(s, rn); + break; + + case 0: /* float32 */ + tcg_single =3D read_fp_sreg(s, rn); if (sf) { if (is_signed) { gen_helper_vfp_tosqs(tcg_int, tcg_single, @@ -5614,14 +5640,39 @@ static void handle_fpfpcvt(DisasContext *s, int rd,= int rn, int opcode, tcg_temp_free_i32(tcg_dest); } tcg_temp_free_i32(tcg_single); + break; + + case 3: /* float16 */ + tcg_single =3D read_fp_sreg(s, rn); + if (sf) { + if (is_signed) { + gen_helper_vfp_tosqh(tcg_int, tcg_single, + tcg_shift, tcg_fpstatus); + } else { + gen_helper_vfp_touqh(tcg_int, tcg_single, + tcg_shift, tcg_fpstatus); + } + } else { + TCGv_i32 tcg_dest =3D tcg_temp_new_i32(); + if (is_signed) { + gen_helper_vfp_toslh(tcg_dest, tcg_single, + tcg_shift, tcg_fpstatus); + } else { + gen_helper_vfp_toulh(tcg_dest, tcg_single, + tcg_shift, tcg_fpstatus); + } + tcg_gen_extu_i32_i64(tcg_int, tcg_dest); + tcg_temp_free_i32(tcg_dest); + } + tcg_temp_free_i32(tcg_single); + break; + + default: + g_assert_not_reached(); } =20 gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus); tcg_temp_free_i32(tcg_rmode); - - if (!sf) { - tcg_gen_ext32u_i64(tcg_int, tcg_int); - } } =20 tcg_temp_free_ptr(tcg_fpstatus); @@ -5791,7 +5842,20 @@ static void disas_fp_int_conv(DisasContext *s, uint3= 2_t insn) /* actual FP conversions */ bool itof =3D extract32(opcode, 1, 1); =20 - if (type > 1 || (rmode !=3D 0 && opcode > 1)) { + if (rmode !=3D 0 && opcode > 1) { + unallocated_encoding(s); + return; + } + switch (type) { + case 0: /* float32 */ + case 1: /* float64 */ + break; + case 3: /* float16 */ + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } --=20 2.17.0 From nobody Wed Oct 29 11:37:29 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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X-Received-From: 2607:f8b0:400e:c01::241 Subject: [Qemu-devel] [PATCH v3 04/11] target/arm: Implement FCVT (scalar, fixed-point) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Cc: qemu-stable@nongnu.org Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 14f35e878a..eb69a548e1 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5491,6 +5491,20 @@ static void disas_fp_imm(DisasContext *s, uint32_t i= nsn) return; } =20 + switch (type) { + case 0: /* float32 */ + case 1: /* float64 */ + break; + case 3: /* float16 */ + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: + unallocated_encoding(s); + return; + } + if (!fp_access_check(s)) { return; } @@ -5697,8 +5711,7 @@ static void disas_fp_fixed_conv(DisasContext *s, uint= 32_t insn) bool sf =3D extract32(insn, 31, 1); bool itof; =20 - if (sbit || (type > 1) - || (!sf && scale < 32)) { + if (sbit || (!sf && scale < 32)) { unallocated_encoding(s); return; } --=20 2.17.0 From nobody Wed Oct 29 11:37:29 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526006901743518.7194236069272; Thu, 10 May 2018 19:48:21 -0700 (PDT) Received: from localhost ([::1]:36442 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGy6W-0004Pw-Ru for importer@patchew.org; Thu, 10 May 2018 22:48:20 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43799) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGy3Y-00025L-Go for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGy3X-00060E-II for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:16 -0400 Received: from mail-pg0-x242.google.com ([2607:f8b0:400e:c05::242]:37017) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGy3X-0005zl-DK for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:15 -0400 Received: by mail-pg0-x242.google.com with SMTP id a13-v6so1797757pgu.4 for ; Thu, 10 May 2018 19:45:15 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. 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X-Received-From: 2607:f8b0:400e:c05::242 Subject: [Qemu-devel] [PATCH v3 05/11] target/arm: Introduce and use read_fp_hreg X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Cc: qemu-stable@nongnu.org Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 30 ++++++++++++++---------------- 1 file changed, 14 insertions(+), 16 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index eb69a548e1..031213bb06 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -615,6 +615,14 @@ static TCGv_i32 read_fp_sreg(DisasContext *s, int reg) return v; } =20 +static TCGv_i32 read_fp_hreg(DisasContext *s, int reg) +{ + TCGv_i32 v =3D tcg_temp_new_i32(); + + tcg_gen_ld16u_i32(v, cpu_env, fp_reg_offset(s, reg, MO_16)); + return v; +} + /* Clear the bits above an N-bit vector, for N =3D (is_q ? 128 : 64). * If SVE is not enabled, then there are only 128 bits in the vector. */ @@ -4881,11 +4889,9 @@ static void disas_fp_csel(DisasContext *s, uint32_t = insn) static void handle_fp_1src_half(DisasContext *s, int opcode, int rd, int r= n) { TCGv_ptr fpst =3D NULL; - TCGv_i32 tcg_op =3D tcg_temp_new_i32(); + TCGv_i32 tcg_op =3D read_fp_hreg(s, rn); TCGv_i32 tcg_res =3D tcg_temp_new_i32(); =20 - read_vec_element_i32(s, tcg_op, rn, 0, MO_16); - switch (opcode) { case 0x0: /* FMOV */ tcg_gen_mov_i32(tcg_res, tcg_op); @@ -7784,13 +7790,10 @@ static void disas_simd_scalar_three_reg_diff(DisasC= ontext *s, uint32_t insn) tcg_temp_free_i64(tcg_op2); tcg_temp_free_i64(tcg_res); } else { - TCGv_i32 tcg_op1 =3D tcg_temp_new_i32(); - TCGv_i32 tcg_op2 =3D tcg_temp_new_i32(); + TCGv_i32 tcg_op1 =3D read_fp_hreg(s, rn); + TCGv_i32 tcg_op2 =3D read_fp_hreg(s, rm); TCGv_i64 tcg_res =3D tcg_temp_new_i64(); =20 - read_vec_element_i32(s, tcg_op1, rn, 0, MO_16); - read_vec_element_i32(s, tcg_op2, rm, 0, MO_16); - gen_helper_neon_mull_s16(tcg_res, tcg_op1, tcg_op2); gen_helper_neon_addl_saturate_s32(tcg_res, cpu_env, tcg_res, tcg_r= es); =20 @@ -8331,13 +8334,10 @@ static void disas_simd_scalar_three_reg_same_fp16(D= isasContext *s, =20 fpst =3D get_fpstatus_ptr(true); =20 - tcg_op1 =3D tcg_temp_new_i32(); - tcg_op2 =3D tcg_temp_new_i32(); + tcg_op1 =3D read_fp_hreg(s, rn); + tcg_op2 =3D read_fp_hreg(s, rm); tcg_res =3D tcg_temp_new_i32(); =20 - read_vec_element_i32(s, tcg_op1, rn, 0, MO_16); - read_vec_element_i32(s, tcg_op2, rm, 0, MO_16); - switch (fpopcode) { case 0x03: /* FMULX */ gen_helper_advsimd_mulxh(tcg_res, tcg_op1, tcg_op2, fpst); @@ -12235,11 +12235,9 @@ static void disas_simd_two_reg_misc_fp16(DisasCont= ext *s, uint32_t insn) } =20 if (is_scalar) { - TCGv_i32 tcg_op =3D tcg_temp_new_i32(); + TCGv_i32 tcg_op =3D read_fp_hreg(s, rn); TCGv_i32 tcg_res =3D tcg_temp_new_i32(); =20 - read_vec_element_i32(s, tcg_op, rn, 0, MO_16); - switch (fpop) { case 0x1a: /* FCVTNS */ case 0x1b: /* FCVTMS */ --=20 2.17.0 From nobody Wed Oct 29 11:37:29 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 152600704926494.6583273139745; Thu, 10 May 2018 19:50:49 -0700 (PDT) Received: from localhost ([::1]:36459 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGy8u-0008Rd-Es for importer@patchew.org; Thu, 10 May 2018 22:50:48 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43829) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGy3Z-0002AP-JX for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGy3Y-00061C-Ro for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:17 -0400 Received: from mail-pg0-x241.google.com ([2607:f8b0:400e:c05::241]:34235) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGy3Y-00060R-Mu for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:16 -0400 Received: by mail-pg0-x241.google.com with SMTP id g20-v6so1799713pgv.1 for ; Thu, 10 May 2018 19:45:16 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. 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X-Received-From: 2607:f8b0:400e:c05::241 Subject: [Qemu-devel] [PATCH v3 06/11] target/arm: Implement FP data-processing (2 source) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 We missed all of the scalar fp16 binary operations. Cc: qemu-stable@nongnu.org Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 65 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 031213bb06..1264e798a7 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5299,6 +5299,61 @@ static void handle_fp_2src_double(DisasContext *s, i= nt opcode, tcg_temp_free_i64(tcg_res); } =20 +/* Floating-point data-processing (2 source) - half precision */ +static void handle_fp_2src_half(DisasContext *s, int opcode, + int rd, int rn, int rm) +{ + TCGv_i32 tcg_op1; + TCGv_i32 tcg_op2; + TCGv_i32 tcg_res; + TCGv_ptr fpst; + + tcg_res =3D tcg_temp_new_i32(); + fpst =3D get_fpstatus_ptr(true); + tcg_op1 =3D read_fp_hreg(s, rn); + tcg_op2 =3D read_fp_hreg(s, rm); + + switch (opcode) { + case 0x0: /* FMUL */ + gen_helper_advsimd_mulh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x1: /* FDIV */ + gen_helper_advsimd_divh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x2: /* FADD */ + gen_helper_advsimd_addh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x3: /* FSUB */ + gen_helper_advsimd_subh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x4: /* FMAX */ + gen_helper_advsimd_maxh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x5: /* FMIN */ + gen_helper_advsimd_minh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x6: /* FMAXNM */ + gen_helper_advsimd_maxnumh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x7: /* FMINNM */ + gen_helper_advsimd_minnumh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x8: /* FNMUL */ + gen_helper_advsimd_mulh(tcg_res, tcg_op1, tcg_op2, fpst); + tcg_gen_xori_i32(tcg_res, tcg_res, 0x8000); + break; + default: + g_assert_not_reached(); + } + + write_fp_sreg(s, rd, tcg_res); + + tcg_temp_free_ptr(fpst); + tcg_temp_free_i32(tcg_op1); + tcg_temp_free_i32(tcg_op2); + tcg_temp_free_i32(tcg_res); +} + /* Floating point data-processing (2 source) * 31 30 29 28 24 23 22 21 20 16 15 12 11 10 9 5 4 0 * +---+---+---+-----------+------+---+------+--------+-----+------+------+ @@ -5331,6 +5386,16 @@ static void disas_fp_2src(DisasContext *s, uint32_t = insn) } handle_fp_2src_double(s, opcode, rd, rn, rm); break; + case 3: + if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + unallocated_encoding(s); + return; + } + if (!fp_access_check(s)) { + return; + } + handle_fp_2src_half(s, opcode, rd, rn, rm); + break; default: unallocated_encoding(s); } --=20 2.17.0 From nobody Wed Oct 29 11:37:29 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526006880411771.8025829457991; Thu, 10 May 2018 19:48:00 -0700 (PDT) Received: from localhost ([::1]:36441 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGy6B-00047u-Il for importer@patchew.org; Thu, 10 May 2018 22:47:59 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43876) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGy3d-0002OP-5P for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGy3Z-00063V-VU for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:21 -0400 Received: from mail-pg0-x244.google.com ([2607:f8b0:400e:c05::244]:38048) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGy3Z-00062W-Qh for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:17 -0400 Received: by mail-pg0-x244.google.com with SMTP id n9-v6so1792591pgq.5 for ; Thu, 10 May 2018 19:45:17 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. 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X-Received-From: 2607:f8b0:400e:c05::244 Subject: [Qemu-devel] [PATCH v3 07/11] target/arm: Implement FP data-processing (3 source) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 We missed all of the scalar fp16 fma operations. Cc: qemu-stable@nongnu.org Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 48 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 1264e798a7..523fcf4801 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5477,6 +5477,44 @@ static void handle_fp_3src_double(DisasContext *s, b= ool o0, bool o1, tcg_temp_free_i64(tcg_res); } =20 +/* Floating-point data-processing (3 source) - half precision */ +static void handle_fp_3src_half(DisasContext *s, bool o0, bool o1, + int rd, int rn, int rm, int ra) +{ + TCGv_i32 tcg_op1, tcg_op2, tcg_op3; + TCGv_i32 tcg_res =3D tcg_temp_new_i32(); + TCGv_ptr fpst =3D get_fpstatus_ptr(true); + + tcg_op1 =3D read_fp_hreg(s, rn); + tcg_op2 =3D read_fp_hreg(s, rm); + tcg_op3 =3D read_fp_hreg(s, ra); + + /* These are fused multiply-add, and must be done as one + * floating point operation with no rounding between the + * multiplication and addition steps. + * NB that doing the negations here as separate steps is + * correct : an input NaN should come out with its sign bit + * flipped if it is a negated-input. + */ + if (o1 =3D=3D true) { + tcg_gen_xori_i32(tcg_op3, tcg_op3, 0x8000); + } + + if (o0 !=3D o1) { + tcg_gen_xori_i32(tcg_op1, tcg_op1, 0x8000); + } + + gen_helper_advsimd_muladdh(tcg_res, tcg_op1, tcg_op2, tcg_op3, fpst); + + write_fp_sreg(s, rd, tcg_res); + + tcg_temp_free_ptr(fpst); + tcg_temp_free_i32(tcg_op1); + tcg_temp_free_i32(tcg_op2); + tcg_temp_free_i32(tcg_op3); + tcg_temp_free_i32(tcg_res); +} + /* Floating point data-processing (3 source) * 31 30 29 28 24 23 22 21 20 16 15 14 10 9 5 4 0 * +---+---+---+-----------+------+----+------+----+------+------+------+ @@ -5506,6 +5544,16 @@ static void disas_fp_3src(DisasContext *s, uint32_t = insn) } handle_fp_3src_double(s, o0, o1, rd, rn, rm, ra); break; + case 3: + if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + unallocated_encoding(s); + return; + } + if (!fp_access_check(s)) { + return; + } + handle_fp_3src_half(s, o0, o1, rd, rn, rm, ra); + break; default: unallocated_encoding(s); } --=20 2.17.0 From nobody Wed Oct 29 11:37:29 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526007224126903.7109866728365; Thu, 10 May 2018 19:53:44 -0700 (PDT) Received: from localhost ([::1]:36477 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGyBh-0002ED-DM for importer@patchew.org; Thu, 10 May 2018 22:53:41 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43879) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGy3d-0002OY-6O for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGy3b-00065j-Ge for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:21 -0400 Received: from mail-pf0-x241.google.com ([2607:f8b0:400e:c00::241]:37859) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGy3b-000659-9v for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:19 -0400 Received: by mail-pf0-x241.google.com with SMTP id e9-v6so1996922pfi.4 for ; Thu, 10 May 2018 19:45:19 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id n18-v6sm5420915pfg.36.2018.05.10.19.45.16 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 19:45:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=imkLBLHYrUm4+V0oyc+OoHT1TLZgCH1uUIOJdSiz5m8=; b=c8W4HfAEqMgcWHespEh1i35PYYouLwKT/T3SoqDX3sMR/F5Nv6PrOdx2DuwF9qciCw eDCkxkpXfgyTLbD/tBQalS6TifndTiLmS4alyKaNSSdD2nYbtufCHYwusjDyFZV26+GR VgI8+wgDWvdNOtr0PFBrGTvPSc5YMohL0iHKU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=imkLBLHYrUm4+V0oyc+OoHT1TLZgCH1uUIOJdSiz5m8=; b=B+UUBaawkCYfxM7kEdiCjuCSviUa80os3jgcT7laFrSXwg+fOQ7pwRHxbRTeCN7WlL 73iIO+WFzoDNRLfcwCKfGtxrnKnia+7vvk9uf19kCgI7stAz3xidgEykOBG8QBfYo5Gg 8OHIGgjCYU4944lerImJv9PDaXd5mYQvNmpVj8eYbowEksFl4RngDPJuDhx9gVTkbWXk BFYPB6gJ3D3yVmIlRYGj2Bs+WzjiQMBgl/rZ4y+A0jBQdkxrIAz984Xfgv4b2gfS1LOt LsRez96I3nKK8WR/NIqqXxlZjE0DeULfNoEQg5XozGgK5U/FMwI8z0oQs37aLpuN7WrR Xtgg== X-Gm-Message-State: ALKqPwem62MHvmqr7zmyOVc80+aV96jex8OzCNtkIr95E5+iDTBs4Qsr AvjCZx7+Ncz3j+9VvuO/mswCkxeEmvI= X-Google-Smtp-Source: AB8JxZqbwHk85NiHzBNXXivC+9n4IwI6LpJHh+NlNR37Legl93Hwf8a70qabfrtsGVFWuj6927MMYQ== X-Received: by 2002:a65:4ed1:: with SMTP id w17-v6mr885678pgq.83.1526006717920; Thu, 10 May 2018 19:45:17 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 19:44:51 -0700 Message-Id: <20180511024454.31679-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511024454.31679-1-richard.henderson@linaro.org> References: <20180511024454.31679-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::241 Subject: [Qemu-devel] [PATCH v3 08/11] target/arm: Implement FCMP for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 From: Alex Benn=C3=A9e These where missed out from the rest of the half-precision work. Cc: qemu-stable@nongnu.org Reviewed-by: Peter Maydell Signed-off-by: Alex Benn=C3=A9e [rth: Diagnose lack of FP16 before fp_access_check] Signed-off-by: Richard Henderson --- target/arm/helper-a64.h | 2 + target/arm/helper-a64.c | 10 +++++ target/arm/translate-a64.c | 88 ++++++++++++++++++++++++++++++-------- 3 files changed, 83 insertions(+), 17 deletions(-) diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h index b8028ac98c..9d3a907049 100644 --- a/target/arm/helper-a64.h +++ b/target/arm/helper-a64.h @@ -19,6 +19,8 @@ DEF_HELPER_FLAGS_2(udiv64, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(sdiv64, TCG_CALL_NO_RWG_SE, s64, s64, s64) DEF_HELPER_FLAGS_1(rbit64, TCG_CALL_NO_RWG_SE, i64, i64) +DEF_HELPER_3(vfp_cmph_a64, i64, f16, f16, ptr) +DEF_HELPER_3(vfp_cmpeh_a64, i64, f16, f16, ptr) DEF_HELPER_3(vfp_cmps_a64, i64, f32, f32, ptr) DEF_HELPER_3(vfp_cmpes_a64, i64, f32, f32, ptr) DEF_HELPER_3(vfp_cmpd_a64, i64, f64, f64, ptr) diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index 549ed3513e..4f8034c513 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -85,6 +85,16 @@ static inline uint32_t float_rel_to_flags(int res) return flags; } =20 +uint64_t HELPER(vfp_cmph_a64)(float16 x, float16 y, void *fp_status) +{ + return float_rel_to_flags(float16_compare_quiet(x, y, fp_status)); +} + +uint64_t HELPER(vfp_cmpeh_a64)(float16 x, float16 y, void *fp_status) +{ + return float_rel_to_flags(float16_compare(x, y, fp_status)); +} + uint64_t HELPER(vfp_cmps_a64)(float32 x, float32 y, void *fp_status) { return float_rel_to_flags(float32_compare_quiet(x, y, fp_status)); diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 523fcf4801..0ac586345e 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -4712,14 +4712,14 @@ static void disas_data_proc_reg(DisasContext *s, ui= nt32_t insn) } } =20 -static void handle_fp_compare(DisasContext *s, bool is_double, +static void handle_fp_compare(DisasContext *s, int size, unsigned int rn, unsigned int rm, bool cmp_with_zero, bool signal_all_nans) { TCGv_i64 tcg_flags =3D tcg_temp_new_i64(); - TCGv_ptr fpst =3D get_fpstatus_ptr(false); + TCGv_ptr fpst =3D get_fpstatus_ptr(size =3D=3D MO_16); =20 - if (is_double) { + if (size =3D=3D MO_64) { TCGv_i64 tcg_vn, tcg_vm; =20 tcg_vn =3D read_fp_dreg(s, rn); @@ -4736,19 +4736,35 @@ static void handle_fp_compare(DisasContext *s, bool= is_double, tcg_temp_free_i64(tcg_vn); tcg_temp_free_i64(tcg_vm); } else { - TCGv_i32 tcg_vn, tcg_vm; + TCGv_i32 tcg_vn =3D tcg_temp_new_i32(); + TCGv_i32 tcg_vm =3D tcg_temp_new_i32(); =20 - tcg_vn =3D read_fp_sreg(s, rn); + read_vec_element_i32(s, tcg_vn, rn, 0, size); if (cmp_with_zero) { - tcg_vm =3D tcg_const_i32(0); + tcg_gen_movi_i32(tcg_vm, 0); } else { - tcg_vm =3D read_fp_sreg(s, rm); + read_vec_element_i32(s, tcg_vm, rm, 0, size); } - if (signal_all_nans) { - gen_helper_vfp_cmpes_a64(tcg_flags, tcg_vn, tcg_vm, fpst); - } else { - gen_helper_vfp_cmps_a64(tcg_flags, tcg_vn, tcg_vm, fpst); + + switch (size) { + case MO_32: + if (signal_all_nans) { + gen_helper_vfp_cmpes_a64(tcg_flags, tcg_vn, tcg_vm, fpst); + } else { + gen_helper_vfp_cmps_a64(tcg_flags, tcg_vn, tcg_vm, fpst); + } + break; + case MO_16: + if (signal_all_nans) { + gen_helper_vfp_cmpeh_a64(tcg_flags, tcg_vn, tcg_vm, fpst); + } else { + gen_helper_vfp_cmph_a64(tcg_flags, tcg_vn, tcg_vm, fpst); + } + break; + default: + g_assert_not_reached(); } + tcg_temp_free_i32(tcg_vn); tcg_temp_free_i32(tcg_vm); } @@ -4769,16 +4785,35 @@ static void handle_fp_compare(DisasContext *s, bool= is_double, static void disas_fp_compare(DisasContext *s, uint32_t insn) { unsigned int mos, type, rm, op, rn, opc, op2r; + int size; =20 mos =3D extract32(insn, 29, 3); - type =3D extract32(insn, 22, 2); /* 0 =3D single, 1 =3D double */ + type =3D extract32(insn, 22, 2); rm =3D extract32(insn, 16, 5); op =3D extract32(insn, 14, 2); rn =3D extract32(insn, 5, 5); opc =3D extract32(insn, 3, 2); op2r =3D extract32(insn, 0, 3); =20 - if (mos || op || op2r || type > 1) { + if (mos || op || op2r) { + unallocated_encoding(s); + return; + } + + switch (type) { + case 0: + size =3D MO_32; + break; + case 1: + size =3D MO_64; + break; + case 3: + size =3D MO_16; + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } @@ -4787,7 +4822,7 @@ static void disas_fp_compare(DisasContext *s, uint32_= t insn) return; } =20 - handle_fp_compare(s, type, rn, rm, opc & 1, opc & 2); + handle_fp_compare(s, size, rn, rm, opc & 1, opc & 2); } =20 /* Floating point conditional compare @@ -4801,16 +4836,35 @@ static void disas_fp_ccomp(DisasContext *s, uint32_= t insn) unsigned int mos, type, rm, cond, rn, op, nzcv; TCGv_i64 tcg_flags; TCGLabel *label_continue =3D NULL; + int size; =20 mos =3D extract32(insn, 29, 3); - type =3D extract32(insn, 22, 2); /* 0 =3D single, 1 =3D double */ + type =3D extract32(insn, 22, 2); rm =3D extract32(insn, 16, 5); cond =3D extract32(insn, 12, 4); rn =3D extract32(insn, 5, 5); op =3D extract32(insn, 4, 1); nzcv =3D extract32(insn, 0, 4); =20 - if (mos || type > 1) { + if (mos) { + unallocated_encoding(s); + return; + } + + switch (type) { + case 0: + size =3D MO_32; + break; + case 1: + size =3D MO_64; + break; + case 3: + size =3D MO_16; + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } @@ -4831,7 +4885,7 @@ static void disas_fp_ccomp(DisasContext *s, uint32_t = insn) gen_set_label(label_match); } =20 - handle_fp_compare(s, type, rn, rm, false, op); + handle_fp_compare(s, size, rn, rm, false, op); =20 if (cond < 0x0e) { gen_set_label(label_continue); --=20 2.17.0 From nobody Wed Oct 29 11:37:29 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526007168110213.13331451581223; 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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id n18-v6sm5420915pfg.36.2018.05.10.19.45.17 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 19:45:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=A0ubSGeyMVpiFS+RbvRXRf1tVN9tojSDRuZYAy+j7Xs=; b=fI52u2N3titvj4ezvhyrCILFUubmT9p1ZlLjsYzYlVsj+pcFnFGR/gbCrGJNSJ6zp0 DpcqjnTvMjwVvCXA+COHvTtHhR0oS8B1eLquv3HeaUTqBB3l91Dcw0cBmfa85SIaa5Fs MvqISTiBpN3sx79IRbVMku1fJEysKSi/NTjiU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=A0ubSGeyMVpiFS+RbvRXRf1tVN9tojSDRuZYAy+j7Xs=; b=bt2KXKyDrJmdiLQeoG3q3fXKZmr41Mjd2jQ5CgxzYn5iq6UikXFnqOql+aAsXrJyCj jrG8BUMqxCPjOgNRqup9EpKRl2rBgWNcymkWYR6gwZJJ3+NVhC3OsJ+dFBbnhQhPEj8N 2nhlU+7gTir5sduFybh65lu7xfe3JpH31quCOJSVzgS/UGaHE/lgt3HbIwkaHK81nk4D zWXk51FdH808QZMMso6m7TcFnHvlZivmu+lw2/C/OLZA2wYJLDS0725PypqGozVolJ2n 2Tbn4tNyrnizleX3mA+hlqdlYinQ8C9UKynYw3caI8sLe1Hkz/7HBJcNTOocqByf3AS+ eSGg== X-Gm-Message-State: ALKqPwfYOY69DbyeeixEjwdaSxmxSo/677C78E8Em8VWaLjdOl1ha74c lPunfyqUNxW8JdoNa7I4YDjZslnFcEk= X-Google-Smtp-Source: AB8JxZqgsKC9ja+gKNfMWm74X19xLjleXzF8UBqEgJuW5vhnlGmim2OYnHS7JcsXTs5opjuAmg7M1Q== X-Received: by 2002:a17:902:6549:: with SMTP id d9-v6mr3725112pln.196.1526006719194; Thu, 10 May 2018 19:45:19 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 19:44:52 -0700 Message-Id: <20180511024454.31679-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511024454.31679-1-richard.henderson@linaro.org> References: <20180511024454.31679-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::243 Subject: [Qemu-devel] [PATCH v3 09/11] target/arm: Implement FCSEL for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 From: Alex Benn=C3=A9e These were missed out from the rest of the half-precision work. Cc: qemu-stable@nongnu.org Reviewed-by: Peter Maydell Signed-off-by: Alex Benn=C3=A9e [rth: Fix erroneous check vs type] Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 31 +++++++++++++++++++++++++------ 1 file changed, 25 insertions(+), 6 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 0ac586345e..85a46f7abd 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -4903,15 +4903,34 @@ static void disas_fp_csel(DisasContext *s, uint32_t= insn) unsigned int mos, type, rm, cond, rn, rd; TCGv_i64 t_true, t_false, t_zero; DisasCompare64 c; + TCGMemOp sz; =20 mos =3D extract32(insn, 29, 3); - type =3D extract32(insn, 22, 2); /* 0 =3D single, 1 =3D double */ + type =3D extract32(insn, 22, 2); rm =3D extract32(insn, 16, 5); cond =3D extract32(insn, 12, 4); rn =3D extract32(insn, 5, 5); rd =3D extract32(insn, 0, 5); =20 - if (mos || type > 1) { + if (mos) { + unallocated_encoding(s); + return; + } + + switch (type) { + case 0: + sz =3D MO_32; + break; + case 1: + sz =3D MO_64; + break; + case 3: + sz =3D MO_16; + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } @@ -4920,11 +4939,11 @@ static void disas_fp_csel(DisasContext *s, uint32_t= insn) return; } =20 - /* Zero extend sreg inputs to 64 bits now. */ + /* Zero extend sreg & hreg inputs to 64 bits now. */ t_true =3D tcg_temp_new_i64(); t_false =3D tcg_temp_new_i64(); - read_vec_element(s, t_true, rn, 0, type ? MO_64 : MO_32); - read_vec_element(s, t_false, rm, 0, type ? MO_64 : MO_32); + read_vec_element(s, t_true, rn, 0, sz); + read_vec_element(s, t_false, rm, 0, sz); =20 a64_test_cc(&c, cond); t_zero =3D tcg_const_i64(0); @@ -4933,7 +4952,7 @@ static void disas_fp_csel(DisasContext *s, uint32_t i= nsn) tcg_temp_free_i64(t_false); a64_free_cc(&c); =20 - /* Note that sregs write back zeros to the high bits, + /* Note that sregs & hregs write back zeros to the high bits, and we've already done the zero-extension. */ write_fp_dreg(s, rd, t_true); tcg_temp_free_i64(t_true); --=20 2.17.0 From nobody Wed Oct 29 11:37:29 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526007329217574.4747826014085; Thu, 10 May 2018 19:55:29 -0700 (PDT) Received: from localhost ([::1]:36491 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGyDQ-0004y6-GW for importer@patchew.org; Thu, 10 May 2018 22:55:28 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43926) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGy3f-0002V5-1N for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGy3e-00067R-1O for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:22 -0400 Received: from mail-pg0-x243.google.com ([2607:f8b0:400e:c05::243]:33639) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGy3d-00066z-S9 for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:21 -0400 Received: by mail-pg0-x243.google.com with SMTP id i194-v6so1798707pgd.0 for ; Thu, 10 May 2018 19:45:21 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id n18-v6sm5420915pfg.36.2018.05.10.19.45.19 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 19:45:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RBjkwsmo6PqvvVb5ytRMTfzsA4/w11RdkNk+t8rA5Kg=; b=R+/oBYIJRPgIRMkkj230Hw5ZcmDMR3IOyn3aVxf0iDPh4Q8HXmidXZoytdVyIuijEG LTz0gTS5TJeWPmvoecICnSeoyNtI5DWC50DPZIHDaT8MU1hSUQEIF9LJgjgwL7c/yn+U ZCCaejyh5x+ULw1n59WCuUMXbrw/oRLgZKH3Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RBjkwsmo6PqvvVb5ytRMTfzsA4/w11RdkNk+t8rA5Kg=; b=LMYVSTa1qLGAaOO9I8DdvGGtmTRmlsnQWqtm8mcrjwTHl5kpl7X+KyWEaRFaL8qOGN WQVceZtcDDfiyYnfINnrrpC5swLAke6YPyzU/42Y6hj7QIxcS4muOetVesLRl1hCTWg3 j70qNu1ShD1oYraP3kSacqrc2o/32/qu2n0jbUuC5TWV2E9CJA6RmZ0gSzg2Fk+VDa14 4EKKL/WUTGOYJ9uMbnJfQdjESXtUAR4s2v5XsJRXWAIlFIlpEFoOTZ7e1Tely7OoD1JQ EGr/V1fYxdIXZwYaIXKz0elvO5MQ5svbG7yZDYk8He+y3TxakC4cWqtyRlNmprNWgy0i 5VKQ== X-Gm-Message-State: ALKqPwc3PoOsNGoEd/nfMBMxb90W3ANkk16a67HyRSs2H8AvUwA8Zcgt fIWs8Sb1I6cm4o5BvD+Ge7mYSiZTh00= X-Google-Smtp-Source: AB8JxZp/WImgXeegiz8ndOJnS2g9Tw2WvwXxqNR2oGuMup0pGIUpVw2ws/bBFbInVnz9EzYFWbzkWQ== X-Received: by 2002:a63:9302:: with SMTP id b2-v6mr3027957pge.263.1526006720539; Thu, 10 May 2018 19:45:20 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 19:44:53 -0700 Message-Id: <20180511024454.31679-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511024454.31679-1-richard.henderson@linaro.org> References: <20180511024454.31679-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::243 Subject: [Qemu-devel] [PATCH v3 10/11] target/arm: Implement FMOV (immediate) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 From: Alex Benn=C3=A9e All the hard work is already done by vfp_expand_imm, we just need to make sure we pick up the correct size. Cc: qemu-stable@nongnu.org Reviewed-by: Peter Maydell Signed-off-by: Alex Benn=C3=A9e [rth: Merge unallocated_encoding check with TCGMemOp conversion.] Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 85a46f7abd..d77eda7cbc 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5674,11 +5674,25 @@ static void disas_fp_imm(DisasContext *s, uint32_t = insn) { int rd =3D extract32(insn, 0, 5); int imm8 =3D extract32(insn, 13, 8); - int is_double =3D extract32(insn, 22, 2); + int type =3D extract32(insn, 22, 2); uint64_t imm; TCGv_i64 tcg_res; + TCGMemOp sz; =20 - if (is_double > 1) { + switch (type) { + case 0: + sz =3D MO_32; + break; + case 1: + sz =3D MO_64; + break; + case 3: + sz =3D MO_16; + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } @@ -5701,7 +5715,7 @@ static void disas_fp_imm(DisasContext *s, uint32_t in= sn) return; } =20 - imm =3D vfp_expand_imm(MO_32 + is_double, imm8); + imm =3D vfp_expand_imm(sz, imm8); =20 tcg_res =3D tcg_const_i64(imm); write_fp_dreg(s, rd, tcg_res); --=20 2.17.0 From nobody Wed Oct 29 11:37:29 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526007308426352.77987278165097; Thu, 10 May 2018 19:55:08 -0700 (PDT) Received: from localhost ([::1]:36488 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGyD5-0004fB-Mu for importer@patchew.org; Thu, 10 May 2018 22:55:07 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43951) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGy3g-0002Y9-0T for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGy3f-00068O-7W for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:23 -0400 Received: from mail-pl0-x241.google.com ([2607:f8b0:400e:c01::241]:44342) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGy3f-00067p-2Y for qemu-devel@nongnu.org; Thu, 10 May 2018 22:45:23 -0400 Received: by mail-pl0-x241.google.com with SMTP id e6-v6so2408664plt.11 for ; Thu, 10 May 2018 19:45:22 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id n18-v6sm5420915pfg.36.2018.05.10.19.45.20 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 19:45:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3wO77nwWyvUTdrKptxzVk6DCxG2ZwD2EuEIfUFsq+dw=; b=PQVniZuih+307S88xGMYO8MVY4aNSvs8VZnf0NJQp1I+e/bXFAVWRaTXp400Jpowkt TfbUEnBMtEk47fa4Yn2Zobza7xWRLTdHxtPCNqqtkETapWoMq4oCmnrTkFI3McJZj+qj /BUsxTYpsQhBehN95Jjwxb/jIUwroNXLsFEvQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3wO77nwWyvUTdrKptxzVk6DCxG2ZwD2EuEIfUFsq+dw=; b=qDKfJE7nkxK8MIt3WbNAMxL+ABbXMUW8XARumTz00qWPNWyS++FmHa7K8xwtBY1dhM 0W+zLreZjOfgGQtcVnathI/Uql/kJ2avG+HV6BLqqhU5QLAzivBHwf3CVVbd/VqmJpM3 MxWOqHW739BmCaONBkit/0tykfhm/9wQWjFu3+OmuUGv+R1MXT3/QYPZ2i8gkOT9+Tmh mf43ceChJ6q/IWs34j5Acb6rsg+FZjGKli4L0sJmScJ6lwi6NFS+giml0BT8zALgCvvZ 1MV99hrq+rDmGgckSjAMtKh1IQHuZ4DxxzOL04RouBqkTVyJjqmTxsYNjW495DoFgkM+ OF9A== X-Gm-Message-State: ALKqPwdCWVk2NVkb+YlhqkGLTr5t0rtM4MZN7f7PHqzoq5wA78gGXQg0 jdcVDY1zLriFrLlw0Kuc8CQU8NnFjSk= X-Google-Smtp-Source: AB8JxZq5ke5XaOalPK4PiMksCmiPN0o3STzHJX+PfTkLql+Ibgqm8J0EhOlDIMKoXbq1scFHA7zptw== X-Received: by 2002:a17:902:6b09:: with SMTP id o9-v6mr3764226plk.256.1526006721797; Thu, 10 May 2018 19:45:21 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 19:44:54 -0700 Message-Id: <20180511024454.31679-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511024454.31679-1-richard.henderson@linaro.org> References: <20180511024454.31679-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::241 Subject: [Qemu-devel] [PATCH v3 11/11] target/arm: Fix sqrt_f16 exception raising X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 From: Alex Benn=C3=A9e We are meant to explicitly pass fpst, not cpu_env. Cc: qemu-stable@nongnu.org Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index d77eda7cbc..009a151379 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -4976,7 +4976,8 @@ static void handle_fp_1src_half(DisasContext *s, int = opcode, int rd, int rn) tcg_gen_xori_i32(tcg_res, tcg_op, 0x8000); break; case 0x3: /* FSQRT */ - gen_helper_sqrt_f16(tcg_res, tcg_op, cpu_env); + fpst =3D get_fpstatus_ptr(true); + gen_helper_sqrt_f16(tcg_res, tcg_op, fpst); break; case 0x8: /* FRINTN */ case 0x9: /* FRINTP */ --=20 2.17.0