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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id y24-v6sm4216728pfn.23.2018.05.10.17.43.48 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 17:43:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=PpgJxLxwh0gWwOekp9pwFv+Nso4D2MW1riYbZjKqfQo=; b=ayN+5h+CrSwXklLcmr5mUccbh3bh0KbZs0G3OQodvHNP8la8xfoxmy5z87ktfaB01z vCRM0UCJ2W5MiZ0mqEvVIHSREKCiCHYwBkQlhIizy1gVGF93r4rIoltti1TfB1GyHZT8 k1nsmw3V4kUWDSpDceAMQGVmyiiG+XfK6/534= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=PpgJxLxwh0gWwOekp9pwFv+Nso4D2MW1riYbZjKqfQo=; b=fzqj3IAd9/+VUb5Mlz4MO/1t/cjabTdzJpJQKS7TY3sryrW+Zkls2u6Eg1lrJ1txX8 PJ69QrxelwpvuJlEnoU/y/LwrPLhbkfbmdTPdVADaPfwC+8fz9H2DjUqGUgpF8my6FwA J2bUB2Y7eXCDIIVOcgxJzcsB/6NeDuExb/k90+YnXsODptyu27eLctp7gAg/P2reUi9x 9MuxFQPFXduN1aztAi9sn4WSNu1gZpeh3lLR8IIs3HLZIKIogfJX5JSboczVdg8LGlMr JrODPVvrkJqqrNb0hPknupmWDG189s2pt8vL7I8ldKXLszP6ahlDIrllrbqIgpvVqEZ2 JLPQ== X-Gm-Message-State: ALKqPwfRZhQfHhZVKRihnrGTXVkWOQiW2qg/ahGMaIOQaRaM0bZPb+zj Q/dbdmXFdk/Nc5Ik9fPPJwsNCJKJTRA= X-Google-Smtp-Source: AB8JxZoO81csAwZZBrDQ9uZkoFeFhTP0MPmqg3Ocw8GvW9bONhfwKk63GLZ9gG8B5go8LgTvCWwiUw== X-Received: by 2002:a63:3347:: with SMTP id z68-v6mr2655170pgz.171.1525999429741; Thu, 10 May 2018 17:43:49 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 17:43:27 -0700 Message-Id: <20180511004345.26708-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511004345.26708-1-richard.henderson@linaro.org> References: <20180511004345.26708-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::241 Subject: [Qemu-devel] [PATCH 01/19] fpu/softfloat: Merge NO_SIGNALING_NANS definitions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Move the ifdef inside the relevant functions instead of duplicating the function declarations. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- fpu/softfloat-specialize.h | 100 +++++++++++++++---------------------- 1 file changed, 40 insertions(+), 60 deletions(-) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index a20b440159..8bd553abd2 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -233,17 +233,6 @@ typedef struct { uint64_t high, low; } commonNaNT; =20 -#ifdef NO_SIGNALING_NANS -int float16_is_quiet_nan(float16 a_, float_status *status) -{ - return float16_is_any_nan(a_); -} - -int float16_is_signaling_nan(float16 a_, float_status *status) -{ - return 0; -} -#else /*------------------------------------------------------------------------= ---- | Returns 1 if the half-precision floating-point value `a' is a quiet | NaN; otherwise returns 0. @@ -251,12 +240,16 @@ int float16_is_signaling_nan(float16 a_, float_status= *status) =20 int float16_is_quiet_nan(float16 a_, float_status *status) { +#ifdef NO_SIGNALING_NANS + return float16_is_any_nan(a_); +#else uint16_t a =3D float16_val(a_); if (status->snan_bit_is_one) { return (((a >> 9) & 0x3F) =3D=3D 0x3E) && (a & 0x1FF); } else { return ((a & ~0x8000) >=3D 0x7C80); } +#endif } =20 /*------------------------------------------------------------------------= ---- @@ -266,14 +259,17 @@ int float16_is_quiet_nan(float16 a_, float_status *st= atus) =20 int float16_is_signaling_nan(float16 a_, float_status *status) { +#ifdef NO_SIGNALING_NANS + return 0; +#else uint16_t a =3D float16_val(a_); if (status->snan_bit_is_one) { return ((a & ~0x8000) >=3D 0x7C80); } else { return (((a >> 9) & 0x3F) =3D=3D 0x3E) && (a & 0x1FF); } -} #endif +} =20 /*------------------------------------------------------------------------= ---- | Returns a quiet NaN if the half-precision floating point value `a' is a @@ -293,17 +289,6 @@ float16 float16_maybe_silence_nan(float16 a_, float_st= atus *status) return a_; } =20 -#ifdef NO_SIGNALING_NANS -int float32_is_quiet_nan(float32 a_, float_status *status) -{ - return float32_is_any_nan(a_); -} - -int float32_is_signaling_nan(float32 a_, float_status *status) -{ - return 0; -} -#else /*------------------------------------------------------------------------= ---- | Returns 1 if the single-precision floating-point value `a' is a quiet | NaN; otherwise returns 0. @@ -311,12 +296,16 @@ int float32_is_signaling_nan(float32 a_, float_status= *status) =20 int float32_is_quiet_nan(float32 a_, float_status *status) { +#ifdef NO_SIGNALING_NANS + return float32_is_any_nan(a_); +#else uint32_t a =3D float32_val(a_); if (status->snan_bit_is_one) { return (((a >> 22) & 0x1FF) =3D=3D 0x1FE) && (a & 0x003FFFFF); } else { return ((uint32_t)(a << 1) >=3D 0xFF800000); } +#endif } =20 /*------------------------------------------------------------------------= ---- @@ -326,14 +315,17 @@ int float32_is_quiet_nan(float32 a_, float_status *st= atus) =20 int float32_is_signaling_nan(float32 a_, float_status *status) { +#ifdef NO_SIGNALING_NANS + return 0; +#else uint32_t a =3D float32_val(a_); if (status->snan_bit_is_one) { return ((uint32_t)(a << 1) >=3D 0xFF800000); } else { return (((a >> 22) & 0x1FF) =3D=3D 0x1FE) && (a & 0x003FFFFF); } -} #endif +} =20 /*------------------------------------------------------------------------= ---- | Returns a quiet NaN if the single-precision floating point value `a' is a @@ -704,17 +696,6 @@ static float32 propagateFloat32NaN(float32 a, float32 = b, float_status *status) } } =20 -#ifdef NO_SIGNALING_NANS -int float64_is_quiet_nan(float64 a_, float_status *status) -{ - return float64_is_any_nan(a_); -} - -int float64_is_signaling_nan(float64 a_, float_status *status) -{ - return 0; -} -#else /*------------------------------------------------------------------------= ---- | Returns 1 if the double-precision floating-point value `a' is a quiet | NaN; otherwise returns 0. @@ -722,6 +703,9 @@ int float64_is_signaling_nan(float64 a_, float_status *= status) =20 int float64_is_quiet_nan(float64 a_, float_status *status) { +#ifdef NO_SIGNALING_NANS + return float64_is_any_nan(a_); +#else uint64_t a =3D float64_val(a_); if (status->snan_bit_is_one) { return (((a >> 51) & 0xFFF) =3D=3D 0xFFE) @@ -729,6 +713,7 @@ int float64_is_quiet_nan(float64 a_, float_status *stat= us) } else { return ((a << 1) >=3D 0xFFF0000000000000ULL); } +#endif } =20 /*------------------------------------------------------------------------= ---- @@ -738,6 +723,9 @@ int float64_is_quiet_nan(float64 a_, float_status *stat= us) =20 int float64_is_signaling_nan(float64 a_, float_status *status) { +#ifdef NO_SIGNALING_NANS + return 0; +#else uint64_t a =3D float64_val(a_); if (status->snan_bit_is_one) { return ((a << 1) >=3D 0xFFF0000000000000ULL); @@ -745,8 +733,8 @@ int float64_is_signaling_nan(float64 a_, float_status *= status) return (((a >> 51) & 0xFFF) =3D=3D 0xFFE) && (a & LIT64(0x0007FFFFFFFFFFFF)); } -} #endif +} =20 /*------------------------------------------------------------------------= ---- | Returns a quiet NaN if the double-precision floating point value `a' is a @@ -859,17 +847,6 @@ static float64 propagateFloat64NaN(float64 a, float64 = b, float_status *status) } } =20 -#ifdef NO_SIGNALING_NANS -int floatx80_is_quiet_nan(floatx80 a_, float_status *status) -{ - return floatx80_is_any_nan(a_); -} - -int floatx80_is_signaling_nan(floatx80 a_, float_status *status) -{ - return 0; -} -#else /*------------------------------------------------------------------------= ---- | Returns 1 if the extended double-precision floating-point value `a' is a | quiet NaN; otherwise returns 0. This slightly differs from the same @@ -878,6 +855,9 @@ int floatx80_is_signaling_nan(floatx80 a_, float_status= *status) =20 int floatx80_is_quiet_nan(floatx80 a, float_status *status) { +#ifdef NO_SIGNALING_NANS + return floatx80_is_any_nan(a); +#else if (status->snan_bit_is_one) { uint64_t aLow; =20 @@ -889,6 +869,7 @@ int floatx80_is_quiet_nan(floatx80 a, float_status *sta= tus) return ((a.high & 0x7FFF) =3D=3D 0x7FFF) && (LIT64(0x8000000000000000) <=3D ((uint64_t)(a.low << 1))); } +#endif } =20 /*------------------------------------------------------------------------= ---- @@ -899,6 +880,9 @@ int floatx80_is_quiet_nan(floatx80 a, float_status *sta= tus) =20 int floatx80_is_signaling_nan(floatx80 a, float_status *status) { +#ifdef NO_SIGNALING_NANS + return 0; +#else if (status->snan_bit_is_one) { return ((a.high & 0x7FFF) =3D=3D 0x7FFF) && ((a.low << 1) >=3D 0x8000000000000000ULL); @@ -910,8 +894,8 @@ int floatx80_is_signaling_nan(floatx80 a, float_status = *status) && (uint64_t)(aLow << 1) && (a.low =3D=3D aLow); } -} #endif +} =20 /*------------------------------------------------------------------------= ---- | Returns a quiet NaN if the extended double-precision floating point value @@ -1020,17 +1004,6 @@ floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b= , float_status *status) } } =20 -#ifdef NO_SIGNALING_NANS -int float128_is_quiet_nan(float128 a_, float_status *status) -{ - return float128_is_any_nan(a_); -} - -int float128_is_signaling_nan(float128 a_, float_status *status) -{ - return 0; -} -#else /*------------------------------------------------------------------------= ---- | Returns 1 if the quadruple-precision floating-point value `a' is a quiet | NaN; otherwise returns 0. @@ -1038,6 +1011,9 @@ int float128_is_signaling_nan(float128 a_, float_stat= us *status) =20 int float128_is_quiet_nan(float128 a, float_status *status) { +#ifdef NO_SIGNALING_NANS + return float128_is_any_nan(a); +#else if (status->snan_bit_is_one) { return (((a.high >> 47) & 0xFFFF) =3D=3D 0xFFFE) && (a.low || (a.high & 0x00007FFFFFFFFFFFULL)); @@ -1045,6 +1021,7 @@ int float128_is_quiet_nan(float128 a, float_status *s= tatus) return ((a.high << 1) >=3D 0xFFFF000000000000ULL) && (a.low || (a.high & 0x0000FFFFFFFFFFFFULL)); } +#endif } =20 /*------------------------------------------------------------------------= ---- @@ -1054,6 +1031,9 @@ int float128_is_quiet_nan(float128 a, float_status *s= tatus) =20 int float128_is_signaling_nan(float128 a, float_status *status) { +#ifdef NO_SIGNALING_NANS + return 0; +#else if (status->snan_bit_is_one) { return ((a.high << 1) >=3D 0xFFFF000000000000ULL) && (a.low || (a.high & 0x0000FFFFFFFFFFFFULL)); @@ -1061,8 +1041,8 @@ int float128_is_signaling_nan(float128 a, float_statu= s *status) return (((a.high >> 47) & 0xFFFF) =3D=3D 0xFFFE) && (a.low || (a.high & LIT64(0x00007FFFFFFFFFFF))); } -} #endif +} =20 /*------------------------------------------------------------------------= ---- | Returns a quiet NaN if the quadruple-precision floating point value `a' = is --=20 2.17.0 From nobody Wed Oct 29 20:33:39 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525999767583688.2491607479571; Thu, 10 May 2018 17:49:27 -0700 (PDT) Received: from localhost ([::1]:36177 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwFS-0004C8-JH for importer@patchew.org; Thu, 10 May 2018 20:49:26 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51936) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwA6-00079K-I6 for qemu-devel@nongnu.org; Thu, 10 May 2018 20:43:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGwA4-0004o1-RD for qemu-devel@nongnu.org; Thu, 10 May 2018 20:43:54 -0400 Received: from mail-pg0-x244.google.com ([2607:f8b0:400e:c05::244]:44252) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGwA4-0004nl-JL for qemu-devel@nongnu.org; Thu, 10 May 2018 20:43:52 -0400 Received: by mail-pg0-x244.google.com with SMTP id x145-v6so1673320pgx.11 for ; Thu, 10 May 2018 17:43:52 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id y24-v6sm4216728pfn.23.2018.05.10.17.43.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 17:43:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=di6CESXWYgmArUk7fM6x023qM9wBT6VNaGWbTYiy2UI=; b=SfDHwYFCchsU46WF1eoNqP6S4UwXQBLm7/26MaM3BOBnThGyx+WmOhdM9WMpu5+znc 2o0h2TspHRWEUCiylcxw9tWwxGfFJuv/H7FXFiF8N0a+JrlDyTPZxoEWc7q4hfhgUJcW TY1KE7OMYDEfxIqNGsEV6DDXsoxOZHfg1MRnk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=di6CESXWYgmArUk7fM6x023qM9wBT6VNaGWbTYiy2UI=; b=V96DAWydTA8ip/HsgSu23s6CF3OtKTxJ1lc8XlsYRBoE9ONAWSBYi96C4SicCGT93j Zxr/E3JltM3oLmiU3LEVpNRFMVoCMOAQBdyX65cZlG5JAu4Zx2BzifuVNOsFohp3s8Of 3Lk2twTGXucjfJUpMk/knCdOXUHiRs8jij+ICqXdKCtkIVNbOAkv5oXEBgs/pX5U1RnO iVWiyrOZgwhSyJd92mqmSnVSynyWF+rtWzh4KoBPlXaiBUviM175bCKJybZA3kSJ4DJE 6zUGO4TVxF/PWzFTj4phdER06/W/iQ5cyjhCAQmIgPC7RZm+NJig2sl3It1BxdUt0U0c ExCg== X-Gm-Message-State: ALKqPwcVJCn4kuFSU+CNJd+ngvKn94GRGoIfDaf5k5wLzzYgdmEsw6bF 48bmYgXMMKvcrlFajF1cE6UWU+5lRYs= X-Google-Smtp-Source: AB8JxZoDyZpqazh7/sRAwb8Evnkn9qeZj0rasmjYax7bw3PM3iR9gPLc6hnTCm+VQj+O7IhGuYLnEQ== X-Received: by 2002:a63:6f41:: with SMTP id k62-v6mr2711677pgc.73.1525999431071; Thu, 10 May 2018 17:43:51 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 17:43:28 -0700 Message-Id: <20180511004345.26708-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511004345.26708-1-richard.henderson@linaro.org> References: <20180511004345.26708-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::244 Subject: [Qemu-devel] [PATCH 02/19] fpu/softfloat: Split floatXX_silence_nan from floatXX_maybe_silence_nan X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The new function assumes that the input is an SNaN and does not double-check. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- fpu/softfloat-specialize.h | 174 +++++++++++++++++++++++++------------ include/fpu/softfloat.h | 5 ++ 2 files changed, 123 insertions(+), 56 deletions(-) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 8bd553abd2..b59356f6a5 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -271,22 +271,35 @@ int float16_is_signaling_nan(float16 a_, float_status= *status) #endif } =20 +/*------------------------------------------------------------------------= ---- +| Returns a quiet NaN from a signalling NaN for the half-precision +| floating point value `a'. +*-------------------------------------------------------------------------= ---*/ + +float16 float16_silence_nan(float16 a, float_status *status) +{ +#ifdef NO_SIGNALING_NANS + g_assert_not_reached(); +#else + if (status->snan_bit_is_one) { + return float16_default_nan(status); + } else { + return a | (1 << 9); + } +#endif +} + /*------------------------------------------------------------------------= ---- | Returns a quiet NaN if the half-precision floating point value `a' is a | signaling NaN; otherwise returns `a'. *-------------------------------------------------------------------------= ---*/ -float16 float16_maybe_silence_nan(float16 a_, float_status *status) + +float16 float16_maybe_silence_nan(float16 a, float_status *status) { - if (float16_is_signaling_nan(a_, status)) { - if (status->snan_bit_is_one) { - return float16_default_nan(status); - } else { - uint16_t a =3D float16_val(a_); - a |=3D (1 << 9); - return make_float16(a); - } + if (float16_is_signaling_nan(a, status)) { + float16_silence_nan(a, status); } - return a_; + return a; } =20 /*------------------------------------------------------------------------= ---- @@ -327,30 +340,40 @@ int float32_is_signaling_nan(float32 a_, float_status= *status) #endif } =20 +/*------------------------------------------------------------------------= ---- +| Returns a quiet NaN from a signalling NaN for the single-precision +| floating point value `a'. +*-------------------------------------------------------------------------= ---*/ + +float32 float32_silence_nan(float32 a, float_status *status) +{ +#ifdef NO_SIGNALING_NANS + g_assert_not_reached(); +#else + if (status->snan_bit_is_one) { +# ifdef TARGET_HPPA + a &=3D ~0x00400000; + a |=3D 0x00200000; + return a; +# else + return float32_default_nan(status); +# endif + } else { + return a | (1 << 22); + } +#endif +} /*------------------------------------------------------------------------= ---- | Returns a quiet NaN if the single-precision floating point value `a' is a | signaling NaN; otherwise returns `a'. *-------------------------------------------------------------------------= ---*/ =20 -float32 float32_maybe_silence_nan(float32 a_, float_status *status) +float32 float32_maybe_silence_nan(float32 a, float_status *status) { - if (float32_is_signaling_nan(a_, status)) { - if (status->snan_bit_is_one) { -#ifdef TARGET_HPPA - uint32_t a =3D float32_val(a_); - a &=3D ~0x00400000; - a |=3D 0x00200000; - return make_float32(a); -#else - return float32_default_nan(status); -#endif - } else { - uint32_t a =3D float32_val(a_); - a |=3D (1 << 22); - return make_float32(a); - } + if (float32_is_signaling_nan(a, status)) { + float32_silence_nan(a, status); } - return a_; + return a; } =20 /*------------------------------------------------------------------------= ---- @@ -736,30 +759,41 @@ int float64_is_signaling_nan(float64 a_, float_status= *status) #endif } =20 +/*------------------------------------------------------------------------= ---- +| Returns a quiet NaN from a signalling NaN for the double-precision +| floating point value `a'. +*-------------------------------------------------------------------------= ---*/ + +float64 float64_silence_nan(float64 a, float_status *status) +{ +#ifdef NO_SIGNALING_NANS + g_assert_not_reached(); +#else + if (status->snan_bit_is_one) { +# ifdef TARGET_HPPA + a &=3D ~0x0008000000000000ULL; + a |=3D 0x0004000000000000ULL; + return a; +# else + return float64_default_nan(status); +# endif + } else { + return a | LIT64(0x0008000000000000); + } +#endif +} + /*------------------------------------------------------------------------= ---- | Returns a quiet NaN if the double-precision floating point value `a' is a | signaling NaN; otherwise returns `a'. *-------------------------------------------------------------------------= ---*/ =20 -float64 float64_maybe_silence_nan(float64 a_, float_status *status) +float64 float64_maybe_silence_nan(float64 a, float_status *status) { - if (float64_is_signaling_nan(a_, status)) { - if (status->snan_bit_is_one) { -#ifdef TARGET_HPPA - uint64_t a =3D float64_val(a_); - a &=3D ~0x0008000000000000ULL; - a |=3D 0x0004000000000000ULL; - return make_float64(a); -#else - return float64_default_nan(status); -#endif - } else { - uint64_t a =3D float64_val(a_); - a |=3D LIT64(0x0008000000000000); - return make_float64(a); - } + if (float64_is_signaling_nan(a, status)) { + return float64_silence_nan(a, status); } - return a_; + return a; } =20 /*------------------------------------------------------------------------= ---- @@ -897,6 +931,25 @@ int floatx80_is_signaling_nan(floatx80 a, float_status= *status) #endif } =20 +/*------------------------------------------------------------------------= ---- +| Returns a quiet NaN from a signalling NaN for the extended double-precis= ion +| floating point value `a'. +*-------------------------------------------------------------------------= ---*/ + +floatx80 floatx80_silence_nan(floatx80 a, float_status *status) +{ +#ifdef NO_SIGNALING_NANS + g_assert_not_reached(); +#else + if (status->snan_bit_is_one) { + return floatx80_default_nan(status); + } else { + a.low |=3D LIT64(0xC000000000000000); + return a; + } +#endif +} + /*------------------------------------------------------------------------= ---- | Returns a quiet NaN if the extended double-precision floating point value | `a' is a signaling NaN; otherwise returns `a'. @@ -905,12 +958,7 @@ int floatx80_is_signaling_nan(floatx80 a, float_status= *status) floatx80 floatx80_maybe_silence_nan(floatx80 a, float_status *status) { if (floatx80_is_signaling_nan(a, status)) { - if (status->snan_bit_is_one) { - a =3D floatx80_default_nan(status); - } else { - a.low |=3D LIT64(0xC000000000000000); - return a; - } + return floatx80_silence_nan(a, status); } return a; } @@ -1044,6 +1092,25 @@ int float128_is_signaling_nan(float128 a, float_stat= us *status) #endif } =20 +/*------------------------------------------------------------------------= ---- +| Returns a quiet NaN from a signalling NaN for the quadruple-precision +| floating point value `a'. +*-------------------------------------------------------------------------= ---*/ + +float128 float128_silence_nan(float128 a, float_status *status) +{ +#ifdef NO_SIGNALING_NANS + g_assert_not_reached(); +#else + if (status->snan_bit_is_one) { + return float128_default_nan(status); + } else { + a.high |=3D LIT64(0x0000800000000000); + return a; + } +#endif +} + /*------------------------------------------------------------------------= ---- | Returns a quiet NaN if the quadruple-precision floating point value `a' = is | a signaling NaN; otherwise returns `a'. @@ -1052,12 +1119,7 @@ int float128_is_signaling_nan(float128 a, float_stat= us *status) float128 float128_maybe_silence_nan(float128 a, float_status *status) { if (float128_is_signaling_nan(a, status)) { - if (status->snan_bit_is_one) { - a =3D float128_default_nan(status); - } else { - a.high |=3D LIT64(0x0000800000000000); - return a; - } + return float128_silence_nan(a, status); } return a; } diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 01ef1c6b81..a6860e858d 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -257,6 +257,7 @@ int float16_compare_quiet(float16, float16, float_statu= s *status); =20 int float16_is_quiet_nan(float16, float_status *status); int float16_is_signaling_nan(float16, float_status *status); +float16 float16_silence_nan(float16, float_status *status); float16 float16_maybe_silence_nan(float16, float_status *status); =20 static inline int float16_is_any_nan(float16 a) @@ -368,6 +369,7 @@ float32 float32_minnummag(float32, float32, float_statu= s *status); float32 float32_maxnummag(float32, float32, float_status *status); int float32_is_quiet_nan(float32, float_status *status); int float32_is_signaling_nan(float32, float_status *status); +float32 float32_silence_nan(float32, float_status *status); float32 float32_maybe_silence_nan(float32, float_status *status); float32 float32_scalbn(float32, int, float_status *status); =20 @@ -497,6 +499,7 @@ float64 float64_minnummag(float64, float64, float_statu= s *status); float64 float64_maxnummag(float64, float64, float_status *status); int float64_is_quiet_nan(float64 a, float_status *status); int float64_is_signaling_nan(float64, float_status *status); +float64 float64_silence_nan(float64, float_status *status); float64 float64_maybe_silence_nan(float64, float_status *status); float64 float64_scalbn(float64, int, float_status *status); =20 @@ -600,6 +603,7 @@ int floatx80_compare(floatx80, floatx80, float_status *= status); int floatx80_compare_quiet(floatx80, floatx80, float_status *status); int floatx80_is_quiet_nan(floatx80, float_status *status); int floatx80_is_signaling_nan(floatx80, float_status *status); +floatx80 floatx80_silence_nan(floatx80, float_status *status); floatx80 floatx80_maybe_silence_nan(floatx80, float_status *status); floatx80 floatx80_scalbn(floatx80, int, float_status *status); =20 @@ -811,6 +815,7 @@ int float128_compare(float128, float128, float_status *= status); int float128_compare_quiet(float128, float128, float_status *status); int float128_is_quiet_nan(float128, float_status *status); int float128_is_signaling_nan(float128, float_status *status); +float128 float128_silence_nan(float128, float_status *status); float128 float128_maybe_silence_nan(float128, float_status *status); float128 float128_scalbn(float128, int, float_status *status); =20 --=20 2.17.0 From nobody Wed Oct 29 20:33:39 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525999769007266.42491357798656; Thu, 10 May 2018 17:49:29 -0700 (PDT) Received: from localhost ([::1]:36178 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwFU-0004DY-7r for importer@patchew.org; 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X-Received-From: 2607:f8b0:400e:c05::241 Subject: [Qemu-devel] [PATCH 03/19] fpu/softfloat: Move softfloat-specialize.h below FloatParts definition X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" We want to be able to specialize on the canonical representation. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- fpu/softfloat.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index e7c8213a5e..5e4982b035 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -95,16 +95,6 @@ this code that are retained. *-------------------------------------------------------------------------= ---*/ #include "fpu/softfloat-macros.h" =20 -/*------------------------------------------------------------------------= ---- -| Functions and definitions to determine: (1) whether tininess for underf= low -| is detected before or after rounding by default, (2) what (if anything) -| happens when exceptions are raised, (3) how signaling NaNs are distingui= shed -| from quiet NaNs, (4) the default generated quiet NaNs, and (5) how NaNs -| are propagated from function inputs to output. These details are target- -| specific. -*-------------------------------------------------------------------------= ---*/ -#include "softfloat-specialize.h" - /*------------------------------------------------------------------------= ---- | Returns the fraction bits of the half-precision floating-point value `a'. *-------------------------------------------------------------------------= ---*/ @@ -241,6 +231,16 @@ typedef struct { bool arm_althp; } FloatFmt; =20 +/*------------------------------------------------------------------------= ---- +| Functions and definitions to determine: (1) whether tininess for underf= low +| is detected before or after rounding by default, (2) what (if anything) +| happens when exceptions are raised, (3) how signaling NaNs are distingui= shed +| from quiet NaNs, (4) the default generated quiet NaNs, and (5) how NaNs +| are propagated from function inputs to output. These details are target- +| specific. +*-------------------------------------------------------------------------= ---*/ +#include "softfloat-specialize.h" + /* Expand fields based on the size of exponent and fraction */ #define FLOAT_PARAMS(E, F) \ .exp_size =3D E, \ --=20 2.17.0 From nobody Wed Oct 29 20:33:39 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525999580675537.8010903411612; Thu, 10 May 2018 17:46:20 -0700 (PDT) Received: from localhost ([::1]:36167 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwCN-0001vn-NQ for importer@patchew.org; Thu, 10 May 2018 20:46:15 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51965) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwA8-00079c-7Q for qemu-devel@nongnu.org; Thu, 10 May 2018 20:43:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGwA7-0004pF-DI for qemu-devel@nongnu.org; Thu, 10 May 2018 20:43:56 -0400 Received: from mail-pg0-x242.google.com ([2607:f8b0:400e:c05::242]:38658) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGwA7-0004ot-8E for qemu-devel@nongnu.org; Thu, 10 May 2018 20:43:55 -0400 Received: by mail-pg0-x242.google.com with SMTP id n9-v6so1676603pgq.5 for ; Thu, 10 May 2018 17:43:55 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id y24-v6sm4216728pfn.23.2018.05.10.17.43.52 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 17:43:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=xs8P5M7KpsqqVNlyQrI1ugiUrrNAY5zDyuoghvVlkBg=; b=HhNlsV8ipXHYmwrqHYDIu7X1AGVgFdFBzHYH8LrsghYMPiqcbSreIUGTzP74V+fuzz dC92ti/8eJpzbWWpvyUZjnX3sAiIWmS/R9AaNuybniTi8wh1wVnnWmN0lHHeR3DJXSWp 8SGDc8K/wmuMVhGge2uAe1t2T6jAkTFeiW8Ho= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=xs8P5M7KpsqqVNlyQrI1ugiUrrNAY5zDyuoghvVlkBg=; b=VNbDXbsEzPVDqUOPTV3U6FruHgBB0XgBC6vJhLJ6/h5oT/gyhBy+bxOep4bF/RRlM8 kzPs6PfHxrJQunufibr3trnJDq2GtuihCC6hIkpgqI918Db7jTQY8P3v2or0iX5jBLve rUXjVpWsi8QNxjDvgbyGhy3IJdf6vwnCtSGu8Mawhx27KysRwGTKmtm5AIpt8bu7QkXi nRlafUetJ73tPmO44fhqq3WEYBP5rTBqTchzCbJt9KUXt7LZS/m+QqfbzfM/gNTwx/ks rH16nLIahlCKN0VqLs1tNmfxG+B98xbH9zw/LHVr66NtiAXwB/7jvSuc5kQjCQMkEs49 wV4Q== X-Gm-Message-State: ALKqPwdYMgv9iCFlKg3bvoid3X6o3UvqyKgmPQg8uacpOSWIScrIKh+z /HHPSCpzerb5QVYPYJ2E0TGIEr97EQo= X-Google-Smtp-Source: AB8JxZotueHTjij7rm6kDoi8s0pF3OhDsE9e2zBQCxoADzY1NvYb32MxwM11RVEGN/jx9KuZxVOwTg== X-Received: by 2002:a63:ae49:: with SMTP id e9-v6mr2670256pgp.38.1525999433935; Thu, 10 May 2018 17:43:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 17:43:30 -0700 Message-Id: <20180511004345.26708-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511004345.26708-1-richard.henderson@linaro.org> References: <20180511004345.26708-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::242 Subject: [Qemu-devel] [PATCH 04/19] fpu/softfloat: Canonicalize NaN fraction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Shift the NaN fraction to a canonical position, much like we do for the fraction of normal numbers. Immediately, this simplifies the float-to-float conversion. Later, this will facilitate manipulation of NaNs within the shared code paths. Signed-off-by: Richard Henderson --- fpu/softfloat.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 5e4982b035..df377b6314 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -329,10 +329,11 @@ static FloatParts canonicalize(FloatParts part, const= FloatFmt *parm, if (part.frac =3D=3D 0) { part.cls =3D float_class_inf; } else { + part.frac <<=3D parm->frac_shift; #ifdef NO_SIGNALING_NANS part.cls =3D float_class_qnan; #else - int64_t msb =3D part.frac << (parm->frac_shift + 2); + int64_t msb =3D part.frac << 2; if ((msb < 0) =3D=3D status->snan_bit_is_one) { part.cls =3D float_class_snan; } else { @@ -498,6 +499,7 @@ static FloatParts round_canonical(FloatParts p, float_s= tatus *s, case float_class_qnan: case float_class_snan: exp =3D exp_max; + frac >>=3D parm->frac_shift; break; =20 default: @@ -1264,13 +1266,10 @@ static FloatParts float_to_float(FloatParts a, } =20 /* - * Our only option now is to "re-pack" the NaN. As the - * canonilization process doesn't mess with fraction bits for - * NaNs we do it all here. We also reset a.exp to the - * destination format exp_max as the maybe_silence_nan code - * assumes it is correct (which is would be for non-conversions). + * Reset a.exp to the destination format exp_max as + * the maybe_silence_nan code assumes it is correct + * (which it would be for non-conversions). */ - a.frac =3D a.frac << (64 - srcf->frac_size) >> (64 - dstf->frac_si= ze); a.exp =3D dstf->exp_max; a.cls =3D float_class_msnan; } --=20 2.17.0 From nobody Wed Oct 29 20:33:39 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525999768276200.59598513347783; Thu, 10 May 2018 17:49:28 -0700 (PDT) Received: from localhost ([::1]:36179 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwFT-0004EL-CK for importer@patchew.org; Thu, 10 May 2018 20:49:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51977) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwAB-00079u-9C for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGwA8-0004pj-SO for qemu-devel@nongnu.org; Thu, 10 May 2018 20:43:57 -0400 Received: from mail-pl0-x244.google.com ([2607:f8b0:400e:c01::244]:45465) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGwA8-0004pN-Mn for qemu-devel@nongnu.org; Thu, 10 May 2018 20:43:56 -0400 Received: by mail-pl0-x244.google.com with SMTP id bi12-v6so2254001plb.12 for ; Thu, 10 May 2018 17:43:56 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id y24-v6sm4216728pfn.23.2018.05.10.17.43.53 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 17:43:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lRf4yJ1cSXJuJwZa6kKK3WAqrniWqnrrAqqQnzy7Auw=; b=Fprt7CFHjKM9bhr9BzuWlkVebDj5t/FXN9n3DnZJOSHYmXy7K5ORsYi7WbJzNql9Qf hnsEademRDA0e3hZ6sqTIqwtaZZtc1qxwiL2buDGGj38D28mpEte+yxgODK7yzqTIKMh 95PqMtcm2RjUgQJQf4U+ajHU134HSkd8Cnbu0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lRf4yJ1cSXJuJwZa6kKK3WAqrniWqnrrAqqQnzy7Auw=; b=fKs7tzouIaGGKvctQ4+c2Ur63KFSNrgHqG2xz62wIkPYSsHhmhkPRnA7P28wwmA684 IZ/Rd3fhiENwFFAqZELVBMo+OhhGD9h1k+aiGGPDABiQnkEKWwh5Pe5ihfqx3lNuGQPK HyheWpXXSm2IppQ8ZSXV96QrPvUbQZVvAJOTKi3Kfmy/vobxDKR/5ksxFnqQFtv/NvPJ heVjXUxAO2nz6SLc9XySz+jQqTAEecDqKNgb+LnPK22UGgR4Tmip2nrUpMwNDuLQsbs+ /U17tOUlaXHU+D723K1CFn2+y0lEDHkplwePDfu58dEAtfvM6RVzTMxXoe7XoO11ZnDh UxMA== X-Gm-Message-State: ALKqPwfnO/1S9S71MNworwMvk6e6Oi8Phot90biOV+HeOWu1TKldvBVI FvoreMZtI/HUqGLNmkg4pxDitfh2pRs= X-Google-Smtp-Source: AB8JxZpJafs+Ux4UzqMIadDQ8LJ0/eIHdXw8EsHuQCXEgPbvJjnQGGWjv7aA48gDNm4eJNuBKffhdg== X-Received: by 2002:a17:902:7896:: with SMTP id q22-v6mr3382409pll.243.1525999435178; Thu, 10 May 2018 17:43:55 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 17:43:31 -0700 Message-Id: <20180511004345.26708-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511004345.26708-1-richard.henderson@linaro.org> References: <20180511004345.26708-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::244 Subject: [Qemu-devel] [PATCH 05/19] fpu/softfloat: Introduce parts_is_snan_frac X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- fpu/softfloat-specialize.h | 15 +++++++++++++++ fpu/softfloat.c | 12 ++---------- 2 files changed, 17 insertions(+), 10 deletions(-) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index b59356f6a5..82d7a030e7 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -86,6 +86,21 @@ this code that are retained. #define NO_SIGNALING_NANS 1 #endif =20 +/*------------------------------------------------------------------------= ---- +| For the deconstructed floating-point with fraction FRAC, return true +| if the fraction represents a signalling NaN; otherwise false. +*-------------------------------------------------------------------------= ---*/ + +static bool parts_is_snan_frac(uint64_t frac, float_status *status) +{ +#ifdef NO_SIGNALING_NANS + return false; +#else + flag msb =3D extract64(frac, DECOMPOSED_BINARY_POINT - 1, 1); + return msb =3D=3D status->snan_bit_is_one; +#endif +} + /*------------------------------------------------------------------------= ---- | The pattern for a default generated half-precision NaN. *-------------------------------------------------------------------------= ---*/ diff --git a/fpu/softfloat.c b/fpu/softfloat.c index df377b6314..6dfc992a7f 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -330,16 +330,8 @@ static FloatParts canonicalize(FloatParts part, const = FloatFmt *parm, part.cls =3D float_class_inf; } else { part.frac <<=3D parm->frac_shift; -#ifdef NO_SIGNALING_NANS - part.cls =3D float_class_qnan; -#else - int64_t msb =3D part.frac << 2; - if ((msb < 0) =3D=3D status->snan_bit_is_one) { - part.cls =3D float_class_snan; - } else { - part.cls =3D float_class_qnan; - } -#endif + part.cls =3D (parts_is_snan_frac(part.frac, status) + ? float_class_snan : float_class_qnan); } } else if (part.exp =3D=3D 0) { if (likely(part.frac =3D=3D 0)) { --=20 2.17.0 From nobody Wed Oct 29 20:33:39 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525999946870920.3006883657004; Thu, 10 May 2018 17:52:26 -0700 (PDT) Received: from localhost ([::1]:36194 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwID-0007wR-8N for importer@patchew.org; Thu, 10 May 2018 20:52:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51991) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwAB-0007AG-LB for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGwAA-0004q6-9m for qemu-devel@nongnu.org; Thu, 10 May 2018 20:43:59 -0400 Received: from mail-pl0-x242.google.com ([2607:f8b0:400e:c01::242]:37381) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGwAA-0004pu-2J for qemu-devel@nongnu.org; Thu, 10 May 2018 20:43:58 -0400 Received: by mail-pl0-x242.google.com with SMTP id f7-v6so2266816plr.4 for ; Thu, 10 May 2018 17:43:57 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id y24-v6sm4216728pfn.23.2018.05.10.17.43.55 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 17:43:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tFLJR1pEbvSdgTdtmGzVTsnU5+kht680tv9A+aKFDJs=; b=g9rLRavyPOkkEqcT/ND5osw0NtJyWMhNyrOrKzz4FoyyntVVysZDwYh/I+zS5JRhl9 CJJDZdsK6HfGedEMlPhSSaq2MqdpseelbQJHobSaO+pzC7kOOxIAD6HMSn/y5+5dNpv7 ViuYdBShROOrFhZT4f5k0KC/hYTbsN+TO+l+k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tFLJR1pEbvSdgTdtmGzVTsnU5+kht680tv9A+aKFDJs=; b=kewOXEpQHoC27nwvyr/4OK/bdGFKKpgaoj0EC0lj5LOixexNBwWWFW7QcaUZhgC5Bh lBta9vKprpcn6UCcs6R6zD+TwDUrEoz2D9Z4/zzQgRxj40vq6gaimvu0DAXTjCyBRSs6 gwbbVgWKeNlj6ctm4ZOmQPZTn3bQEk1Eupe13Bar4N5Ad/X9HN+AERyPhqFtphURpEHl xTQdD7URwDXqe+99w4sLWnQplAtG+Y5vshbW+23SmO3NOC326jZR5SQWBvmZH595thZR ETDkhJD0B/AUDdWXq22VEsv1cNmgntlJ5ETe/lE4HIyz4ZHzBKqY1TotXsnIgcw+APC/ 3Q1Q== X-Gm-Message-State: ALKqPwcvHD5v0roNVoQ8LG3D4KtoGoQUZUb1lflxb+NY2tjv5ApxQ3pK qua+RBGOBk/+JQaDYpgX2p4RssvEhmc= X-Google-Smtp-Source: AB8JxZorbgna2HotKg63N2eguYkxYwhkcQlFOaPFK7Tp6OtCqcHMdXyyt9g5N+QaI8koVk0m96+nWg== X-Received: by 2002:a17:902:462:: with SMTP id 89-v6mr3278657ple.300.1525999436668; Thu, 10 May 2018 17:43:56 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 17:43:32 -0700 Message-Id: <20180511004345.26708-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511004345.26708-1-richard.henderson@linaro.org> References: <20180511004345.26708-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::242 Subject: [Qemu-devel] [PATCH 06/19] fpu/softfloat: Replace float_class_dnan with parts_default_nan X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" With a canonical representation of NaNs, we can return the default nan directly rather than delay the expansion until the final format is known. Signed-off-by: Richard Henderson --- fpu/softfloat-specialize.h | 37 +++++++++++++++++++++++++++++++++++++ fpu/softfloat.c | 38 ++++++++++++-------------------------- 2 files changed, 49 insertions(+), 26 deletions(-) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 82d7a030e7..2ad524b11e 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -101,6 +101,43 @@ static bool parts_is_snan_frac(uint64_t frac, float_st= atus *status) #endif } =20 +/*------------------------------------------------------------------------= ---- +| The pattern for a default generated deconstructed floating-point NaN. +*-------------------------------------------------------------------------= ---*/ + +static FloatParts parts_default_nan(float_status *status) +{ + bool sign =3D 0; + uint64_t frac; + +#if defined(TARGET_SPARC) || defined(TARGET_M68K) + frac =3D (1ULL << DECOMPOSED_BINARY_POINT) - 1; +#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) = || \ + defined(TARGET_S390X) || defined(TARGET_RISCV) + frac =3D 1ULL << (DECOMPOSED_BINARY_POINT - 1); +#elif defined(TARGET_HPPA) + frac =3D 1ULL << (DECOMPOSED_BINARY_POINT - 2); +#else + if (status->snan_bit_is_one) { + frac =3D (1ULL << (DECOMPOSED_BINARY_POINT - 1)) - 1; + } else { +#if defined(TARGET_MIPS) + frac =3D 1ULL << (DECOMPOSED_BINARY_POINT - 1); +#else + frac =3D 1ULL << (DECOMPOSED_BINARY_POINT - 1); + sign =3D 1; +#endif + } +#endif + + return (FloatParts) { + .cls =3D float_class_qnan, + .sign =3D sign, + .exp =3D INT_MAX, + .frac =3D frac + }; +} + /*------------------------------------------------------------------------= ---- | The pattern for a default generated half-precision NaN. *-------------------------------------------------------------------------= ---*/ diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 6dfc992a7f..01036b158e 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -179,7 +179,6 @@ typedef enum __attribute__ ((__packed__)) { float_class_inf, float_class_qnan, /* all NaNs from here */ float_class_snan, - float_class_dnan, float_class_msnan, /* maybe silenced */ } FloatClass; =20 @@ -521,8 +520,6 @@ static float16 float16a_round_pack_canonical(const Floa= tFmt *params, FloatParts p, float_status *s) { switch (p.cls) { - case float_class_dnan: - return float16_default_nan(s); case float_class_msnan: return float16_maybe_silence_nan(float16_pack_raw(p), s); default: @@ -544,8 +541,6 @@ static FloatParts float32_unpack_canonical(float32 f, f= loat_status *s) static float32 float32_round_pack_canonical(FloatParts p, float_status *s) { switch (p.cls) { - case float_class_dnan: - return float32_default_nan(s); case float_class_msnan: return float32_maybe_silence_nan(float32_pack_raw(p), s); default: @@ -562,8 +557,6 @@ static FloatParts float64_unpack_canonical(float64 f, f= loat_status *s) static float64 float64_round_pack_canonical(FloatParts p, float_status *s) { switch (p.cls) { - case float_class_dnan: - return float64_default_nan(s); case float_class_msnan: return float64_maybe_silence_nan(float64_pack_raw(p), s); default: @@ -595,7 +588,7 @@ static FloatParts return_nan(FloatParts a, float_status= *s) /* fall through */ case float_class_qnan: if (s->default_nan_mode) { - a.cls =3D float_class_dnan; + return parts_default_nan(s); } break; =20 @@ -612,7 +605,7 @@ static FloatParts pick_nan(FloatParts a, FloatParts b, = float_status *s) } =20 if (s->default_nan_mode) { - a.cls =3D float_class_dnan; + return parts_default_nan(s); } else { if (pickNaN(is_qnan(a.cls), is_snan(a.cls), is_qnan(b.cls), is_snan(b.cls), @@ -633,7 +626,7 @@ static FloatParts pick_nan_muladd(FloatParts a, FloatPa= rts b, FloatParts c, } =20 if (s->default_nan_mode) { - a.cls =3D float_class_dnan; + return parts_default_nan(s); } else { switch (pickNaNMulAdd(is_qnan(a.cls), is_snan(a.cls), is_qnan(b.cls), is_snan(b.cls), @@ -648,8 +641,7 @@ static FloatParts pick_nan_muladd(FloatParts a, FloatPa= rts b, FloatParts c, a =3D c; break; case 3: - a.cls =3D float_class_dnan; - return a; + return parts_default_nan(s); default: g_assert_not_reached(); } @@ -703,7 +695,7 @@ static FloatParts addsub_floats(FloatParts a, FloatPart= s b, bool subtract, if (a.cls =3D=3D float_class_inf) { if (b.cls =3D=3D float_class_inf) { float_raise(float_flag_invalid, s); - a.cls =3D float_class_dnan; + return parts_default_nan(s); } return a; } @@ -849,7 +841,7 @@ static FloatParts mul_floats(FloatParts a, FloatParts b= , float_status *s) if ((a.cls =3D=3D float_class_inf && b.cls =3D=3D float_class_zero) || (a.cls =3D=3D float_class_zero && b.cls =3D=3D float_class_inf)) { s->float_exception_flags |=3D float_flag_invalid; - a.cls =3D float_class_dnan; + a =3D parts_default_nan(s); a.sign =3D sign; return a; } @@ -929,8 +921,7 @@ static FloatParts muladd_floats(FloatParts a, FloatPart= s b, FloatParts c, =20 if (inf_zero) { s->float_exception_flags |=3D float_flag_invalid; - a.cls =3D float_class_dnan; - return a; + return parts_default_nan(s); } =20 if (flags & float_muladd_negate_c) { @@ -954,12 +945,12 @@ static FloatParts muladd_floats(FloatParts a, FloatPa= rts b, FloatParts c, if (c.cls =3D=3D float_class_inf) { if (p_class =3D=3D float_class_inf && p_sign !=3D c.sign) { s->float_exception_flags |=3D float_flag_invalid; - a.cls =3D float_class_dnan; + return parts_default_nan(s); } else { a.cls =3D float_class_inf; a.sign =3D c.sign ^ sign_flip; + return a; } - return a; } =20 if (p_class =3D=3D float_class_inf) { @@ -1169,8 +1160,7 @@ static FloatParts div_floats(FloatParts a, FloatParts= b, float_status *s) && (a.cls =3D=3D float_class_inf || a.cls =3D=3D float_class_zero)) { s->float_exception_flags |=3D float_flag_invalid; - a.cls =3D float_class_dnan; - return a; + return parts_default_nan(s); } /* Inf / x or 0 / x */ if (a.cls =3D=3D float_class_inf || a.cls =3D=3D float_class_zero) { @@ -1253,8 +1243,7 @@ static FloatParts float_to_float(FloatParts a, } =20 if (s->default_nan_mode) { - a.cls =3D float_class_dnan; - return a; + return parts_default_nan(s); } =20 /* @@ -1470,7 +1459,6 @@ static int64_t round_to_int_and_pack(FloatParts in, i= nt rmode, switch (p.cls) { case float_class_snan: case float_class_qnan: - case float_class_dnan: case float_class_msnan: s->float_exception_flags =3D orig_flags | float_flag_invalid; return max; @@ -1562,7 +1550,6 @@ static uint64_t round_to_uint_and_pack(FloatParts in,= int rmode, uint64_t max, switch (p.cls) { case float_class_snan: case float_class_qnan: - case float_class_dnan: case float_class_msnan: s->float_exception_flags =3D orig_flags | float_flag_invalid; return max; @@ -2063,8 +2050,7 @@ static FloatParts sqrt_float(FloatParts a, float_stat= us *s, const FloatFmt *p) } if (a.sign) { s->float_exception_flags |=3D float_flag_invalid; - a.cls =3D float_class_dnan; - return a; + return parts_default_nan(s); } if (a.cls =3D=3D float_class_inf) { return a; /* sqrt(+inf) =3D +inf */ --=20 2.17.0 From nobody Wed Oct 29 20:33:39 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id y24-v6sm4216728pfn.23.2018.05.10.17.43.56 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 17:43:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SEKRdcTyNwwbuiIPbI31kImzgppRwEQZQsoiWF6wfUQ=; b=fvYWnZ+TTYVbQ7/E9AJLNj4Y4ZJOlgB3+btBWvHTCsEH0cdgMvgr3i7fdA85LTGBNn t//ezrqEgU9r56Lyjnwr7P0YNqvwTn3vYV3+z0ZPFEuWX1DNN2Y7PSvh60J9jZfCIFSO dft3i8DNdEq2/TpmV4/WO8itpr3aiXhR2gTIs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=SEKRdcTyNwwbuiIPbI31kImzgppRwEQZQsoiWF6wfUQ=; b=pY3GC5QmF3z52kc7bmnu0tEeuBKuUgjKxEmyVE0LrpCg1NaYYuchCs+XN3JZcy0vx/ +MoeVaYxLq5/JkP6S1qqWPu4VsuIK/naZNKiRdveQ577eqwPAU2hTx23Fey0GD4NgBOt JEyrNti9+gyHsVeLwkTav8LBkMZFoVtiLbhB0wNaMiX7xxLIReGcKrQPBmBYXcxBQrNR pHvfhVPbwund+MXjYNm9yt21TrL/G6ZyfRznSLZEoz0JD6JNFLDuBGtcfVx3A1eATP0X dxq8ydOwAsQZdqcQoJlopinNWH76i8G4zXeDDLJjlFlHc+4Tu2v7HfPalYkD5jbLIy1Q 2AHg== X-Gm-Message-State: ALKqPweYo4b4ZxYl+r6iIr6/sQnp/uPa30NEfuKN7jPXzj6MOfX/4IhE 8o+YpgHEvGMdKBRr3nlL4fbD0LlLDcg= X-Google-Smtp-Source: AB8JxZqSleiTOBAZgYN+8WSOFOCtoYjc54RxUhwjJMHlZHHaI4rut9FOuhBvA7fzEi88X7ez1ZgQ7w== X-Received: by 2002:a17:902:784c:: with SMTP id e12-v6mr3355949pln.60.1525999437989; Thu, 10 May 2018 17:43:57 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 17:43:33 -0700 Message-Id: <20180511004345.26708-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511004345.26708-1-richard.henderson@linaro.org> References: <20180511004345.26708-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::243 Subject: [Qemu-devel] [PATCH 07/19] fpu/softfloat: Replace float_class_msnan with parts_silence_nan X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" With a canonical representation of NaNs, we can silence an SNaN immediately rather than delay until the final format is known. Signed-off-by: Richard Henderson --- fpu/softfloat-specialize.h | 23 +++++++++++++++++ fpu/softfloat.c | 51 +++++++++++--------------------------- 2 files changed, 38 insertions(+), 36 deletions(-) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 2ad524b11e..53a4f45a8c 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -138,6 +138,29 @@ static FloatParts parts_default_nan(float_status *stat= us) }; } =20 +/*------------------------------------------------------------------------= ---- +| Returns a quiet NaN from a signalling NaN for the deconstructed +| floating-point parts. +*-------------------------------------------------------------------------= ---*/ + +static FloatParts parts_silence_nan(FloatParts a, float_status *status) +{ +#ifdef NO_SIGNALING_NANS + g_assert_not_reached(); +#elif defined(TARGET_HPPA) + a.frac &=3D ~(1ULL << (DECOMPOSED_BINARY_POINT - 1)); + a.frac |=3D 1ULL << (DECOMPOSED_BINARY_POINT - 2); +#else + if (status->snan_bit_is_one) { + return parts_default_nan(status); + } else { + a.frac |=3D 1ULL << (DECOMPOSED_BINARY_POINT - 1); + } +#endif + a.cls =3D float_class_qnan; + return a; +} + /*------------------------------------------------------------------------= ---- | The pattern for a default generated half-precision NaN. *-------------------------------------------------------------------------= ---*/ diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 01036b158e..cce94136d4 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -179,7 +179,6 @@ typedef enum __attribute__ ((__packed__)) { float_class_inf, float_class_qnan, /* all NaNs from here */ float_class_snan, - float_class_msnan, /* maybe silenced */ } FloatClass; =20 /* @@ -519,13 +518,7 @@ static FloatParts float16_unpack_canonical(float16 f, = float_status *s) static float16 float16a_round_pack_canonical(const FloatFmt *params, FloatParts p, float_status *s) { - switch (p.cls) { - case float_class_msnan: - return float16_maybe_silence_nan(float16_pack_raw(p), s); - default: - p =3D round_canonical(p, s, params); - return float16_pack_raw(p); - } + return float16_pack_raw(round_canonical(p, s, params)); } =20 static float16 float16_round_pack_canonical(FloatParts p, float_status *s) @@ -540,13 +533,7 @@ static FloatParts float32_unpack_canonical(float32 f, = float_status *s) =20 static float32 float32_round_pack_canonical(FloatParts p, float_status *s) { - switch (p.cls) { - case float_class_msnan: - return float32_maybe_silence_nan(float32_pack_raw(p), s); - default: - p =3D round_canonical(p, s, &float32_params); - return float32_pack_raw(p); - } + return float32_pack_raw(round_canonical(p, s, &float32_params)); } =20 static FloatParts float64_unpack_canonical(float64 f, float_status *s) @@ -556,13 +543,7 @@ static FloatParts float64_unpack_canonical(float64 f, = float_status *s) =20 static float64 float64_round_pack_canonical(FloatParts p, float_status *s) { - switch (p.cls) { - case float_class_msnan: - return float64_maybe_silence_nan(float64_pack_raw(p), s); - default: - p =3D round_canonical(p, s, &float64_params); - return float64_pack_raw(p); - } + return float64_pack_raw(round_canonical(p, s, &float64_params)); } =20 /* Simple helpers for checking if what NaN we have */ @@ -570,10 +551,12 @@ static bool is_nan(FloatClass c) { return unlikely(c >=3D float_class_qnan); } + static bool is_snan(FloatClass c) { return c =3D=3D float_class_snan; } + static bool is_qnan(FloatClass c) { return c =3D=3D float_class_qnan; @@ -584,7 +567,7 @@ static FloatParts return_nan(FloatParts a, float_status= *s) switch (a.cls) { case float_class_snan: s->float_exception_flags |=3D float_flag_invalid; - a.cls =3D float_class_msnan; + a =3D parts_silence_nan(a, s); /* fall through */ case float_class_qnan: if (s->default_nan_mode) { @@ -613,7 +596,9 @@ static FloatParts pick_nan(FloatParts a, FloatParts b, = float_status *s) (a.frac =3D=3D b.frac && a.sign < b.sign))) { a =3D b; } - a.cls =3D float_class_msnan; + if (is_snan(a.cls)) { + return parts_silence_nan(a, s); + } } return a; } @@ -645,8 +630,9 @@ static FloatParts pick_nan_muladd(FloatParts a, FloatPa= rts b, FloatParts c, default: g_assert_not_reached(); } - - a.cls =3D float_class_msnan; + if (is_snan(a.cls)) { + return parts_silence_nan(a, s); + } } return a; } @@ -1245,14 +1231,9 @@ static FloatParts float_to_float(FloatParts a, if (s->default_nan_mode) { return parts_default_nan(s); } - - /* - * Reset a.exp to the destination format exp_max as - * the maybe_silence_nan code assumes it is correct - * (which it would be for non-conversions). - */ - a.exp =3D dstf->exp_max; - a.cls =3D float_class_msnan; + if (is_snan(a.cls)) { + return parts_silence_nan(a, s); + } } =20 return a; @@ -1459,7 +1440,6 @@ static int64_t round_to_int_and_pack(FloatParts in, i= nt rmode, switch (p.cls) { case float_class_snan: case float_class_qnan: - case float_class_msnan: s->float_exception_flags =3D orig_flags | float_flag_invalid; return max; case float_class_inf: @@ -1550,7 +1530,6 @@ static uint64_t round_to_uint_and_pack(FloatParts in,= int rmode, uint64_t max, switch (p.cls) { case float_class_snan: case float_class_qnan: - case float_class_msnan: s->float_exception_flags =3D orig_flags | float_flag_invalid; return max; case float_class_inf: --=20 2.17.0 From nobody Wed Oct 29 20:33:39 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525999946875101.27958499834983; Thu, 10 May 2018 17:52:26 -0700 (PDT) Received: from localhost ([::1]:36196 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwIG-0007xt-Hg for importer@patchew.org; Thu, 10 May 2018 20:52:20 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52022) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwAE-0007D0-Gv for qemu-devel@nongnu.org; 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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id y24-v6sm4216728pfn.23.2018.05.10.17.43.58 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 17:43:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SCZeWxjt5hVIQH0cvw2AGs0OE90+4Z8czdb6XdGmI08=; b=U51LXA5BJbGeuwcALE0ikP6QCN8NJlKPk54PwtuKM4wTfjjnQk5lrQx/ObOw5lCt/z AiEnnWkBkrRqNpL/9NW8IwA7yEr3Dg+/1A4/AvyWtzj5D0F0wrF+AiLTAR3iuiuQIF4c 6HPwsSkLhkCBZ1Zp9HeU81sDr3sFbk1l2HIDA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=SCZeWxjt5hVIQH0cvw2AGs0OE90+4Z8czdb6XdGmI08=; b=KnSZ/2pjSB0mEFIYEvKUaOeyRwdkmK3M4vwcNfJXALrYJuHUPZdubUnPrI0fgwYSqL jpcRJiRSUEu0N7beR6v5GIpXNHSyhllT6xoinIJDd8kcYFhhzZc+vncBy/qUUwFPaTj+ ZIw7ZV9WATDH410yIA/y0kV4dh+6CD0bQynn94ffbW2PMnugB3jQxPVOKmFGcjcaq2tm RgyJmyYiKgayucK3fRyKVIQEpq+cc6xOx8cvBOsRl6KJXDRgjbMeiOs8C6jLld+495/5 HIsxU12r3jDC1azVVg9uOO7f8pfvEwyKhK2FTyhyrGCbK3EX5BW7+OnJ9PJid3795nau 593Q== X-Gm-Message-State: ALKqPweA2xt5xvhQVEUT8wCgb2sFoRCwX1YG0nzTt9PCvyJ9VgwfiuZY 62zt2tN6HwKhri+j4XpiLIER+UZeSwA= X-Google-Smtp-Source: AB8JxZr1VkL0bUA3oWARYLBgyg8qLqvb5p/ijgbiQHvW8OQv9XBsbQmTTJT1z6UvV7SBiGEEHLQQEQ== X-Received: by 2002:a17:902:2bc5:: with SMTP id l63-v6mr3248958plb.299.1525999439240; Thu, 10 May 2018 17:43:59 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 17:43:34 -0700 Message-Id: <20180511004345.26708-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511004345.26708-1-richard.henderson@linaro.org> References: <20180511004345.26708-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::241 Subject: [Qemu-devel] [PATCH 08/19] target/arm: Use floatX_silence_nan when we have already checked for SNaN X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- target/arm/helper-a64.c | 6 +++--- target/arm/helper.c | 12 ++++++------ 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index afb25ad20c..976eaba37a 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -366,7 +366,7 @@ float16 HELPER(frecpx_f16)(float16 a, void *fpstp) float16 nan =3D a; if (float16_is_signaling_nan(a, fpst)) { float_raise(float_flag_invalid, fpst); - nan =3D float16_maybe_silence_nan(a, fpst); + nan =3D float16_silence_nan(a, fpst); } if (fpst->default_nan_mode) { nan =3D float16_default_nan(fpst); @@ -395,7 +395,7 @@ float32 HELPER(frecpx_f32)(float32 a, void *fpstp) float32 nan =3D a; if (float32_is_signaling_nan(a, fpst)) { float_raise(float_flag_invalid, fpst); - nan =3D float32_maybe_silence_nan(a, fpst); + nan =3D float32_silence_nan(a, fpst); } if (fpst->default_nan_mode) { nan =3D float32_default_nan(fpst); @@ -424,7 +424,7 @@ float64 HELPER(frecpx_f64)(float64 a, void *fpstp) float64 nan =3D a; if (float64_is_signaling_nan(a, fpst)) { float_raise(float_flag_invalid, fpst); - nan =3D float64_maybe_silence_nan(a, fpst); + nan =3D float64_silence_nan(a, fpst); } if (fpst->default_nan_mode) { nan =3D float64_default_nan(fpst); diff --git a/target/arm/helper.c b/target/arm/helper.c index a5f3d3b7e5..3065045e0c 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11679,7 +11679,7 @@ float16 HELPER(recpe_f16)(float16 input, void *fpst= p) float16 nan =3D f16; if (float16_is_signaling_nan(f16, fpst)) { float_raise(float_flag_invalid, fpst); - nan =3D float16_maybe_silence_nan(f16, fpst); + nan =3D float16_silence_nan(f16, fpst); } if (fpst->default_nan_mode) { nan =3D float16_default_nan(fpst); @@ -11727,7 +11727,7 @@ float32 HELPER(recpe_f32)(float32 input, void *fpst= p) float32 nan =3D f32; if (float32_is_signaling_nan(f32, fpst)) { float_raise(float_flag_invalid, fpst); - nan =3D float32_maybe_silence_nan(f32, fpst); + nan =3D float32_silence_nan(f32, fpst); } if (fpst->default_nan_mode) { nan =3D float32_default_nan(fpst); @@ -11775,7 +11775,7 @@ float64 HELPER(recpe_f64)(float64 input, void *fpst= p) float64 nan =3D f64; if (float64_is_signaling_nan(f64, fpst)) { float_raise(float_flag_invalid, fpst); - nan =3D float64_maybe_silence_nan(f64, fpst); + nan =3D float64_silence_nan(f64, fpst); } if (fpst->default_nan_mode) { nan =3D float64_default_nan(fpst); @@ -11874,7 +11874,7 @@ float16 HELPER(rsqrte_f16)(float16 input, void *fps= tp) float16 nan =3D f16; if (float16_is_signaling_nan(f16, s)) { float_raise(float_flag_invalid, s); - nan =3D float16_maybe_silence_nan(f16, s); + nan =3D float16_silence_nan(f16, s); } if (s->default_nan_mode) { nan =3D float16_default_nan(s); @@ -11918,7 +11918,7 @@ float32 HELPER(rsqrte_f32)(float32 input, void *fps= tp) float32 nan =3D f32; if (float32_is_signaling_nan(f32, s)) { float_raise(float_flag_invalid, s); - nan =3D float32_maybe_silence_nan(f32, s); + nan =3D float32_silence_nan(f32, s); } if (s->default_nan_mode) { nan =3D float32_default_nan(s); @@ -11961,7 +11961,7 @@ float64 HELPER(rsqrte_f64)(float64 input, void *fps= tp) float64 nan =3D f64; if (float64_is_signaling_nan(f64, s)) { float_raise(float_flag_invalid, s); - nan =3D float64_maybe_silence_nan(f64, s); + nan =3D float64_silence_nan(f64, s); } if (s->default_nan_mode) { nan =3D float64_default_nan(s); --=20 2.17.0 From nobody Wed Oct 29 20:33:39 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id y24-v6sm4216728pfn.23.2018.05.10.17.43.59 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 17:43:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=x/uKj0FP6HB3vjVYqoW6L0olniJiV++HivclAh/y0nI=; b=gGl1eLVTeNdnWUpayt4zMXD2ATV9FPA4xBvUMO3g/MkvsYKJxWgdajkQZugKHiaMip RDsJozYh1yXaocOFxxQWnyXQReKKs03HJbMTSmB4IApfZpHBKdUdBv4I8wlN6/9CZMcJ ErBmlXF2nl8PqMu6J74lyZwIoGwmdb7P65dS4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=x/uKj0FP6HB3vjVYqoW6L0olniJiV++HivclAh/y0nI=; b=pp9H2VJY1RWWomTlT6RoE0YYY8CEXQJ3+isuaY7slQPoM56WHsSWtMGO/4tS3kvyJh S5s4ttm7kTbKq/EWSLFoAoJabV9cHfb3zEdQmQyduJQQ3gWW+t1MZgxeg655/YgQBSgz iYf6YVaN4BvrMLHPsFxXNt7NXzblbVxOMZCVKu4TU2PJHogYvx05yJhYWTZ3ge7J1i+d 4F60WDTkTU6Yg28huvUHQXzKeQnVLbqERDgrb8DapsThKsag9gWFjdNJdxUqwyouxOJ2 9Om4Ki9vXbVEvGe8FrxCvFLIksSekzPNqDJmclELdNhfhkH4At/ewBoKeq/cjf8UnIAB GMcQ== X-Gm-Message-State: ALKqPwecUiW675JeDYixCteW+Ti45DFUKzE+ZmnkNU5aB9BivMSMrQDr cbsV+tAmFrCRXqb1NR/ApTaIx5hUFbQ= X-Google-Smtp-Source: AB8JxZoIboRYyFz6hLmBiJU1MzqdM3xAdzgrugCeZLNjoJu5XYvAtJreijim8xYHUVDAPdtD+XoU1g== X-Received: by 2002:a17:902:5481:: with SMTP id e1-v6mr3266094pli.137.1525999440481; Thu, 10 May 2018 17:44:00 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 17:43:35 -0700 Message-Id: <20180511004345.26708-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511004345.26708-1-richard.henderson@linaro.org> References: <20180511004345.26708-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::242 Subject: [Qemu-devel] [PATCH 09/19] target/arm: Remove floatX_maybe_silence_nan from conversions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This is now handled properly by the generic softfloat code. Signed-off-by: Richard Henderson --- target/arm/helper-a64.c | 1 - target/arm/helper.c | 12 ++---------- 2 files changed, 2 insertions(+), 11 deletions(-) diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index 976eaba37a..5e51d1be9d 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -456,7 +456,6 @@ float32 HELPER(fcvtx_f64_to_f32)(float64 a, CPUARMState= *env) set_float_rounding_mode(float_round_to_zero, &tstat); set_float_exception_flags(0, &tstat); r =3D float64_to_float32(a, &tstat); - r =3D float32_maybe_silence_nan(r, &tstat); exflags =3D get_float_exception_flags(&tstat); if (exflags & float_flag_inexact) { r =3D make_float32(float32_val(r) | 1); diff --git a/target/arm/helper.c b/target/arm/helper.c index 3065045e0c..61f8820487 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11369,20 +11369,12 @@ FLOAT_CONVS(ui, d, 64, u) /* floating point conversion */ float64 VFP_HELPER(fcvtd, s)(float32 x, CPUARMState *env) { - float64 r =3D float32_to_float64(x, &env->vfp.fp_status); - /* ARM requires that S<->D conversion of any kind of NaN generates - * a quiet NaN by forcing the most significant frac bit to 1. - */ - return float64_maybe_silence_nan(r, &env->vfp.fp_status); + return float32_to_float64(x, &env->vfp.fp_status); } =20 float32 VFP_HELPER(fcvts, d)(float64 x, CPUARMState *env) { - float32 r =3D float64_to_float32(x, &env->vfp.fp_status); - /* ARM requires that S<->D conversion of any kind of NaN generates - * a quiet NaN by forcing the most significant frac bit to 1. - */ - return float32_maybe_silence_nan(r, &env->vfp.fp_status); + return float64_to_float32(x, &env->vfp.fp_status); } =20 /* VFP3 fixed point conversion. */ --=20 2.17.0 From nobody Wed Oct 29 20:33:39 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526000115387211.8882039181765; Thu, 10 May 2018 17:55:15 -0700 (PDT) Received: from localhost ([::1]:36209 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwL1-0002rw-Ie for importer@patchew.org; Thu, 10 May 2018 20:55:11 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52045) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwAF-0007EP-R2 for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGwAF-0004rc-4z for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:03 -0400 Received: from mail-pg0-x244.google.com ([2607:f8b0:400e:c05::244]:35173) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGwAF-0004rJ-06 for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:03 -0400 Received: by mail-pg0-x244.google.com with SMTP id n1-v6so1682139pgs.2 for ; Thu, 10 May 2018 17:44:02 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id y24-v6sm4216728pfn.23.2018.05.10.17.44.00 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 17:44:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=yyAYGNdO4kkJBfymYFw36wtSVFsJ2je7s9XYrOFvLZ0=; b=kC/b2zQwKMhcB8dYOEW/kJILFyB8bNAKmFsYs/ysW0qOybnymDws2lMsQL9N4xgf/E vhFd5pbgDUqCLon3Sr/GV/12pfGCeRAzPEImrnKWAFSXXZtRqGYy3Mawea1Bpo3JsO3Q vpBEK91tRgsH+KjhAS+6TJBQw9gtMNdykDzCg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=yyAYGNdO4kkJBfymYFw36wtSVFsJ2je7s9XYrOFvLZ0=; b=FZffiUG4hpTbz6+dC0u1RrLrKZQCQ6OLIDgEHIoOLz7RM9kLxeICZfV9EJ+5k0kvfY Nzi0xvBlAXTuBTYovmSIpRY/V4tNGfit1Qmvo4KJA5Ld+CS73bpJNzq2BweOgtux/vsX GqPEhOdDhNscq8ygecrMQMax+YQDUdx+qZE+K29lRuhQY5fO9u2aERNyjBx2XjhBPkpI oyEcxndYZtuMerNpu9oSh4miadyTr7of8FYKbtTfkGZyVeByFZl7jf8cBabCasF9XvX/ WhhqZiPZCBvLrC7Ovn1vtWOikv/MGVNlzKljujpq+s+GTxjoDX6yMakKzV45/A1xxPML Zd1Q== X-Gm-Message-State: ALKqPwcFoN7r/hkMu0H28Agj20Qw0FRsrd7K5zYI0oMQmHvTnbGoI3GA GF38+aT5rlE1g8EPTCnd9SqxF5WuDK4= X-Google-Smtp-Source: AB8JxZrvhc6W3P3C4jaEYNyhsS/Add33fCwe0b2DYOLiApkO6wYRkaFvQLmGzrlKVLJPdT5Y3+5sYA== X-Received: by 2002:a63:7f07:: with SMTP id a7-v6mr2709630pgd.173.1525999441704; Thu, 10 May 2018 17:44:01 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 17:43:36 -0700 Message-Id: <20180511004345.26708-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511004345.26708-1-richard.henderson@linaro.org> References: <20180511004345.26708-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::244 Subject: [Qemu-devel] [PATCH 10/19] target/hppa: Remove floatX_maybe_silence_nan from conversions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This is now handled properly by the generic softfloat code. Signed-off-by: Richard Henderson --- target/hppa/op_helper.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index a3af62daf7..912e8d5be4 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -341,7 +341,6 @@ float64 HELPER(fdiv_d)(CPUHPPAState *env, float64 a, fl= oat64 b) float64 HELPER(fcnv_s_d)(CPUHPPAState *env, float32 arg) { float64 ret =3D float32_to_float64(arg, &env->fp_status); - ret =3D float64_maybe_silence_nan(ret, &env->fp_status); update_fr0_op(env, GETPC()); return ret; } @@ -349,7 +348,6 @@ float64 HELPER(fcnv_s_d)(CPUHPPAState *env, float32 arg) float32 HELPER(fcnv_d_s)(CPUHPPAState *env, float64 arg) { float32 ret =3D float64_to_float32(arg, &env->fp_status); - ret =3D float32_maybe_silence_nan(ret, &env->fp_status); update_fr0_op(env, GETPC()); return ret; } --=20 2.17.0 From nobody Wed Oct 29 20:33:39 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15260001104271000.3044133021265; Thu, 10 May 2018 17:55:10 -0700 (PDT) Received: from localhost ([::1]:36208 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwKz-0002qq-KI for importer@patchew.org; Thu, 10 May 2018 20:55:09 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52056) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwAH-0007Fz-4k for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGwAG-0004s2-9J for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:05 -0400 Received: from mail-pg0-x244.google.com ([2607:f8b0:400e:c05::244]:40675) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGwAG-0004rr-3z for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:04 -0400 Received: by mail-pg0-x244.google.com with SMTP id l2-v6so1677948pgc.7 for ; Thu, 10 May 2018 17:44:03 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id y24-v6sm4216728pfn.23.2018.05.10.17.44.01 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 17:44:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=MO0MpJeL1UwzyiS4i/686Xk7sWO20/M2TQYrWFKjaEs=; b=Lg63w6oDTw+dw2N87sThQJrkPuOrkWOihop4snraMepHuPReIRb59GzLBt/hFf0MyR VRYR1o7M6CQhRh9lZ0/VbsK3QiHimYjJdIywnMnuEGfvetBph6r3/0nsgGaL4LHwpmrB wMSlrLrCq7xk3064ueVLCCWa+w4wmRkP/LM8Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=MO0MpJeL1UwzyiS4i/686Xk7sWO20/M2TQYrWFKjaEs=; b=dHq3WG//A3vq/bfM7Zdysn7Bl5mj3nqC8/mkCkkjONQpHvZf/+iT1SDTjpB6iljGKV thykw2AWDS7M8uZPJ6/7oveFrDjh80asuRt0VCHr3fs7ZE58+3sYWKDJEOcKv+qGXoze 5sCvsrs2xODG0KCd7WfirZmCBo9YFJLw8SN6hoS1gfySY+9VbQyvJDVkvpONz1SjmLnm FvI5T2QpG3A6oeUyiwCtIM3Opl3w1QZoeY645STyZMdlYeub9CDVulzMwqE037lPhqI+ OxE+e5Z1m/JKxYjmwRWKw8HCw58i6KWswd1/bccI4wxn3HZ7QPED5poRT4kOtZ+w6XyD aTzg== X-Gm-Message-State: ALKqPwfvrgKRqkZ7qTjgvZ2mI812tsB5oPhpBnr/iELs7nqY65mh9pPN ABh84WMKHvxSQ6JvcdoezKwF9mx+G+M= X-Google-Smtp-Source: AB8JxZq2nzuoO/CYRWkQY9+jSjWAKS3XA/nxro6GEUtMpayrqUu1+CQuXVgXPlzkfGBiaLZtqWqIlw== X-Received: by 2002:a65:42cd:: with SMTP id l13-v6mr2680012pgp.74.1525999442901; Thu, 10 May 2018 17:44:02 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 17:43:37 -0700 Message-Id: <20180511004345.26708-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511004345.26708-1-richard.henderson@linaro.org> References: <20180511004345.26708-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::244 Subject: [Qemu-devel] [PATCH 11/19] target/m68k: Use floatX_silence_nan when we have already checked for SNaN X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, Laurent Vivier Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Cc: Laurent Vivier Signed-off-by: Richard Henderson Reviewed-by: Laurent Vivier --- target/m68k/softfloat.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/m68k/softfloat.c b/target/m68k/softfloat.c index e41b07d042..6ec227e20f 100644 --- a/target/m68k/softfloat.c +++ b/target/m68k/softfloat.c @@ -31,13 +31,14 @@ static floatx80 propagateFloatx80NaNOneArg(floatx80 a, = float_status *status) { if (floatx80_is_signaling_nan(a, status)) { float_raise(float_flag_invalid, status); + a =3D floatx80_silence_nan(a, status); } =20 if (status->default_nan_mode) { return floatx80_default_nan(status); } =20 - return floatx80_maybe_silence_nan(a, status); + return a; } =20 /*------------------------------------------------------------------------= ---- --=20 2.17.0 From nobody Wed Oct 29 20:33:39 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525999589278140.2515138854808; Thu, 10 May 2018 17:46:29 -0700 (PDT) Received: from localhost ([::1]:36168 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwCa-00024E-AQ for importer@patchew.org; Thu, 10 May 2018 20:46:28 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52067) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwAI-0007Hj-S1 for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGwAH-0004sS-Sd for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:06 -0400 Received: from mail-pg0-x244.google.com ([2607:f8b0:400e:c05::244]:43673) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGwAH-0004sJ-Ni for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:05 -0400 Received: by mail-pg0-x244.google.com with SMTP id k11-v6so1672800pgo.10 for ; Thu, 10 May 2018 17:44:05 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id y24-v6sm4216728pfn.23.2018.05.10.17.44.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 17:44:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+6dmYgNBq5ftwjyPS2WMF6O8R65wvbccZZc/fwe9HEo=; b=fzQkSLQG90Fw5gXCvFhSGkWwc2ZqkSUdG/MzLogQnHuzv7BZ6LXzF13oYEQr42lDAa dJxzxm14YP9KUlIfsVVBMx/6nrxklE9SAfZqBBaN4ZtXwL441fIYuyZ/oFEveRqLXJ4K Z5NH4tx2lZaJCIy9hnx25wBRptt6GaRhmAIGA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+6dmYgNBq5ftwjyPS2WMF6O8R65wvbccZZc/fwe9HEo=; b=Nhna/XJkoBuQKMoxjMicyLVyit9/i52ReSYyXgKmWNDfkuBqNa6pHWt9MX3axKXW2l McUKTj3cuIDeol9gMQcINZ5R2cZun7CWFytvUvfgVZwkcd1AkC4uyAdHviB5be2Sl1Pp kH+c5TmRlRvr57d2dLvVHDx4mG9dg8IAjqzjfbRVnU/E5m6wUbcPz9UyF1+QsIQJ6Zz7 WTDRh2sFioQaISdYMvWCzBad3MgvcIkvI9VyhAYHIUucVr+Fcomti1wewdXnZTYOBBlO rLEjBzZIlcJYwKdtRaxpZdzwQ9RPcTAELv9Vj2yrc6Wucuk9co9+qorjWb8lC+GB4pXA ra4w== X-Gm-Message-State: ALKqPwcyMeF986qCPGKdEpQ1R+tpQm3Iqv3lyhamK8yHIPFwGq8Iizk5 vl0dqwVwv507HBx6IMT9HjYiR9B7L6c= X-Google-Smtp-Source: AB8JxZr8w3m4NY3aVn6Yl+UbTeD0PL91lTASaebNrE4aiXqxBpTt+Nb/4fDQg7wzaE8cbGuvQwlpuw== X-Received: by 2002:a63:b94a:: with SMTP id v10-v6mr2729019pgo.372.1525999444262; Thu, 10 May 2018 17:44:04 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 17:43:38 -0700 Message-Id: <20180511004345.26708-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511004345.26708-1-richard.henderson@linaro.org> References: <20180511004345.26708-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::244 Subject: [Qemu-devel] [PATCH 12/19] target/mips: Remove floatX_maybe_silence_nan from conversions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Yongbok Kim , alex.bennee@linaro.org, Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This is now handled properly by the generic softfloat code. Cc: Aurelien Jarno Cc: Yongbok Kim Signed-off-by: Richard Henderson --- target/mips/msa_helper.c | 4 ---- target/mips/op_helper.c | 2 -- 2 files changed, 6 deletions(-) diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c index 8fb7a369ca..c74e3cdc65 100644 --- a/target/mips/msa_helper.c +++ b/target/mips/msa_helper.c @@ -1615,7 +1615,6 @@ static inline float16 float16_from_float32(int32_t a,= flag ieee, float16 f_val; =20 f_val =3D float32_to_float16((float32)a, ieee, status); - f_val =3D float16_maybe_silence_nan(f_val, status); =20 return a < 0 ? (f_val | (1 << 15)) : f_val; } @@ -1625,7 +1624,6 @@ static inline float32 float32_from_float64(int64_t a,= float_status *status) float32 f_val; =20 f_val =3D float64_to_float32((float64)a, status); - f_val =3D float32_maybe_silence_nan(f_val, status); =20 return a < 0 ? (f_val | (1 << 31)) : f_val; } @@ -1636,7 +1634,6 @@ static inline float32 float32_from_float16(int16_t a,= flag ieee, float32 f_val; =20 f_val =3D float16_to_float32((float16)a, ieee, status); - f_val =3D float32_maybe_silence_nan(f_val, status); =20 return a < 0 ? (f_val | (1 << 31)) : f_val; } @@ -1646,7 +1643,6 @@ static inline float64 float64_from_float32(int32_t a,= float_status *status) float64 f_val; =20 f_val =3D float32_to_float64((float64)a, status); - f_val =3D float64_maybe_silence_nan(f_val, status); =20 return a < 0 ? (f_val | (1ULL << 63)) : f_val; } diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c index 798cdad030..9025f42366 100644 --- a/target/mips/op_helper.c +++ b/target/mips/op_helper.c @@ -2700,7 +2700,6 @@ uint64_t helper_float_cvtd_s(CPUMIPSState *env, uint3= 2_t fst0) uint64_t fdt2; =20 fdt2 =3D float32_to_float64(fst0, &env->active_fpu.fp_status); - fdt2 =3D float64_maybe_silence_nan(fdt2, &env->active_fpu.fp_status); update_fcr31(env, GETPC()); return fdt2; } @@ -2790,7 +2789,6 @@ uint32_t helper_float_cvts_d(CPUMIPSState *env, uint6= 4_t fdt0) uint32_t fst2; =20 fst2 =3D float64_to_float32(fdt0, &env->active_fpu.fp_status); - fst2 =3D float32_maybe_silence_nan(fst2, &env->active_fpu.fp_status); update_fcr31(env, GETPC()); return fst2; } --=20 2.17.0 From nobody Wed Oct 29 20:33:39 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526000258953895.5853323254494; Thu, 10 May 2018 17:57:38 -0700 (PDT) Received: from localhost ([::1]:36225 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwNJ-0004w6-05 for importer@patchew.org; Thu, 10 May 2018 20:57:33 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52078) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwAK-0007J9-91 for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGwAJ-0004sq-Da for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:08 -0400 Received: from mail-pg0-x244.google.com ([2607:f8b0:400e:c05::244]:37636) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGwAJ-0004sf-7o for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:07 -0400 Received: by mail-pg0-x244.google.com with SMTP id a13-v6so1681391pgu.4 for ; Thu, 10 May 2018 17:44:07 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id y24-v6sm4216728pfn.23.2018.05.10.17.44.04 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 17:44:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Sl9puNuuuPbRgCmqDxPltmj/Vyt5J5Mk/0va5RwJCSQ=; b=cgwbjKgIdktN0HMB6hDc8UTo0nl1Nflj0tKxoz190L6gWU6b6hi1JJnvc7pLhLmjPl y4MkqEqCJ/GyaS976N2ksKDQEXDLVrLIZt/V0ZQLjP8lD4szhmeGYRu6+GOILQrNHGSR MoYTotHdhKGrVz3b1mG621l5SX4Bzt4eU5BnM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Sl9puNuuuPbRgCmqDxPltmj/Vyt5J5Mk/0va5RwJCSQ=; b=szBfO08wHBWG0wlL971cDaF9OdCqAuohRykiuvFmxKkN8FFdE1u4kHQ7GYMLp+ceOG iIfPik2arYPz2+L+4nnFv8Pd2zW7foE4cZSx+AH2QMkc537H8GirITMqX3GkmYGT37WM AScdG4yJfX5wsKoyNw9rCAxLzi9T06KhbOaGS6cn4hbtjq5Q5GkbwO9xT/PPlxUYkS2O QX+cQVeS7w6M4zyNdJDMhWdxTtKVCFMQzVd7j0URCXFQgZPrkBOXpNY1p7flgi/5GURq ii1eGNxkB1jqdFHIL0Q5nplGvW4Jft/rsjRAgPsLm97WYy+n9cJqUVMNLXzn253q5q/f pJ8A== X-Gm-Message-State: ALKqPwex9NStsXW6WTZInS8Jy1mkHLgRYA4jd8jfeyoCp8h4KrWISHk5 7crYw3I66qaRN/VlP4nCqTGqzQB8kTs= X-Google-Smtp-Source: AB8JxZpBhkiVVJwyxHd3IiB05/8OrU+o9II5e95xuxhbfkt2xtdk5sYYD7IODotsJoPGfsKvN/MheQ== X-Received: by 2002:a62:c95c:: with SMTP id k89-v6mr3303589pfg.47.1525999445997; Thu, 10 May 2018 17:44:05 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 17:43:39 -0700 Message-Id: <20180511004345.26708-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511004345.26708-1-richard.henderson@linaro.org> References: <20180511004345.26708-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::244 Subject: [Qemu-devel] [PATCH 13/19] target/riscv: Remove floatX_maybe_silence_nan from conversions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Sagar Karandikar , Bastian Koppelmann , Palmer Dabbelt , Michael Clark , alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This is now handled properly by the generic softfloat code. Cc: Michael Clark Cc: Palmer Dabbelt Cc: Sagar Karandikar Cc: Bastian Koppelmann Signed-off-by: Richard Henderson --- target/riscv/fpu_helper.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c index abbadead5c..fdb87d8d82 100644 --- a/target/riscv/fpu_helper.c +++ b/target/riscv/fpu_helper.c @@ -279,14 +279,12 @@ uint64_t helper_fmax_d(CPURISCVState *env, uint64_t f= rs1, uint64_t frs2) =20 uint64_t helper_fcvt_s_d(CPURISCVState *env, uint64_t rs1) { - rs1 =3D float64_to_float32(rs1, &env->fp_status); - return float32_maybe_silence_nan(rs1, &env->fp_status); + return float64_to_float32(rs1, &env->fp_status); } =20 uint64_t helper_fcvt_d_s(CPURISCVState *env, uint64_t rs1) { - rs1 =3D float32_to_float64(rs1, &env->fp_status); - return float64_maybe_silence_nan(rs1, &env->fp_status); + return float32_to_float64(rs1, &env->fp_status); } =20 uint64_t helper_fsqrt_d(CPURISCVState *env, uint64_t frs1) --=20 2.17.0 From nobody Wed Oct 29 20:33:39 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526000305878512.4252440147695; Thu, 10 May 2018 17:58:25 -0700 (PDT) Received: from localhost ([::1]:36227 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwO5-0005bu-Sh for importer@patchew.org; Thu, 10 May 2018 20:58:21 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52096) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwAN-0007Jx-FW for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGwAK-0004tA-Hd for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:11 -0400 Received: from mail-pl0-x242.google.com ([2607:f8b0:400e:c01::242]:38439) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGwAK-0004sx-CM for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:08 -0400 Received: by mail-pl0-x242.google.com with SMTP id c11-v6so2262524plr.5 for ; Thu, 10 May 2018 17:44:08 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id y24-v6sm4216728pfn.23.2018.05.10.17.44.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 17:44:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6z5jX9TCxKiZSZHZWyKzIG2jpQGZx1m9dxkm709/st0=; b=L5uqh3c3hIYMI/IpY5TpWPrY95wjmnDQle+jD3iZROAer2EGLycesVWmtZJXAkfZCv BCZqvvuCcKfQUNwrkehZjHRITVWtJXC9maz56ylhVIACnLSc7oiIQsJtXGp1pWy5OtHW 3aMJZ4D8hzWd4WR/TJylueNPuFbirgfzkwVZ8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6z5jX9TCxKiZSZHZWyKzIG2jpQGZx1m9dxkm709/st0=; b=g4mq5nMoS4ryASvUn4QlyDmvL5oUm59sjlQOvTdBzMGOd6cJsf3uhRC0OnzY84P9iN 7dfCFNLEvRsfNLWsrpWEs0vJ4YYZtrHaEq+QMxYDdvJBrBKR8JV1S6Ael7B9upVuenOq tMuuTn3YNQiTBp5/VhpY59zgdQ+X/pZz1zW6Ym2ULgN9JwNv10+NZetfEL3stwvOV/cB XJgOHUISjoq6MN1N0QA+awleEQIVvUvpznNaqBwyHi7UklEOP+BFxkhmoa6x72+MDe0W tOfQBQgOqE+LbepGS6wTUr/b3Bbm7RFw/KnrW3LjG9wYVu7z5dfVXJrE+EyNmlR98f3a 48TQ== X-Gm-Message-State: ALKqPwePGkj+k+JEnSscLN32HDaqlrs8TAUGBPCwWaGGopZiOfim2Pr5 euh0Se6jjDcd7yi3SurOwnVdZ4KYmRo= X-Google-Smtp-Source: AB8JxZr42NLKHcF7LdpOng3JPL5N7JVOFQiD/4luyRqRW1UOK6xXy6Fl+wwnqYiqEnbIYbxUXcGAZg== X-Received: by 2002:a17:902:7288:: with SMTP id d8-v6mr3351183pll.218.1525999447122; Thu, 10 May 2018 17:44:07 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 17:43:40 -0700 Message-Id: <20180511004345.26708-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511004345.26708-1-richard.henderson@linaro.org> References: <20180511004345.26708-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::242 Subject: [Qemu-devel] [PATCH 14/19] target/s390x: Remove floatX_maybe_silence_nan from conversions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, Alexander Graf , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This is now handled properly by the generic softfloat code. Cc: Alexander Graf Cc: David Hildenbrand Signed-off-by: Richard Henderson Reviewed-by: David Hildenbrand --- target/s390x/fpu_helper.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target/s390x/fpu_helper.c b/target/s390x/fpu_helper.c index 43f8bf1c94..5c5b451b3b 100644 --- a/target/s390x/fpu_helper.c +++ b/target/s390x/fpu_helper.c @@ -269,7 +269,7 @@ uint64_t HELPER(ldeb)(CPUS390XState *env, uint64_t f2) { float64 ret =3D float32_to_float64(f2, &env->fpu_status); handle_exceptions(env, GETPC()); - return float64_maybe_silence_nan(ret, &env->fpu_status); + return ret; } =20 /* convert 128-bit float to 64-bit float */ @@ -277,7 +277,7 @@ uint64_t HELPER(ldxb)(CPUS390XState *env, uint64_t ah, = uint64_t al) { float64 ret =3D float128_to_float64(make_float128(ah, al), &env->fpu_s= tatus); handle_exceptions(env, GETPC()); - return float64_maybe_silence_nan(ret, &env->fpu_status); + return ret; } =20 /* convert 64-bit float to 128-bit float */ @@ -285,7 +285,7 @@ uint64_t HELPER(lxdb)(CPUS390XState *env, uint64_t f2) { float128 ret =3D float64_to_float128(f2, &env->fpu_status); handle_exceptions(env, GETPC()); - return RET128(float128_maybe_silence_nan(ret, &env->fpu_status)); + return RET128(ret); } =20 /* convert 32-bit float to 128-bit float */ @@ -293,7 +293,7 @@ uint64_t HELPER(lxeb)(CPUS390XState *env, uint64_t f2) { float128 ret =3D float32_to_float128(f2, &env->fpu_status); handle_exceptions(env, GETPC()); - return RET128(float128_maybe_silence_nan(ret, &env->fpu_status)); + return RET128(ret); } =20 /* convert 64-bit float to 32-bit float */ @@ -301,7 +301,7 @@ uint64_t HELPER(ledb)(CPUS390XState *env, uint64_t f2) { float32 ret =3D float64_to_float32(f2, &env->fpu_status); handle_exceptions(env, GETPC()); - return float32_maybe_silence_nan(ret, &env->fpu_status); + return ret; } =20 /* convert 128-bit float to 32-bit float */ @@ -309,7 +309,7 @@ uint64_t HELPER(lexb)(CPUS390XState *env, uint64_t ah, = uint64_t al) { float32 ret =3D float128_to_float32(make_float128(ah, al), &env->fpu_s= tatus); handle_exceptions(env, GETPC()); - return float32_maybe_silence_nan(ret, &env->fpu_status); + return ret; } =20 /* 32-bit FP compare */ --=20 2.17.0 From nobody Wed Oct 29 20:33:39 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525999779006947.518427757109; Thu, 10 May 2018 17:49:39 -0700 (PDT) Received: from localhost ([::1]:36180 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwFe-0004NC-6D for importer@patchew.org; Thu, 10 May 2018 20:49:38 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52095) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwAN-0007Jv-FJ for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGwAL-0004tQ-UI for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:11 -0400 Received: from mail-pf0-x244.google.com ([2607:f8b0:400e:c00::244]:41024) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGwAL-0004tF-Og for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:09 -0400 Received: by mail-pf0-x244.google.com with SMTP id v63-v6so1861862pfk.8 for ; Thu, 10 May 2018 17:44:09 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id y24-v6sm4216728pfn.23.2018.05.10.17.44.07 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 17:44:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=xAOPy8F+Mz2BqbptFVIU6iCHdlg7tOjKkktWd84cltQ=; b=jP1ylhX7gyUTdjltq4kzmn+IIfvdkxVFb2f6PqaIM2uZ2qiBtFOwB5IshbPtGnDHGs yeFXoHLgbjqd20BGsL98koht69h4YP3/LN7Q0xGltsTh4YMBu7oU2/lcFhCkXLFmQIbd rLUaFQVqFIVu3IPVGkjAJLXUdlTwodO+9WZBM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=xAOPy8F+Mz2BqbptFVIU6iCHdlg7tOjKkktWd84cltQ=; b=naB52h3/hBG6EStH4D/WP3pQMExZcojain2AY9Zk3VSsnWyZQv7/R4q+K+lbL6mzLh 7k7SfdOxVturCc3X4DkuJ318A710qb/uO41GAWlIjg3Ffy4vQinUOlTsgF6CDD7EhBKc kUsKY1LmHQ5KQRN/iEFYbGeCFrmlQHZhcbyj+jErGehqcNqh+OVoFKKXVqn63VKH9ha1 0+9RF6OEyOPqFApq2mm9UU/Uum6c606K/okc1qFzhtuYk/qxiNXcmz5Ng8ciZhQv+tkU /UxcqiEnAGLWs4iNk7A3rQolsGajeAUI099qGM7+xlMtvB5ysmPEdAe5qQJdOCBdCw+O HHug== X-Gm-Message-State: ALKqPwfxG1liRcNs/wXIgWznP+MV2F19wR1pTFvhLoaUuBiC2zfxlUJf 1alEsliEFPRPp7TqB70df0mJ8yYRikg= X-Google-Smtp-Source: AB8JxZoOEaUTJcMWGnXvfnm8YmU8TXk9961mRUgTg/uW/+QiLHRFfAqxTr9hfoHo3Z3joaK+p6WG5w== X-Received: by 2002:aa7:8354:: with SMTP id z20-v6mr3337201pfm.166.1525999448342; Thu, 10 May 2018 17:44:08 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 17:43:41 -0700 Message-Id: <20180511004345.26708-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511004345.26708-1-richard.henderson@linaro.org> References: <20180511004345.26708-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::244 Subject: [Qemu-devel] [PATCH 15/19] fpu/softfloat: Use float*_silence_nan in propagateFloat*NaN X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" We have already checked the arguments for SNaN; we don't need to do it again. Signed-off-by: Richard Henderson --- fpu/softfloat-specialize.h | 44 +++++++++++++++++++++++++++++--------- 1 file changed, 34 insertions(+), 10 deletions(-) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 53a4f45a8c..08ab8181d5 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -498,7 +498,7 @@ static float32 commonNaNToFloat32(commonNaNT a, float_s= tatus *status) | The routine is passed various bits of information about the | two NaNs and should return 0 to select NaN a and 1 for NaN b. | Note that signalling NaNs are always squashed to quiet NaNs -| by the caller, by calling floatXX_maybe_silence_nan() before +| by the caller, by calling floatXX_silence_nan() before | returning them. | | aIsLargerSignificand is only valid if both a and b are NaNs @@ -536,7 +536,7 @@ static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIs= QNaN, flag bIsSNaN, { /* According to MIPS specifications, if one of the two operands is * a sNaN, a new qNaN has to be generated. This is done in - * floatXX_maybe_silence_nan(). For qNaN inputs the specifications + * floatXX_silence_nan(). For qNaN inputs the specifications * says: "When possible, this QNaN result is one of the operand QNaN * values." In practice it seems that most implementations choose * the first operand if both operands are qNaN. In short this gives @@ -788,9 +788,15 @@ static float32 propagateFloat32NaN(float32 a, float32 = b, float_status *status) =20 if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN, aIsLargerSignificand)) { - return float32_maybe_silence_nan(b, status); + if (bIsSignalingNaN) { + return float32_silence_nan(b, status); + } + return b; } else { - return float32_maybe_silence_nan(a, status); + if (aIsSignalingNaN) { + return float32_silence_nan(a, status); + } + return a; } } =20 @@ -950,9 +956,15 @@ static float64 propagateFloat64NaN(float64 a, float64 = b, float_status *status) =20 if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN, aIsLargerSignificand)) { - return float64_maybe_silence_nan(b, status); + if (bIsSignalingNaN) { + return float64_silence_nan(b, status); + } + return b; } else { - return float64_maybe_silence_nan(a, status); + if (aIsSignalingNaN) { + return float64_silence_nan(a, status); + } + return a; } } =20 @@ -1121,9 +1133,15 @@ floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b= , float_status *status) =20 if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN, aIsLargerSignificand)) { - return floatx80_maybe_silence_nan(b, status); + if (bIsSignalingNaN) { + return floatx80_silence_nan(b, status); + } + return b; } else { - return floatx80_maybe_silence_nan(a, status); + if (aIsSignalingNaN) { + return floatx80_silence_nan(a, status); + } + return a; } } =20 @@ -1270,8 +1288,14 @@ static float128 propagateFloat128NaN(float128 a, flo= at128 b, =20 if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN, aIsLargerSignificand)) { - return float128_maybe_silence_nan(b, status); + if (bIsSignalingNaN) { + return float128_silence_nan(b, status); + } + return b; } else { - return float128_maybe_silence_nan(a, status); + if (aIsSignalingNaN) { + return float128_silence_nan(a, status); + } + return a; } } --=20 2.17.0 From nobody Wed Oct 29 20:33:39 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525999951301850.8994021021034; Thu, 10 May 2018 17:52:31 -0700 (PDT) Received: from localhost ([::1]:36197 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwIQ-0008Rf-B6 for importer@patchew.org; Thu, 10 May 2018 20:52:30 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52112) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwAO-0007Lv-KR for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGwAN-0004tq-IA for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:12 -0400 Received: from mail-pg0-x242.google.com ([2607:f8b0:400e:c05::242]:36260) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGwAN-0004ta-9d for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:11 -0400 Received: by mail-pg0-x242.google.com with SMTP id z70-v6so1681560pgz.3 for ; Thu, 10 May 2018 17:44:11 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id y24-v6sm4216728pfn.23.2018.05.10.17.44.08 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 17:44:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=oJWsgaqKrV22gmzFsZC0W5+oSo6K4eM7iZrE9Cwz8bQ=; b=ccIchCYkrBcHXruTQWngTq6EXQ11+WFtfaTOBpdobT3NtIf0dqIeVmVpRtfOGzFTC9 JM+k77ABHO1r8pyQ/mjr00gXbc4ZNRgw3rHUJR6T0aABzFQm694xHI7yFbrMx60monsU hKah9KXlwnJi11EnjxoURaSoxu/pubapauRys= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=oJWsgaqKrV22gmzFsZC0W5+oSo6K4eM7iZrE9Cwz8bQ=; b=P3tUJ4DlomrFT7eOwHJVtGJMIuzikzLAhECvxoULLFAwum9ALjLPJI7cZ3EYJ2VRBM fb2L8SIj+PA4qB5BDxWoGNjuo4/2E11R/FFuZAHqg6qKKx+sCimnLXHJqVUNDq+TTMRj 2S8IOX9bJU5S6xO/j1uzPxDrdbGBBjjRQLeiIu9qcqpMnjw4p8SNgUWNE62My0PUhn5L lY+EQfUTi8jdSd1GfGWwAW1jaBDGOXXKo4dApQ+b+EmzJ5RHX0IGIOhbWKG7pA5JxfjI xq2gtGZVBuV4oiNxB8h2d3zX5k57xBh3rDpgMH8CkM4IOGWOZ4AzVPZZ5K7QNYFIVyGP AV1w== X-Gm-Message-State: ALKqPwdiNvHZNM558JGj/QC7DFwbGHbYRHofe/PlqPhtnvOY5lowe/V0 OD3cXCTzga8fxw6G7tQ8zpySX6pj1sM= X-Google-Smtp-Source: AB8JxZpPpU/ql+CUojfpd0ugg+olj7qRxJT6plZHcoLnrCPNDv+E98C/V+/zENlH1YKApIubVY7fVg== X-Received: by 2002:a65:6553:: with SMTP id a19-v6mr2679830pgw.3.1525999449912; Thu, 10 May 2018 17:44:09 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 17:43:42 -0700 Message-Id: <20180511004345.26708-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511004345.26708-1-richard.henderson@linaro.org> References: <20180511004345.26708-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::242 Subject: [Qemu-devel] [PATCH 16/19] fpu/softfloat: Remove floatX_maybe_silence_nan X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" These functions are now unused. Signed-off-by: Richard Henderson --- fpu/softfloat-specialize.h | 63 -------------------------------------- include/fpu/softfloat.h | 5 --- 2 files changed, 68 deletions(-) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 08ab8181d5..d7033b7757 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -364,19 +364,6 @@ float16 float16_silence_nan(float16 a, float_status *s= tatus) #endif } =20 -/*------------------------------------------------------------------------= ---- -| Returns a quiet NaN if the half-precision floating point value `a' is a -| signaling NaN; otherwise returns `a'. -*-------------------------------------------------------------------------= ---*/ - -float16 float16_maybe_silence_nan(float16 a, float_status *status) -{ - if (float16_is_signaling_nan(a, status)) { - float16_silence_nan(a, status); - } - return a; -} - /*------------------------------------------------------------------------= ---- | Returns 1 if the single-precision floating-point value `a' is a quiet | NaN; otherwise returns 0. @@ -438,18 +425,6 @@ float32 float32_silence_nan(float32 a, float_status *s= tatus) } #endif } -/*------------------------------------------------------------------------= ---- -| Returns a quiet NaN if the single-precision floating point value `a' is a -| signaling NaN; otherwise returns `a'. -*-------------------------------------------------------------------------= ---*/ - -float32 float32_maybe_silence_nan(float32 a, float_status *status) -{ - if (float32_is_signaling_nan(a, status)) { - float32_silence_nan(a, status); - } - return a; -} =20 /*------------------------------------------------------------------------= ---- | Returns the result of converting the single-precision floating-point NaN @@ -864,18 +839,6 @@ float64 float64_silence_nan(float64 a, float_status *s= tatus) #endif } =20 -/*------------------------------------------------------------------------= ---- -| Returns a quiet NaN if the double-precision floating point value `a' is a -| signaling NaN; otherwise returns `a'. -*-------------------------------------------------------------------------= ---*/ - -float64 float64_maybe_silence_nan(float64 a, float_status *status) -{ - if (float64_is_signaling_nan(a, status)) { - return float64_silence_nan(a, status); - } - return a; -} =20 /*------------------------------------------------------------------------= ---- | Returns the result of converting the double-precision floating-point NaN @@ -1037,19 +1000,6 @@ floatx80 floatx80_silence_nan(floatx80 a, float_stat= us *status) #endif } =20 -/*------------------------------------------------------------------------= ---- -| Returns a quiet NaN if the extended double-precision floating point value -| `a' is a signaling NaN; otherwise returns `a'. -*-------------------------------------------------------------------------= ---*/ - -floatx80 floatx80_maybe_silence_nan(floatx80 a, float_status *status) -{ - if (floatx80_is_signaling_nan(a, status)) { - return floatx80_silence_nan(a, status); - } - return a; -} - /*------------------------------------------------------------------------= ---- | Returns the result of converting the extended double-precision floating- | point NaN `a' to the canonical NaN format. If `a' is a signaling NaN, t= he @@ -1204,19 +1154,6 @@ float128 float128_silence_nan(float128 a, float_stat= us *status) #endif } =20 -/*------------------------------------------------------------------------= ---- -| Returns a quiet NaN if the quadruple-precision floating point value `a' = is -| a signaling NaN; otherwise returns `a'. -*-------------------------------------------------------------------------= ---*/ - -float128 float128_maybe_silence_nan(float128 a, float_status *status) -{ - if (float128_is_signaling_nan(a, status)) { - return float128_silence_nan(a, status); - } - return a; -} - /*------------------------------------------------------------------------= ---- | Returns the result of converting the quadruple-precision floating-point = NaN | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index a6860e858d..69f4dbc4db 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -258,7 +258,6 @@ int float16_compare_quiet(float16, float16, float_statu= s *status); int float16_is_quiet_nan(float16, float_status *status); int float16_is_signaling_nan(float16, float_status *status); float16 float16_silence_nan(float16, float_status *status); -float16 float16_maybe_silence_nan(float16, float_status *status); =20 static inline int float16_is_any_nan(float16 a) { @@ -370,7 +369,6 @@ float32 float32_maxnummag(float32, float32, float_statu= s *status); int float32_is_quiet_nan(float32, float_status *status); int float32_is_signaling_nan(float32, float_status *status); float32 float32_silence_nan(float32, float_status *status); -float32 float32_maybe_silence_nan(float32, float_status *status); float32 float32_scalbn(float32, int, float_status *status); =20 static inline float32 float32_abs(float32 a) @@ -500,7 +498,6 @@ float64 float64_maxnummag(float64, float64, float_statu= s *status); int float64_is_quiet_nan(float64 a, float_status *status); int float64_is_signaling_nan(float64, float_status *status); float64 float64_silence_nan(float64, float_status *status); -float64 float64_maybe_silence_nan(float64, float_status *status); float64 float64_scalbn(float64, int, float_status *status); =20 static inline float64 float64_abs(float64 a) @@ -604,7 +601,6 @@ int floatx80_compare_quiet(floatx80, floatx80, float_st= atus *status); int floatx80_is_quiet_nan(floatx80, float_status *status); int floatx80_is_signaling_nan(floatx80, float_status *status); floatx80 floatx80_silence_nan(floatx80, float_status *status); -floatx80 floatx80_maybe_silence_nan(floatx80, float_status *status); floatx80 floatx80_scalbn(floatx80, int, float_status *status); =20 static inline floatx80 floatx80_abs(floatx80 a) @@ -816,7 +812,6 @@ int float128_compare_quiet(float128, float128, float_st= atus *status); int float128_is_quiet_nan(float128, float_status *status); int float128_is_signaling_nan(float128, float_status *status); float128 float128_silence_nan(float128, float_status *status); -float128 float128_maybe_silence_nan(float128, float_status *status); float128 float128_scalbn(float128, int, float_status *status); =20 static inline float128 float128_abs(float128 a) --=20 2.17.0 From nobody Wed Oct 29 20:33:39 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 152600012788068.1296632971223; Thu, 10 May 2018 17:55:27 -0700 (PDT) Received: from localhost ([::1]:36210 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwLG-00032l-T2 for importer@patchew.org; Thu, 10 May 2018 20:55:26 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52124) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwAQ-0007S5-OP for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGwAP-0004uK-4B for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:14 -0400 Received: from mail-pf0-x243.google.com ([2607:f8b0:400e:c00::243]:39528) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGwAO-0004u7-Ro for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:13 -0400 Received: by mail-pf0-x243.google.com with SMTP id a22-v6so1865881pfn.6 for ; Thu, 10 May 2018 17:44:12 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id y24-v6sm4216728pfn.23.2018.05.10.17.44.10 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 17:44:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=oesny4QuXbveDP/wFoUMc4hNdwl6Bna3gbCe86Nls80=; b=KGbtytY0RkDkAzIWy2pItfQx+gdbkWJPqS1en8CbpXp3apKFLsi1OXYezB/WBCI3ge prAgvYAb9KUMUXnDxDE9IW7H6BVL1m3rFtzj5nISaoAY3HoYhrmpzmlVY8zln+/xszwF tDLd87CY1H1ZMZWMr9p6ZG9xyJ9bgr0YBDPfI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=oesny4QuXbveDP/wFoUMc4hNdwl6Bna3gbCe86Nls80=; b=aIjcQRMU3s5jrJkJZJYd5oDd4UtApYwg+s+behFj5YaoPHc/HKHFbGcHb7Qm4c339Q zrOIrONfbiVqufz0EVvtpQaeafIk5EJfpecHN95IQm/gGlXnGStAScx8BXsOWlCoC9hC mnCG8KC0L8hTAdpT6aCsIEIzwZ5D776Eh3frha64qZfuHTGvL0SmlLUAuZxyQtH7aps9 JHCg090ZinZejcM5I3yw4bfkyfkzrXbtrij3v1oqOxZHKYwz1OHzDpm/2m/eZwNbOpD6 zvP7kWvN4/smtiB0v/WWB1R0aR97IKFNLKAJKs9xcBA1LCam+vghptCEZ2KNpPqj0lTZ 5jhA== X-Gm-Message-State: ALKqPwcYQ4rb7DU6Wo5JrsJMEeq6orcT4yuR40joFDy/Zhhv0EuAt0t3 r+oOY3n6NRguuAQYpcut3pLyeCM0xE8= X-Google-Smtp-Source: AB8JxZqw/kEi4/5451EEp13RQwMKA11rFSO9Sq4FHBjZjlq/tbwAMnUbbjcFWkjHtaOME/KZT4UHCA== X-Received: by 2002:a65:5ac9:: with SMTP id d9-v6mr2752673pgt.342.1525999451312; Thu, 10 May 2018 17:44:11 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 17:43:43 -0700 Message-Id: <20180511004345.26708-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511004345.26708-1-richard.henderson@linaro.org> References: <20180511004345.26708-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::243 Subject: [Qemu-devel] [PATCH 17/19] fpu/softfloat: Introduce SNAN_BIT_IS_ONE X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Only MIPS requires snan_bit_is_one to be variable. While we are specializing softfloat behaviour, allow other targets to eliminate this runtime check. Signed-off-by: Richard Henderson --- fpu/softfloat-specialize.h | 57 ++++++++++++++++++++--------------- include/fpu/softfloat-types.h | 1 + include/fpu/softfloat.h | 4 --- target/mips/cpu.h | 4 +-- target/hppa/cpu.c | 1 - target/mips/translate_init.c | 4 +-- target/ppc/fpu_helper.c | 1 - target/sh4/cpu.c | 1 - target/unicore32/cpu.c | 2 -- 9 files changed, 37 insertions(+), 38 deletions(-) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index d7033b7757..e7b4544e48 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -83,7 +83,14 @@ this code that are retained. /* Define for architectures which deviate from IEEE in not supporting * signaling NaNs (so all NaNs are treated as quiet). */ -#define NO_SIGNALING_NANS 1 +# define NO_SIGNALING_NANS 1 +# define SNAN_BIT_IS_ONE(S) 0 +#elif defined(TARGET_MIPS) +# define SNAN_BIT_IS_ONE(S) ((S)->snan_bit_is_one) +#elif defined(TARGET_HPPA) || defined(TARGET_UNICORE32) || defined(TARGET_= SH4) +# define SNAN_BIT_IS_ONE(S) 1 +#else +# define SNAN_BIT_IS_ONE(S) 0 #endif =20 /*------------------------------------------------------------------------= ---- @@ -97,7 +104,7 @@ static bool parts_is_snan_frac(uint64_t frac, float_stat= us *status) return false; #else flag msb =3D extract64(frac, DECOMPOSED_BINARY_POINT - 1, 1); - return msb =3D=3D status->snan_bit_is_one; + return msb =3D=3D SNAN_BIT_IS_ONE(status); #endif } =20 @@ -118,7 +125,7 @@ static FloatParts parts_default_nan(float_status *statu= s) #elif defined(TARGET_HPPA) frac =3D 1ULL << (DECOMPOSED_BINARY_POINT - 2); #else - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { frac =3D (1ULL << (DECOMPOSED_BINARY_POINT - 1)) - 1; } else { #if defined(TARGET_MIPS) @@ -151,7 +158,7 @@ static FloatParts parts_silence_nan(FloatParts a, float= _status *status) a.frac &=3D ~(1ULL << (DECOMPOSED_BINARY_POINT - 1)); a.frac |=3D 1ULL << (DECOMPOSED_BINARY_POINT - 2); #else - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { return parts_default_nan(status); } else { a.frac |=3D 1ULL << (DECOMPOSED_BINARY_POINT - 1); @@ -169,7 +176,7 @@ float16 float16_default_nan(float_status *status) #if defined(TARGET_ARM) return const_float16(0x7E00); #else - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { return const_float16(0x7DFF); } else { #if defined(TARGET_MIPS) @@ -195,7 +202,7 @@ float32 float32_default_nan(float_status *status) #elif defined(TARGET_HPPA) return const_float32(0x7FA00000); #else - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { return const_float32(0x7FBFFFFF); } else { #if defined(TARGET_MIPS) @@ -220,7 +227,7 @@ float64 float64_default_nan(float_status *status) #elif defined(TARGET_HPPA) return const_float64(LIT64(0x7FF4000000000000)); #else - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { return const_float64(LIT64(0x7FF7FFFFFFFFFFFF)); } else { #if defined(TARGET_MIPS) @@ -242,7 +249,7 @@ floatx80 floatx80_default_nan(float_status *status) r.low =3D LIT64(0xFFFFFFFFFFFFFFFF); r.high =3D 0x7FFF; #else - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { r.low =3D LIT64(0xBFFFFFFFFFFFFFFF); r.high =3D 0x7FFF; } else { @@ -274,7 +281,7 @@ float128 float128_default_nan(float_status *status) { float128 r; =20 - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { r.low =3D LIT64(0xFFFFFFFFFFFFFFFF); r.high =3D LIT64(0x7FFF7FFFFFFFFFFF); } else { @@ -319,7 +326,7 @@ int float16_is_quiet_nan(float16 a_, float_status *stat= us) return float16_is_any_nan(a_); #else uint16_t a =3D float16_val(a_); - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { return (((a >> 9) & 0x3F) =3D=3D 0x3E) && (a & 0x1FF); } else { return ((a & ~0x8000) >=3D 0x7C80); @@ -338,7 +345,7 @@ int float16_is_signaling_nan(float16 a_, float_status *= status) return 0; #else uint16_t a =3D float16_val(a_); - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { return ((a & ~0x8000) >=3D 0x7C80); } else { return (((a >> 9) & 0x3F) =3D=3D 0x3E) && (a & 0x1FF); @@ -356,7 +363,7 @@ float16 float16_silence_nan(float16 a, float_status *st= atus) #ifdef NO_SIGNALING_NANS g_assert_not_reached(); #else - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { return float16_default_nan(status); } else { return a | (1 << 9); @@ -375,7 +382,7 @@ int float32_is_quiet_nan(float32 a_, float_status *stat= us) return float32_is_any_nan(a_); #else uint32_t a =3D float32_val(a_); - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { return (((a >> 22) & 0x1FF) =3D=3D 0x1FE) && (a & 0x003FFFFF); } else { return ((uint32_t)(a << 1) >=3D 0xFF800000); @@ -394,7 +401,7 @@ int float32_is_signaling_nan(float32 a_, float_status *= status) return 0; #else uint32_t a =3D float32_val(a_); - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { return ((uint32_t)(a << 1) >=3D 0xFF800000); } else { return (((a >> 22) & 0x1FF) =3D=3D 0x1FE) && (a & 0x003FFFFF); @@ -412,7 +419,7 @@ float32 float32_silence_nan(float32 a, float_status *st= atus) #ifdef NO_SIGNALING_NANS g_assert_not_reached(); #else - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { # ifdef TARGET_HPPA a &=3D ~0x00400000; a |=3D 0x00200000; @@ -651,7 +658,7 @@ static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, fl= ag bIsQNaN, flag bIsSNaN, return 3; } =20 - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { /* Prefer sNaN over qNaN, in the a, b, c order. */ if (aIsSNaN) { return 0; @@ -786,7 +793,7 @@ int float64_is_quiet_nan(float64 a_, float_status *stat= us) return float64_is_any_nan(a_); #else uint64_t a =3D float64_val(a_); - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { return (((a >> 51) & 0xFFF) =3D=3D 0xFFE) && (a & 0x0007FFFFFFFFFFFFULL); } else { @@ -806,7 +813,7 @@ int float64_is_signaling_nan(float64 a_, float_status *= status) return 0; #else uint64_t a =3D float64_val(a_); - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { return ((a << 1) >=3D 0xFFF0000000000000ULL); } else { return (((a >> 51) & 0xFFF) =3D=3D 0xFFE) @@ -825,7 +832,7 @@ float64 float64_silence_nan(float64 a, float_status *st= atus) #ifdef NO_SIGNALING_NANS g_assert_not_reached(); #else - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { # ifdef TARGET_HPPA a &=3D ~0x0008000000000000ULL; a |=3D 0x0004000000000000ULL; @@ -942,7 +949,7 @@ int floatx80_is_quiet_nan(floatx80 a, float_status *sta= tus) #ifdef NO_SIGNALING_NANS return floatx80_is_any_nan(a); #else - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { uint64_t aLow; =20 aLow =3D a.low & ~0x4000000000000000ULL; @@ -967,7 +974,7 @@ int floatx80_is_signaling_nan(floatx80 a, float_status = *status) #ifdef NO_SIGNALING_NANS return 0; #else - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { return ((a.high & 0x7FFF) =3D=3D 0x7FFF) && ((a.low << 1) >=3D 0x8000000000000000ULL); } else { @@ -991,7 +998,7 @@ floatx80 floatx80_silence_nan(floatx80 a, float_status = *status) #ifdef NO_SIGNALING_NANS g_assert_not_reached(); #else - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { return floatx80_default_nan(status); } else { a.low |=3D LIT64(0xC000000000000000); @@ -1105,7 +1112,7 @@ int float128_is_quiet_nan(float128 a, float_status *s= tatus) #ifdef NO_SIGNALING_NANS return float128_is_any_nan(a); #else - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { return (((a.high >> 47) & 0xFFFF) =3D=3D 0xFFFE) && (a.low || (a.high & 0x00007FFFFFFFFFFFULL)); } else { @@ -1125,7 +1132,7 @@ int float128_is_signaling_nan(float128 a, float_statu= s *status) #ifdef NO_SIGNALING_NANS return 0; #else - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { return ((a.high << 1) >=3D 0xFFFF000000000000ULL) && (a.low || (a.high & 0x0000FFFFFFFFFFFFULL)); } else { @@ -1145,7 +1152,7 @@ float128 float128_silence_nan(float128 a, float_statu= s *status) #ifdef NO_SIGNALING_NANS g_assert_not_reached(); #else - if (status->snan_bit_is_one) { + if (SNAN_BIT_IS_ONE(status)) { return float128_default_nan(status); } else { a.high |=3D LIT64(0x0000800000000000); diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h index 4e378cb612..b5207d4537 100644 --- a/include/fpu/softfloat-types.h +++ b/include/fpu/softfloat-types.h @@ -173,6 +173,7 @@ typedef struct float_status { /* should denormalised inputs go to zero and set the input_denormal fl= ag? */ flag flush_inputs_to_zero; flag default_nan_mode; + /* not always used -- see SNAN_BIT_IS_ONE in softfloat-specialize.h */ flag snan_bit_is_one; } float_status; =20 diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 69f4dbc4db..e72cc9525d 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -125,10 +125,6 @@ static inline void set_default_nan_mode(flag val, floa= t_status *status) { status->default_nan_mode =3D val; } -static inline void set_snan_bit_is_one(flag val, float_status *status) -{ - status->snan_bit_is_one =3D val; -} static inline int get_float_detect_tininess(float_status *status) { return status->float_detect_tininess; diff --git a/target/mips/cpu.h b/target/mips/cpu.h index cfe1735e0e..2abce47ea3 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -755,8 +755,8 @@ target_ulong exception_resume_pc (CPUMIPSState *env); =20 static inline void restore_snan_bit_mode(CPUMIPSState *env) { - set_snan_bit_is_one((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) =3D= =3D 0, - &env->active_fpu.fp_status); + env->active_fpu.fp_status.snan_bit_is_one + =3D (env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) =3D=3D 0; } =20 static inline void cpu_get_tb_cpu_state(CPUMIPSState *env, target_ulong *p= c, diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index c261b6b090..00bf444620 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -141,7 +141,6 @@ static void hppa_cpu_initfn(Object *obj) cs->env_ptr =3D env; cs->exception_index =3D -1; cpu_hppa_loaded_fr0(env); - set_snan_bit_is_one(true, &env->fp_status); cpu_hppa_put_psw(env, PSW_W); } =20 diff --git a/target/mips/translate_init.c b/target/mips/translate_init.c index c7ba6ee5f9..5e40d6a198 100644 --- a/target/mips/translate_init.c +++ b/target/mips/translate_init.c @@ -878,6 +878,6 @@ static void msa_reset(CPUMIPSState *env) /* clear float_status nan mode */ set_default_nan_mode(0, &env->active_tc.msa_fp_status); =20 - /* set proper signanling bit meaning ("1" means "quiet") */ - set_snan_bit_is_one(0, &env->active_tc.msa_fp_status); + /* set proper signaling bit meaning ("1" means "quiet") */ + env->active_tc.msa_fp_status.snan_bit_is_one =3D 0; } diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 9ae418a577..d31a933cbb 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -3382,7 +3382,6 @@ void helper_xssqrtqp(CPUPPCState *env, uint32_t opcod= e) xt.f128 =3D xb.f128; } else if (float128_is_neg(xb.f128) && !float128_is_zero(xb.f128))= { float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSQRT, 1); - set_snan_bit_is_one(0, &env->fp_status); xt.f128 =3D float128_default_nan(&env->fp_status); } } diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 541ffc2d97..b9f393b7c7 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -71,7 +71,6 @@ static void superh_cpu_reset(CPUState *s) set_flush_to_zero(1, &env->fp_status); #endif set_default_nan_mode(1, &env->fp_status); - set_snan_bit_is_one(1, &env->fp_status); } =20 static void superh_cpu_disas_set_info(CPUState *cpu, disassemble_info *inf= o) diff --git a/target/unicore32/cpu.c b/target/unicore32/cpu.c index 29d160a88d..68f978d80b 100644 --- a/target/unicore32/cpu.c +++ b/target/unicore32/cpu.c @@ -70,7 +70,6 @@ static void unicore_ii_cpu_initfn(Object *obj) =20 set_feature(env, UC32_HWCAP_CMOV); set_feature(env, UC32_HWCAP_UCF64); - set_snan_bit_is_one(1, &env->ucf64.fp_status); } =20 static void uc32_any_cpu_initfn(Object *obj) @@ -83,7 +82,6 @@ static void uc32_any_cpu_initfn(Object *obj) =20 set_feature(env, UC32_HWCAP_CMOV); set_feature(env, UC32_HWCAP_UCF64); - set_snan_bit_is_one(1, &env->ucf64.fp_status); } =20 static void uc32_cpu_realizefn(DeviceState *dev, Error **errp) --=20 2.17.0 From nobody Wed Oct 29 20:33:39 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526000259005380.93571442033556; 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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id y24-v6sm4216728pfn.23.2018.05.10.17.44.11 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 17:44:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=JBZX0q7CI7KHi+B8Bo3e+dWA3cA9W3GLHOt8hQrX5S8=; b=Jg8J5BXHcyzJ4EFG8EnkpBLSbqs/i+KUJWr1vh8MJ1OgzL4IU7LIIneIK1iy4T4Jdq cgitVWUeNzVVG1CnpSIDkTWDjITskl2YSi7hDx3B3PFYMcONFsByi2BNAjBCNAhaFxQj 2GZ53Rk5bKbHrvBIxgVAbFQBVgCvuGFhZMogY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=JBZX0q7CI7KHi+B8Bo3e+dWA3cA9W3GLHOt8hQrX5S8=; b=syuoyoEtDtIumavMI6vNOr0ZcghaE7FQYM9wzRhJwMfaBUFPXRTJ23CArHVXsR/Nzm F17uNd+vWuswocl5P+j/gNpeh7WQCy5yQ/+3qXtdlD360nIv5ZedAqUeqUqfpXnDjbjt 2MP8+xOoB8go0rrK8I6cd6p/CT8Hb559pN//sTqSo+/3gI+XDwGNGqDoDfWd/KBpwRSW 8ZEOq+c4cG/JbK+d2+EheRiORY1Xhm4a5XWGNCN946EevgTYJPMBQtIVq+H7OXPAQzBm InHOXpWBHPE2XvWqDSBYIdMN6iRkwqw/DO8q6QQ9DaQ/XhWb2TGlnsdIKjgbUtIRiXZx ZyBw== X-Gm-Message-State: ALKqPwcDzlqRdfJV/O44+6xPsGn34WS6ZQAMwMvrEkv36VaMk9EgsCXc n5+2m/Of4ZEWCY7mwluM+aEbc/oShZc= X-Google-Smtp-Source: AB8JxZohboguiGwYt2yI/Zu9H0CUp8OmuMbwvoz1oIXlVyTRpG0YV4bMzwhR72sXDkHCMvJl0woqCw== X-Received: by 2002:a63:bf44:: with SMTP id i4-v6mr2737109pgo.66.1525999452709; Thu, 10 May 2018 17:44:12 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 17:43:44 -0700 Message-Id: <20180511004345.26708-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511004345.26708-1-richard.henderson@linaro.org> References: <20180511004345.26708-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::241 Subject: [Qemu-devel] [PATCH 18/19] fpu/softfloat: Pass FloatClass to pickNaN X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" For each operand, pass a single enumeration instead of a pair of booleans. Signed-off-by: Richard Henderson --- fpu/softfloat-specialize.h | 168 ++++++++++++++++++------------------- fpu/softfloat.c | 35 ++++---- 2 files changed, 98 insertions(+), 105 deletions(-) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index e7b4544e48..83e5bf83b9 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -490,10 +490,10 @@ static float32 commonNaNToFloat32(commonNaNT a, float= _status *status) | tie-break rule. *-------------------------------------------------------------------------= ---*/ =20 -#if defined(TARGET_ARM) -static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, +static int pickNaN(FloatClass a_cls, FloatClass b_cls, flag aIsLargerSignificand) { +#if defined(TARGET_ARM) || defined(TARGET_MIPS) || defined(TARGET_HPPA) /* ARM mandated NaN propagation rules (see FPProcessNaNs()), take * the first of: * 1. A if it is signaling @@ -502,20 +502,6 @@ static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bI= sQNaN, flag bIsSNaN, * 4. B (quiet) * A signaling NaN is always quietened before returning it. */ - if (aIsSNaN) { - return 0; - } else if (bIsSNaN) { - return 1; - } else if (aIsQNaN) { - return 0; - } else { - return 1; - } -} -#elif defined(TARGET_MIPS) || defined(TARGET_HPPA) -static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, - flag aIsLargerSignificand) -{ /* According to MIPS specifications, if one of the two operands is * a sNaN, a new qNaN has to be generated. This is done in * floatXX_silence_nan(). For qNaN inputs the specifications @@ -529,35 +515,21 @@ static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag b= IsQNaN, flag bIsSNaN, * 4. B (quiet) * A signaling NaN is always silenced before returning it. */ - if (aIsSNaN) { + if (is_snan(a_cls)) { return 0; - } else if (bIsSNaN) { + } else if (is_snan(b_cls)) { return 1; - } else if (aIsQNaN) { + } else if (is_qnan(a_cls)) { return 0; } else { return 1; } -} -#elif defined(TARGET_PPC) || defined(TARGET_XTENSA) -static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, - flag aIsLargerSignificand) -{ +#elif defined(TARGET_PPC) || defined(TARGET_XTENSA) || defined(TARGET_M68K) /* PowerPC propagation rules: * 1. A if it sNaN or qNaN * 2. B if it sNaN or qNaN * A signaling NaN is always silenced before returning it. */ - if (aIsSNaN || aIsQNaN) { - return 0; - } else { - return 1; - } -} -#elif defined(TARGET_M68K) -static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, - flag aIsLargerSignificand) -{ /* M68000 FAMILY PROGRAMMER'S REFERENCE MANUAL * 3.4 FLOATING-POINT INSTRUCTION DETAILS * If either operand, but not both operands, of an operation is a @@ -572,16 +544,12 @@ static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag b= IsQNaN, flag bIsSNaN, * a nonsignaling NaN. The operation then continues as described in the * preceding paragraph for nonsignaling NaNs. */ - if (aIsQNaN || aIsSNaN) { /* a is the destination operand */ - return 0; /* return the destination operand */ + if (is_nan(a_cls)) { + return 0; } else { - return 1; /* return b */ + return 1; } -} #else -static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, - flag aIsLargerSignificand) -{ /* This implements x87 NaN propagation rules: * SNaN + QNaN =3D> return the QNaN * two SNaNs =3D> return the one with the larger significand, silenced @@ -592,13 +560,13 @@ static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag b= IsQNaN, flag bIsSNaN, * If we get down to comparing significands and they are the same, * return the NaN with the positive sign bit (if any). */ - if (aIsSNaN) { - if (bIsSNaN) { + if (is_snan(a_cls)) { + if (is_snan(b_cls)) { return aIsLargerSignificand ? 0 : 1; } - return bIsQNaN ? 1 : 0; - } else if (aIsQNaN) { - if (bIsSNaN || !bIsQNaN) { + return is_qnan(b_cls) ? 1 : 0; + } else if (is_qnan(a_cls)) { + if (is_snan(b_cls) || !is_qnan(b_cls)) { return 0; } else { return aIsLargerSignificand ? 0 : 1; @@ -606,8 +574,8 @@ static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIs= QNaN, flag bIsSNaN, } else { return 1; } -} #endif +} =20 /*------------------------------------------------------------------------= ---- | Select which NaN to propagate for a three-input operation. @@ -741,18 +709,26 @@ static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, = flag bIsQNaN, flag bIsSNaN, =20 static float32 propagateFloat32NaN(float32 a, float32 b, float_status *sta= tus) { - flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; flag aIsLargerSignificand; uint32_t av, bv; + FloatClass a_cls, b_cls; + + /* This is not complete, but is good enough for pickNaN. */ + a_cls =3D (!float32_is_any_nan(a) + ? float_class_normal + : float32_is_signaling_nan(a, status) + ? float_class_snan + : float_class_qnan); + b_cls =3D (!float32_is_any_nan(b) + ? float_class_normal + : float32_is_signaling_nan(b, status) + ? float_class_snan + : float_class_qnan); =20 - aIsQuietNaN =3D float32_is_quiet_nan(a, status); - aIsSignalingNaN =3D float32_is_signaling_nan(a, status); - bIsQuietNaN =3D float32_is_quiet_nan(b, status); - bIsSignalingNaN =3D float32_is_signaling_nan(b, status); av =3D float32_val(a); bv =3D float32_val(b); =20 - if (aIsSignalingNaN | bIsSignalingNaN) { + if (is_snan(a_cls) || is_snan(b_cls)) { float_raise(float_flag_invalid, status); } =20 @@ -768,14 +744,13 @@ static float32 propagateFloat32NaN(float32 a, float32= b, float_status *status) aIsLargerSignificand =3D (av < bv) ? 1 : 0; } =20 - if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN, - aIsLargerSignificand)) { - if (bIsSignalingNaN) { + if (pickNaN(a_cls, b_cls, aIsLargerSignificand)) { + if (is_snan(b_cls)) { return float32_silence_nan(b, status); } return b; } else { - if (aIsSignalingNaN) { + if (is_snan(a_cls)) { return float32_silence_nan(a, status); } return a; @@ -897,18 +872,26 @@ static float64 commonNaNToFloat64(commonNaNT a, float= _status *status) =20 static float64 propagateFloat64NaN(float64 a, float64 b, float_status *sta= tus) { - flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; flag aIsLargerSignificand; uint64_t av, bv; + FloatClass a_cls, b_cls; + + /* This is not complete, but is good enough for pickNaN. */ + a_cls =3D (!float64_is_any_nan(a) + ? float_class_normal + : float64_is_signaling_nan(a, status) + ? float_class_snan + : float_class_qnan); + b_cls =3D (!float64_is_any_nan(b) + ? float_class_normal + : float64_is_signaling_nan(b, status) + ? float_class_snan + : float_class_qnan); =20 - aIsQuietNaN =3D float64_is_quiet_nan(a, status); - aIsSignalingNaN =3D float64_is_signaling_nan(a, status); - bIsQuietNaN =3D float64_is_quiet_nan(b, status); - bIsSignalingNaN =3D float64_is_signaling_nan(b, status); av =3D float64_val(a); bv =3D float64_val(b); =20 - if (aIsSignalingNaN | bIsSignalingNaN) { + if (is_snan(a_cls) || is_snan(b_cls)) { float_raise(float_flag_invalid, status); } =20 @@ -924,14 +907,13 @@ static float64 propagateFloat64NaN(float64 a, float64= b, float_status *status) aIsLargerSignificand =3D (av < bv) ? 1 : 0; } =20 - if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN, - aIsLargerSignificand)) { - if (bIsSignalingNaN) { + if (pickNaN(a_cls, b_cls, aIsLargerSignificand)) { + if (is_snan(b_cls)) { return float64_silence_nan(b, status); } return b; } else { - if (aIsSignalingNaN) { + if (is_snan(a_cls)) { return float64_silence_nan(a, status); } return a; @@ -1064,15 +1046,22 @@ static floatx80 commonNaNToFloatx80(commonNaNT a, f= loat_status *status) =20 floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b, float_status *status) { - flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; flag aIsLargerSignificand; + FloatClass a_cls, b_cls; =20 - aIsQuietNaN =3D floatx80_is_quiet_nan(a, status); - aIsSignalingNaN =3D floatx80_is_signaling_nan(a, status); - bIsQuietNaN =3D floatx80_is_quiet_nan(b, status); - bIsSignalingNaN =3D floatx80_is_signaling_nan(b, status); + /* This is not complete, but is good enough for pickNaN. */ + a_cls =3D (!floatx80_is_any_nan(a) + ? float_class_normal + : floatx80_is_signaling_nan(a, status) + ? float_class_snan + : float_class_qnan); + b_cls =3D (!floatx80_is_any_nan(b) + ? float_class_normal + : floatx80_is_signaling_nan(b, status) + ? float_class_snan + : float_class_qnan); =20 - if (aIsSignalingNaN | bIsSignalingNaN) { + if (is_snan(a_cls) || is_snan(b_cls)) { float_raise(float_flag_invalid, status); } =20 @@ -1088,14 +1077,13 @@ floatx80 propagateFloatx80NaN(floatx80 a, floatx80 = b, float_status *status) aIsLargerSignificand =3D (a.high < b.high) ? 1 : 0; } =20 - if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN, - aIsLargerSignificand)) { - if (bIsSignalingNaN) { + if (pickNaN(a_cls, b_cls, aIsLargerSignificand)) { + if (is_snan(b_cls)) { return floatx80_silence_nan(b, status); } return b; } else { - if (aIsSignalingNaN) { + if (is_snan(a_cls)) { return floatx80_silence_nan(a, status); } return a; @@ -1206,15 +1194,22 @@ static float128 commonNaNToFloat128(commonNaNT a, f= loat_status *status) static float128 propagateFloat128NaN(float128 a, float128 b, float_status *status) { - flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; flag aIsLargerSignificand; + FloatClass a_cls, b_cls; =20 - aIsQuietNaN =3D float128_is_quiet_nan(a, status); - aIsSignalingNaN =3D float128_is_signaling_nan(a, status); - bIsQuietNaN =3D float128_is_quiet_nan(b, status); - bIsSignalingNaN =3D float128_is_signaling_nan(b, status); + /* This is not complete, but is good enough for pickNaN. */ + a_cls =3D (!float128_is_any_nan(a) + ? float_class_normal + : float128_is_signaling_nan(a, status) + ? float_class_snan + : float_class_qnan); + b_cls =3D (!float128_is_any_nan(b) + ? float_class_normal + : float128_is_signaling_nan(b, status) + ? float_class_snan + : float_class_qnan); =20 - if (aIsSignalingNaN | bIsSignalingNaN) { + if (is_snan(a_cls) || is_snan(b_cls)) { float_raise(float_flag_invalid, status); } =20 @@ -1230,14 +1225,13 @@ static float128 propagateFloat128NaN(float128 a, fl= oat128 b, aIsLargerSignificand =3D (a.high < b.high) ? 1 : 0; } =20 - if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN, - aIsLargerSignificand)) { - if (bIsSignalingNaN) { + if (pickNaN(a_cls, b_cls, aIsLargerSignificand)) { + if (is_snan(b_cls)) { return float128_silence_nan(b, status); } return b; } else { - if (aIsSignalingNaN) { + if (is_snan(a_cls)) { return float128_silence_nan(a, status); } return a; diff --git a/fpu/softfloat.c b/fpu/softfloat.c index cce94136d4..cd56beb277 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -181,6 +181,22 @@ typedef enum __attribute__ ((__packed__)) { float_class_snan, } FloatClass; =20 +/* Simple helpers for checking if what NaN we have */ +static bool is_nan(FloatClass c) +{ + return unlikely(c >=3D float_class_qnan); +} + +static bool is_snan(FloatClass c) +{ + return c =3D=3D float_class_snan; +} + +static bool is_qnan(FloatClass c) +{ + return c =3D=3D float_class_qnan; +} + /* * Structure holding all of the decomposed parts of a float. The * exponent is unbiased and the fraction is normalized. All @@ -546,22 +562,6 @@ static float64 float64_round_pack_canonical(FloatParts= p, float_status *s) return float64_pack_raw(round_canonical(p, s, &float64_params)); } =20 -/* Simple helpers for checking if what NaN we have */ -static bool is_nan(FloatClass c) -{ - return unlikely(c >=3D float_class_qnan); -} - -static bool is_snan(FloatClass c) -{ - return c =3D=3D float_class_snan; -} - -static bool is_qnan(FloatClass c) -{ - return c =3D=3D float_class_qnan; -} - static FloatParts return_nan(FloatParts a, float_status *s) { switch (a.cls) { @@ -590,8 +590,7 @@ static FloatParts pick_nan(FloatParts a, FloatParts b, = float_status *s) if (s->default_nan_mode) { return parts_default_nan(s); } else { - if (pickNaN(is_qnan(a.cls), is_snan(a.cls), - is_qnan(b.cls), is_snan(b.cls), + if (pickNaN(a.cls, b.cls, a.frac > b.frac || (a.frac =3D=3D b.frac && a.sign < b.sign))) { a =3D b; --=20 2.17.0 From nobody Wed Oct 29 20:33:39 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526000359514782.0524286697497; Thu, 10 May 2018 17:59:19 -0700 (PDT) Received: from localhost ([::1]:36233 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwP0-0006Oc-QG for importer@patchew.org; Thu, 10 May 2018 20:59:18 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52141) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fGwAS-0007XY-Oo for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fGwAR-0004uo-IG for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:16 -0400 Received: from mail-pg0-x244.google.com ([2607:f8b0:400e:c05::244]:36262) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fGwAR-0004ue-9r for qemu-devel@nongnu.org; Thu, 10 May 2018 20:44:15 -0400 Received: by mail-pg0-x244.google.com with SMTP id z70-v6so1681623pgz.3 for ; Thu, 10 May 2018 17:44:15 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id y24-v6sm4216728pfn.23.2018.05.10.17.44.12 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 May 2018 17:44:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=MS+jabeFcvUCqsXLya/uB7mpbDAjQtdDouXTp4BblTw=; b=cNa6kqeUw781oBrG3DN3GEbNEo386oD2PAYucm8puPLnrFkcyj0F16xUF6eMFK5tzE fjhO+SPbT9iYJtrfKC/IFRga0heFFWW7w9SzHaOZXCzKoJ7zrctpEAKNQ5sX88zY17pT JGlZTx7htcZJ4gqCqTBqg/Kn4NA5oag5EWrEc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=MS+jabeFcvUCqsXLya/uB7mpbDAjQtdDouXTp4BblTw=; b=f9b1uUwvzmocOBjj/NTGM1qGG+FYFzizWsmEVNUO5s9GV3VOXTBFfDajQx17E9mXWy en8n2Wd9tWEfwVLxTbO581Cbd8/lzIVfNxXqYY8ib4FVNOaEi4a5e4xni15ieVegCZqe I5HaeX9VMuDA++QMexfe6kjjRRlKX32jHNxeWeIfP+TzGw1WX7kAG3sAWrKiW8jdPa2K 9bF/YHjfvOsg7oc6o8o2aLmPxvxt/0zXDku32tZZcLjWU0oFJqQ79Pw1n/fznyPHS3UV uAkvRARjb/zTMNtGzqgkGAFzRLwoMp65T23FEEDjbgUEXFNNP3DJGZf1T3WK2eqjVNx/ 37cA== X-Gm-Message-State: ALKqPwcKaeROmAPPQteurF8V+HG0DVcywiubqRfu3+oFGcQbkrdOKoMj AEHFnZA6SfhRvtAF7GPNjzJ3TwW1iWI= X-Google-Smtp-Source: AB8JxZqu3mFKLNqCeJjh5IIp+310dlBFGZo0TdXnGR92GMySGmYDNqL621qH/mmAxOjoj7vGXazlCg== X-Received: by 2002:a65:6645:: with SMTP id z5-v6mr2746957pgv.43.1525999453950; Thu, 10 May 2018 17:44:13 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 10 May 2018 17:43:45 -0700 Message-Id: <20180511004345.26708-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180511004345.26708-1-richard.henderson@linaro.org> References: <20180511004345.26708-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::244 Subject: [Qemu-devel] [PATCH 19/19] fpu/softfloat: Pass FloatClass to pickNaNMulAdd X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" For each operand, pass a single enumeration instead of a pair of booleans. Signed-off-by: Richard Henderson --- fpu/softfloat-specialize.h | 70 +++++++++++++++----------------------- fpu/softfloat.c | 11 +++--- 2 files changed, 31 insertions(+), 50 deletions(-) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 83e5bf83b9..637f1ea1be 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -583,15 +583,14 @@ static int pickNaN(FloatClass a_cls, FloatClass b_cls, | information. | Return values : 0 : a; 1 : b; 2 : c; 3 : default-NaN *-------------------------------------------------------------------------= ---*/ -#if defined(TARGET_ARM) -static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bI= sSNaN, - flag cIsQNaN, flag cIsSNaN, flag infzero, - float_status *status) +static int pickNaNMulAdd(FloatClass a_cls, FloatClass b_cls, FloatClass c_= cls, + bool infzero, float_status *status) { +#if defined(TARGET_ARM) /* For ARM, the (inf,zero,qnan) case sets InvalidOp and returns * the default NaN */ - if (infzero && cIsQNaN) { + if (infzero && is_qnan(c_cls)) { float_raise(float_flag_invalid, status); return 3; } @@ -599,25 +598,20 @@ static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, = flag bIsQNaN, flag bIsSNaN, /* This looks different from the ARM ARM pseudocode, because the ARM A= RM * puts the operands to a fused mac operation (a*b)+c in the order c,a= ,b. */ - if (cIsSNaN) { + if (is_snan(c_cls)) { return 2; - } else if (aIsSNaN) { + } else if (is_snan(a_cls)) { return 0; - } else if (bIsSNaN) { + } else if (is_snan(b_cls)) { return 1; - } else if (cIsQNaN) { + } else if (is_qnan(c_cls)) { return 2; - } else if (aIsQNaN) { + } else if (is_qnan(a_cls)) { return 0; } else { return 1; } -} #elif defined(TARGET_MIPS) -static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bI= sSNaN, - flag cIsQNaN, flag cIsSNaN, flag infzero, - float_status *status) -{ /* For MIPS, the (inf,zero,qnan) case sets InvalidOp and returns * the default NaN */ @@ -628,41 +622,36 @@ static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, = flag bIsQNaN, flag bIsSNaN, =20 if (SNAN_BIT_IS_ONE(status)) { /* Prefer sNaN over qNaN, in the a, b, c order. */ - if (aIsSNaN) { + if (is_snan(a_cls)) { return 0; - } else if (bIsSNaN) { + } else if (is_snan(b_cls)) { return 1; - } else if (cIsSNaN) { + } else if (is_snan(c_cls)) { return 2; - } else if (aIsQNaN) { + } else if (is_qnan(a_cls)) { return 0; - } else if (bIsQNaN) { + } else if (is_qnan(b_cls)) { return 1; } else { return 2; } } else { /* Prefer sNaN over qNaN, in the c, a, b order. */ - if (cIsSNaN) { + if (is_snan(c_cls)) { return 2; - } else if (aIsSNaN) { + } else if (is_snan(a_cls)) { return 0; - } else if (bIsSNaN) { + } else if (is_snan(b_cls)) { return 1; - } else if (cIsQNaN) { + } else if (is_qnan(c_cls)) { return 2; - } else if (aIsQNaN) { + } else if (is_qnan(a_cls)) { return 0; } else { return 1; } } -} #elif defined(TARGET_PPC) -static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bI= sSNaN, - flag cIsQNaN, flag cIsSNaN, flag infzero, - float_status *status) -{ /* For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer * to return an input NaN if we have one (ie c) rather than generating * a default NaN @@ -675,31 +664,26 @@ static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, = flag bIsQNaN, flag bIsSNaN, /* If fRA is a NaN return it; otherwise if fRB is a NaN return it; * otherwise return fRC. Note that muladd on PPC is (fRA * fRC) + frB */ - if (aIsSNaN || aIsQNaN) { + if (is_nan(a_cls)) { return 0; - } else if (cIsSNaN || cIsQNaN) { + } else if (is_nan(c_cls)) { return 2; } else { return 1; } -} #else -/* A default implementation: prefer a to b to c. - * This is unlikely to actually match any real implementation. - */ -static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bI= sSNaN, - flag cIsQNaN, flag cIsSNaN, flag infzero, - float_status *status) -{ - if (aIsSNaN || aIsQNaN) { + /* A default implementation: prefer a to b to c. + * This is unlikely to actually match any real implementation. + */ + if (is_nan(a_cls)) { return 0; - } else if (bIsSNaN || bIsQNaN) { + } else if (is_nan(b_cls)) { return 1; } else { return 2; } -} #endif +} =20 /*------------------------------------------------------------------------= ---- | Takes two single-precision floating-point values `a' and `b', one of whi= ch diff --git a/fpu/softfloat.c b/fpu/softfloat.c index cd56beb277..4e957a5d6f 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -182,17 +182,17 @@ typedef enum __attribute__ ((__packed__)) { } FloatClass; =20 /* Simple helpers for checking if what NaN we have */ -static bool is_nan(FloatClass c) +static inline __attribute__((unused)) bool is_nan(FloatClass c) { return unlikely(c >=3D float_class_qnan); } =20 -static bool is_snan(FloatClass c) +static inline __attribute__((unused)) bool is_snan(FloatClass c) { return c =3D=3D float_class_snan; } =20 -static bool is_qnan(FloatClass c) +static inline __attribute__((unused)) bool is_qnan(FloatClass c) { return c =3D=3D float_class_qnan; } @@ -612,10 +612,7 @@ static FloatParts pick_nan_muladd(FloatParts a, FloatP= arts b, FloatParts c, if (s->default_nan_mode) { return parts_default_nan(s); } else { - switch (pickNaNMulAdd(is_qnan(a.cls), is_snan(a.cls), - is_qnan(b.cls), is_snan(b.cls), - is_qnan(c.cls), is_snan(c.cls), - inf_zero, s)) { + switch (pickNaNMulAdd(a.cls, b.cls, c.cls, inf_zero, s)) { case 0: break; case 1: --=20 2.17.0