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X-Received-From: 2607:f8b0:400e:c05::244 Subject: [Qemu-devel] [PULL 08/28] target/arm: avoid integer overflow in next_page PC check X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Sagar Karandikar , David Hildenbrand , Palmer Dabbelt , Mark Cave-Ayland , Max Filippov , Michael Clark , "Edgar E. Iglesias" , Guan Xuetao , Yongbok Kim , Alexander Graf , "Emilio G. Cota" , Richard Henderson , Artyom Tarasenko , Eduardo Habkost , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Stafford Horne , David Gibson , Peter Crosthwaite , Bastian Koppelmann , Cornelia Huck , Michael Walle , qemu-ppc@nongnu.org, Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Emilio G. Cota" If the PC is in the last page of the address space, next_page_start overflows to 0. Fix it. Reviewed-by: Richard Henderson Cc: Peter Maydell Signed-off-by: Emilio G. Cota Signed-off-by: Richard Henderson --- target/arm/translate.h | 2 +- target/arm/translate.c | 11 +++++------ 2 files changed, 6 insertions(+), 7 deletions(-) diff --git a/target/arm/translate.h b/target/arm/translate.h index 4428c98e2e..37a1bba056 100644 --- a/target/arm/translate.h +++ b/target/arm/translate.h @@ -9,7 +9,7 @@ typedef struct DisasContext { DisasContextBase base; =20 target_ulong pc; - target_ulong next_page_start; + target_ulong page_start; uint32_t insn; /* Nonzero if this instruction has been conditionally skipped. */ int condjmp; diff --git a/target/arm/translate.c b/target/arm/translate.c index ad208867a7..0f6629f745 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -9930,7 +9930,7 @@ static bool thumb_insn_is_16bit(DisasContext *s, uint= 32_t insn) return false; } =20 - if ((insn >> 11) =3D=3D 0x1e && (s->pc < s->next_page_start - 3)) { + if ((insn >> 11) =3D=3D 0x1e && s->pc - s->page_start < TARGET_PAGE_SI= ZE - 3) { /* 0b1111_0xxx_xxxx_xxxx : BL/BLX prefix, and the suffix * is not on the next page; we merge this into a 32-bit * insn. @@ -12301,8 +12301,7 @@ static int arm_tr_init_disas_context(DisasContextBa= se *dcbase, dc->is_ldex =3D false; dc->ss_same_el =3D false; /* Can't be true since EL_d must be AArch64 = */ =20 - dc->next_page_start =3D - (dc->base.pc_first & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; + dc->page_start =3D dc->base.pc_first & TARGET_PAGE_MASK; =20 /* If architectural single step active, limit to 1. */ if (is_singlestepping(dc)) { @@ -12312,7 +12311,7 @@ static int arm_tr_init_disas_context(DisasContextBa= se *dcbase, /* ARM is a fixed-length ISA. Bound the number of insns to execute to those left on the page. */ if (!dc->thumb) { - int bound =3D (dc->next_page_start - dc->base.pc_first) / 4; + int bound =3D -(dc->base.pc_first | TARGET_PAGE_MASK) / 4; max_insns =3D MIN(max_insns, bound); } =20 @@ -12584,8 +12583,8 @@ static void thumb_tr_translate_insn(DisasContextBas= e *dcbase, CPUState *cpu) * but isn't very efficient). */ if (dc->base.is_jmp =3D=3D DISAS_NEXT - && (dc->pc >=3D dc->next_page_start - || (dc->pc >=3D dc->next_page_start - 3 + && (dc->pc - dc->page_start >=3D TARGET_PAGE_SIZE + || (dc->pc - dc->page_start >=3D TARGET_PAGE_SIZE - 3 && insn_crosses_page(env, dc)))) { dc->base.is_jmp =3D DISAS_TOO_MANY; } --=20 2.17.0