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Iglesias" To: qemu-devel@nongnu.org Date: Tue, 8 May 2018 19:31:33 +0200 Message-Id: <20180508173152.29327-18-edgar.iglesias@gmail.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180508173152.29327-1-edgar.iglesias@gmail.com> References: <20180508173152.29327-1-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4010:c07::241 Subject: [Qemu-devel] [PATCH v2 17/36] target-microblaze: dec_msr: Use bool and extract32 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, sai.pavan.boddu@xilinx.com, frasse.iglesias@gmail.com, alistair@alistair23.me, richard.henderson@linaro.org, frederic.konrad@adacore.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Edgar E. Iglesias" Use bool and extract32 to represent the to, clr and clrset flags. No functional change. Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson Signed-off-by: Edgar E. Iglesias --- target/microblaze/translate.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 4290fb2eaf..0593aff692 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -458,17 +458,20 @@ static void dec_msr(DisasContext *dc) { CPUState *cs =3D CPU(dc->cpu); TCGv_i32 t0, t1; - unsigned int sr, to, rn; + unsigned int sr, rn; + bool to, clrset; =20 - sr =3D dc->imm & ((1 << 14) - 1); - to =3D dc->imm & (1 << 14); + sr =3D extract32(dc->imm, 0, 14); + to =3D extract32(dc->imm, 14, 1); + clrset =3D extract32(dc->imm, 15, 1) =3D=3D 0; dc->type_b =3D 1; - if (to) + if (to) { dc->cpustate_changed =3D 1; + } =20 /* msrclr and msrset. */ - if (!(dc->imm & (1 << 15))) { - unsigned int clr =3D dc->ir & (1 << 16); + if (clrset) { + bool clr =3D extract32(dc->ir, 16, 1); =20 LOG_DIS("msr%s r%d imm=3D%x\n", clr ? "clr" : "set", dc->rd, dc->imm); --=20 2.14.1