From nobody Wed Oct 29 11:33:35 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525413906737669.608826675511; Thu, 3 May 2018 23:05:06 -0700 (PDT) Received: from localhost ([::1]:60664 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fETpw-0001Z7-M1 for importer@patchew.org; Fri, 04 May 2018 02:04:56 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43218) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fETks-00063P-H4 for qemu-devel@nongnu.org; Fri, 04 May 2018 01:59:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fETkq-0007No-Pr for qemu-devel@nongnu.org; Fri, 04 May 2018 01:59:42 -0400 Received: from ozlabs.org ([203.11.71.1]:38461) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fETkq-0007IG-60; Fri, 04 May 2018 01:59:40 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 40chDQ6Tmbz9s7m; Fri, 4 May 2018 15:59:34 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1525413574; bh=AGM1qV7ezfR+nQ6MErBda93GW7qYnyE6K3yn7s6erOQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Wn3KFSfxEx4mRWmqBopuj/7ezsNzzJhMAWqsE0h+087eXpDoobPfzO1MF5PjN5JAf Hxpha355YyFOZP3PVYkKzZKwpawLR8YrnrTXYZm5O07L3ZFyi6CyitGtbxEpi1LXE0 bdx5QixdSjENHlrZuatxaJBOtSZfgFOX/VRq81lA= From: David Gibson To: peter.maydell@linaro.org Date: Fri, 4 May 2018 15:59:20 +1000 Message-Id: <20180504055930.3786-8-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180504055930.3786-1-david@gibson.dropbear.id.au> References: <20180504055930.3786-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PULL 07/17] spapr: Make a helper to set up cpu entry point state X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, groug@kaod.org, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, clg@kaod.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Under PAPR, only the boot CPU is active when the system starts. Other cpus must be explicitly activated using an RTAS call. The entry state for the boot and secondary cpus isn't identical, but it has some things in common. We're going to add a bit more common setup later, too, so to simplify make a helper which sets up the common entry state for both boot and secondary cpu threads. Signed-off-by: David Gibson Signed-off-by: C=C3=A9dric Le Goater Tested-by: C=C3=A9dric Le Goater Reviewed-by: Greg Kurz --- hw/ppc/spapr.c | 4 +--- hw/ppc/spapr_cpu_core.c | 9 +++++++++ hw/ppc/spapr_rtas.c | 6 ++---- include/hw/ppc/spapr_cpu_core.h | 3 +++ 4 files changed, 15 insertions(+), 7 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index ed9b6a9535..535d8276df 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1668,10 +1668,8 @@ static void spapr_machine_reset(void) g_free(fdt); =20 /* Set up the entry state */ - first_ppc_cpu->env.gpr[3] =3D fdt_addr; + spapr_cpu_set_entry_state(first_ppc_cpu, SPAPR_ENTRY_POINT, fdt_addr); first_ppc_cpu->env.gpr[5] =3D 0; - first_cpu->halted =3D 0; - first_ppc_cpu->env.nip =3D SPAPR_ENTRY_POINT; =20 spapr->cas_reboot =3D false; } diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 01dbc69424..a98c7b04c6 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -52,6 +52,15 @@ static void spapr_cpu_reset(void *opaque) =20 } =20 +void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, target_u= long r3) +{ + CPUPPCState *env =3D &cpu->env; + + env->nip =3D nip; + env->gpr[3] =3D r3; + CPU(cpu)->halted =3D 0; +} + static void spapr_cpu_destroy(PowerPCCPU *cpu) { qemu_unregister_reset(spapr_cpu_reset, cpu); diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index df073447c5..840d198a8d 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -37,6 +37,7 @@ #include "hw/ppc/spapr.h" #include "hw/ppc/spapr_vio.h" #include "hw/ppc/spapr_rtas.h" +#include "hw/ppc/spapr_cpu_core.h" #include "hw/ppc/ppc.h" #include "hw/boards.h" =20 @@ -173,10 +174,7 @@ static void rtas_start_cpu(PowerPCCPU *callcpu, sPAPRM= achineState *spapr, */ newcpu->env.tb_env->tb_offset =3D callcpu->env.tb_env->tb_offset; =20 - env->nip =3D start; - env->gpr[3] =3D r3; - - CPU(newcpu)->halted =3D 0; + spapr_cpu_set_entry_state(newcpu, start, r3); =20 qemu_cpu_kick(CPU(newcpu)); =20 diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_cor= e.h index 1129f344aa..47dcfda12b 100644 --- a/include/hw/ppc/spapr_cpu_core.h +++ b/include/hw/ppc/spapr_cpu_core.h @@ -12,6 +12,7 @@ #include "hw/qdev.h" #include "hw/cpu/core.h" #include "target/ppc/cpu-qom.h" +#include "target/ppc/cpu.h" =20 #define TYPE_SPAPR_CPU_CORE "spapr-cpu-core" #define SPAPR_CPU_CORE(obj) \ @@ -38,4 +39,6 @@ typedef struct sPAPRCPUCoreClass { } sPAPRCPUCoreClass; =20 const char *spapr_get_cpu_core_type(const char *cpu_type); +void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, target_u= long r3); + #endif --=20 2.17.0