From nobody Wed Oct 29 20:26:46 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 152532865714957.593715792051626; Wed, 2 May 2018 23:24:17 -0700 (PDT) Received: from localhost ([::1]:54181 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE7ey-0008NX-87 for importer@patchew.org; Thu, 03 May 2018 02:24:08 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40962) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE7cs-00074z-2r for qemu-devel@nongnu.org; Thu, 03 May 2018 02:21:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE7cq-0002Os-9j for qemu-devel@nongnu.org; Thu, 03 May 2018 02:21:58 -0400 Received: from ozlabs.org ([203.11.71.1]:52433) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fE7cp-0002Nj-K7; Thu, 03 May 2018 02:21:56 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 40c4mZ5rMhz9s7X; Thu, 3 May 2018 16:21:50 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1525328510; bh=i4ELIl7hpknpcdceDGInniFoBkrKQv+zVbkat9uYNHM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cWJ8kq+2503K5cA5hPmG7mcYy7Wc27MF8g/fzDYUOY/C3xUBCcrt1O/d3jIJ3HH5u eUnPCyfeuLtZ3dP+f2/IscdFruyEcrsdT2s0k6NfxPboPGaQtJjgHqcQIHMgBsRdSH JoDEx+V7BsKIMUNXUkmEcutiTvw6+WHyxhLDHMSM= From: David Gibson To: groug@kaod.org, clg@kaod.org Date: Thu, 3 May 2018 16:21:45 +1000 Message-Id: <20180503062145.17899-9-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180503062145.17899-1-david@gibson.dropbear.id.au> References: <20180503062145.17899-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PATCH 8/8] spapr: Clean up handling of LPCR power-saving exit bits X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" To prevent spurious wakeups on cpus that are supposed to be disabled, we need to clear the LPCR bits which control certain wakeup events. spapr_cpu_reset() has separate cases here for boot and non-boot (initially inactive) cpus. rtas_start_cpu() then turns the LPCR bits on when the non-boot cpus are activated. But explicit checks against first_cpu are not how we usually do things: instead spapr_cpu_reset() generally sets things up for non-boot (inactive) cpus, then spapr_machine_reset() and/or rtas_start_cpu() override as necessary. So, do that instead. Because the LPCR activation is identical for boot cpus and non-boot cpus just activated with rtas_start_cpu() we can put the code common in spapr_cpu_set_entry_state(). Signed-off-by: David Gibson Reviewed-by: C=C3=A9dric Le Goater Tested-by: C=C3=A9dric Le Goater --- hw/ppc/spapr_cpu_core.c | 22 +++++++--------------- hw/ppc/spapr_rtas.c | 2 +- 2 files changed, 8 insertions(+), 16 deletions(-) diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index a52ddade5e..f3e9b879b2 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -54,28 +54,17 @@ static void spapr_cpu_reset(void *opaque) * Clearing VPM0 will also cause us to use RMOR in mmu-hash64.c for * real mode accesses, which thankfully defaults to 0 and isn't * accessible in guest mode. + * + * Disable Power-saving mode Exit Cause exceptions for the CPU, so + * we don't get spurious wakups before an RTAS start-cpu call. */ - lpcr &=3D ~(LPCR_VPM0 | LPCR_VPM1 | LPCR_ISL | LPCR_KBV); + lpcr &=3D ~(LPCR_VPM0 | LPCR_VPM1 | LPCR_ISL | LPCR_KBV | pcc->lpcr_pm= ); lpcr |=3D LPCR_LPES0 | LPCR_LPES1; =20 /* Set RMLS to the max (ie, 16G) */ lpcr &=3D ~LPCR_RMLS; lpcr |=3D 1ull << LPCR_RMLS_SHIFT; =20 - /* Only enable Power-saving mode Exit Cause exceptions on the boot - * CPU. The RTAS command start-cpu will enable them on secondaries. - */ - if (cs =3D=3D first_cpu) { - lpcr |=3D pcc->lpcr_pm; - } - - /* Disable Power-saving mode Exit Cause exceptions for the CPU. - * This can cause issues when rebooting the guest if a secondary - * is awaken */ - if (cs !=3D first_cpu) { - lpcr &=3D ~pcc->lpcr_pm; - } - ppc_store_lpcr(cpu, lpcr); =20 /* Set a full AMOR so guest can use the AMR as it sees fit */ @@ -84,11 +73,14 @@ static void spapr_cpu_reset(void *opaque) =20 void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, target_u= long r3) { + PowerPCCPUClass *pcc =3D POWERPC_CPU_GET_CLASS(cpu); CPUPPCState *env =3D &cpu->env; =20 env->nip =3D nip; env->gpr[3] =3D r3; CPU(cpu)->halted =3D 0; + /* Enable Power-saving mode Exit Cause exceptions */ + ppc_store_lpcr(cpu, env->spr[SPR_LPCR] | pcc->lpcr_pm); } =20 static void spapr_cpu_destroy(PowerPCCPU *cpu) diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index 652233bdf1..7f9738daed 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -162,7 +162,7 @@ static void rtas_start_cpu(PowerPCCPU *callcpu, sPAPRMa= chineState *spapr, env->msr =3D (1ULL << MSR_SF) | (1ULL << MSR_ME); =20 /* Enable Power-saving mode Exit Cause exceptions for the new CPU */ - lpcr =3D env->spr[SPR_LPCR] | pcc->lpcr_pm; + lpcr =3D env->spr[SPR_LPCR]; if (!pcc->interrupts_big_endian(callcpu)) { lpcr |=3D LPCR_ILE; } --=20 2.17.0