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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.16.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:16:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+NJcK2bxHsiTQWd1zChLZWnGl5un7Pg1c9+Vm3qmlP8=; b=edVsKRIHqE6KZU26kmq98OIAhB0lnubunVMxNkN+pbFB13uCPnSn0QOcusDzb9G0r5 If2Nv1D8wA66/ztKkHo3+LI4NBTuzJ4Ae8LZBdKtp4pph4jTf93LKn4IyyQwj/SPsbwB luG9KUfcZQyIA9PJxyE4lZOMRzDRNebwKFK80= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+NJcK2bxHsiTQWd1zChLZWnGl5un7Pg1c9+Vm3qmlP8=; b=Zbw6w/DXWk1asSejS3r811UY3q1Qe0fbaRXAlVqIt5zImfMfIFaNlR+sRX3tKQKWsv wIuDm3L92sDxAMEb4WUiKohHCTwPyAO5+lDiuzbV5U4ssxqTmd6jx9UPAWGw9oPUFmLa ig4XTJ5XRdla3t3J21IYSFs+RI0f5nrtz8B+8Za4Yp2f0/bBHJLZVyB2o7kuErLvHtlj K66i82UHqik9u8Mdv7PBVAtOn6uqhk1iv2qY/XgDs/8HX8TOAIFBj0DOt1z+r9MUQDw0 5X8C/5ixp0JWkSFGRBm5DGUzJ0P33hr9e5t661SMr6vK3WyDjcq6JHh4Uah0TMx1/lle MsMA== X-Gm-Message-State: ALQs6tDNpWS3F7oj0iyy0uktsVBVyoWV/EUef1NUfsHsYRnDwMsKiR14 0hnFjV0gkp9Fi4xBu7M+aDOytlw5AyE= X-Google-Smtp-Source: AB8JxZrzTSRcX5Ln558Znh0hXLnc5JBDjRaA+rdpr2kUf8tLKEKSXgv3Wo46u7NWtAqEl6GIz1sMRw== X-Received: by 10.98.19.151 with SMTP id 23mr21028182pft.222.1525299367890; Wed, 02 May 2018 15:16:07 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:48 -0700 Message-Id: <20180502221552.3873-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::243 Subject: [Qemu-devel] [PATCH v2 10/14] target/arm: Implement FP data-processing (3 source) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 We missed all of the scalar fp16 fma operations. Cc: qemu-stable@nongnu.org Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 48 ++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 48 insertions(+) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index d7a49ef2e4..9322b0d896 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5240,6 +5240,44 @@ static void handle_fp_3src_double(DisasContext *s, b= ool o0, bool o1, tcg_temp_free_i64(tcg_res); } =20 +/* Floating-point data-processing (3 source) - half precision */ +static void handle_fp_3src_half(DisasContext *s, bool o0, bool o1, + int rd, int rn, int rm, int ra) +{ + TCGv_i32 tcg_op1, tcg_op2, tcg_op3; + TCGv_i32 tcg_res =3D tcg_temp_new_i32(); + TCGv_ptr fpst =3D get_fpstatus_ptr(true); + + tcg_op1 =3D read_fp_hreg(s, rn); + tcg_op2 =3D read_fp_hreg(s, rm); + tcg_op3 =3D read_fp_hreg(s, ra); + + /* These are fused multiply-add, and must be done as one + * floating point operation with no rounding between the + * multiplication and addition steps. + * NB that doing the negations here as separate steps is + * correct : an input NaN should come out with its sign bit + * flipped if it is a negated-input. + */ + if (o1 =3D=3D true) { + tcg_gen_xori_i32(tcg_op3, tcg_op3, 0x8000); + } + + if (o0 !=3D o1) { + tcg_gen_xori_i32(tcg_op1, tcg_op1, 0x8000); + } + + gen_helper_advsimd_muladdh(tcg_res, tcg_op1, tcg_op2, tcg_op3, fpst); + + write_fp_sreg(s, rd, tcg_res); + + tcg_temp_free_ptr(fpst); + tcg_temp_free_i32(tcg_op1); + tcg_temp_free_i32(tcg_op2); + tcg_temp_free_i32(tcg_op3); + tcg_temp_free_i32(tcg_res); +} + /* Floating point data-processing (3 source) * 31 30 29 28 24 23 22 21 20 16 15 14 10 9 5 4 0 * +---+---+---+-----------+------+----+------+----+------+------+------+ @@ -5269,6 +5307,16 @@ static void disas_fp_3src(DisasContext *s, uint32_t = insn) } handle_fp_3src_double(s, o0, o1, rd, rn, rm, ra); break; + case 3: + if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + unallocated_encoding(s); + return; + } + if (!fp_access_check(s)) { + return; + } + handle_fp_3src_half(s, o0, o1, rd, rn, rm, ra); + break; default: unallocated_encoding(s); } --=20 2.14.3