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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.15.54 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:15:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ttF+PGQCCRk+6WGb0b/LmzzNUpVRejL7hhsfT7m+hVs=; b=P97L7+WAfrFaZJHhzeNQe46cRIyFVwkBymc4n1oguuZzDSzh35LSFEsb3ExIO9rOS3 F4GkDWZUqGEYB//Mm24FfRgO5KozZVN7ioITIwtmNajDMiige4++JGH2kydmOhNpsncr G0G01uGBpHI+/o4fAxSDZekAsrj6C4NpSqtOA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ttF+PGQCCRk+6WGb0b/LmzzNUpVRejL7hhsfT7m+hVs=; b=TN03EQe1AVw2uDEfLu4VapDkJQreW0BddzZEd6TGfVpBWblPscwWPiWFq6AfBfGsbJ d4IcNe+C+RZz2fwivVUSPDspZKKaj9yf9nMEm1ImQp8/kRV0ZpasawMyRJi4YSjnXMbR LH8DMXDXeVGTMpw27++9QlS/6k/EiQLZVis94KYkzjDtQDULNkxPJnaGxK8Wspvo5ZVE 2OzMyT2zsCcGnnMuNZ+yE6W42VPH/thvRZx9AJumRyaav79PKbg+BQcys91BMoz1ife8 6QdUFxaKZe01l8YmuK7KGksLCRGxE/3pWg4v16c74JvGNvwCGa0OEucvrYQ9iB31wNzR 7aYA== X-Gm-Message-State: ALQs6tACSFS6mF4xa5gMHeo5TFebcLJMt7W92AR/++81OpAmW4PBl/J5 zD9CH6EFK4zdvY84ml6MQIaTCYxF6C8= X-Google-Smtp-Source: AB8JxZoH8kFC+3p+iPQ43emRrW7UOnpxdImwImXdJne3Sqxx+d3QeeJBKICdwBDt8kRBJWcWvU8xLw== X-Received: by 2002:a65:6027:: with SMTP id p7-v6mr3856905pgu.210.1525299356105; Wed, 02 May 2018 15:15:56 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:39 -0700 Message-Id: <20180502221552.3873-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::244 Subject: [Qemu-devel] [PATCH v2 01/14] target/arm: Implement vector shifted SCVF/UCVF for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" While we have some of the scalar paths for *CVF for fp16, we failed to decode the fp16 version of these instructions. Cc: qemu-stable@nongnu.org Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- v2: Use parens with (x << y) >> z. --- target/arm/translate-a64.c | 33 ++++++++++++++++++++------------- 1 file changed, 20 insertions(+), 13 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index bff4e13bf6..68ca445691 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -7165,13 +7165,26 @@ static void handle_simd_shift_intfp_conv(DisasConte= xt *s, bool is_scalar, int immh, int immb, int opcode, int rn, int rd) { - bool is_double =3D extract32(immh, 3, 1); - int size =3D is_double ? MO_64 : MO_32; - int elements; + int size, elements, fracbits; int immhb =3D immh << 3 | immb; - int fracbits =3D (is_double ? 128 : 64) - immhb; =20 - if (!extract32(immh, 2, 2)) { + if (immh & 8) { + size =3D MO_64; + if (!is_scalar && !is_q) { + unallocated_encoding(s); + return; + } + } else if (immh & 4) { + size =3D MO_32; + } else if (immh & 2) { + size =3D MO_16; + if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + unallocated_encoding(s); + return; + } + } else { + /* immh =3D=3D 0 would be a failure of the decode logic */ + g_assert(immh =3D=3D 1); unallocated_encoding(s); return; } @@ -7179,20 +7192,14 @@ static void handle_simd_shift_intfp_conv(DisasConte= xt *s, bool is_scalar, if (is_scalar) { elements =3D 1; } else { - elements =3D is_double ? 2 : is_q ? 4 : 2; - if (is_double && !is_q) { - unallocated_encoding(s); - return; - } + elements =3D (8 << is_q) >> size; } + fracbits =3D (16 << size) - immhb; =20 if (!fp_access_check(s)) { return; } =20 - /* immh =3D=3D 0 would be a failure of the decode logic */ - g_assert(immh); - handle_simd_intfp_conv(s, rd, rn, elements, !is_u, fracbits, size); } =20 --=20 2.14.3 From nobody Wed Oct 29 20:36:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525299656755748.9861498995685; Wed, 2 May 2018 15:20:56 -0700 (PDT) Received: from localhost ([::1]:52815 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE07J-0003rh-LL for importer@patchew.org; Wed, 02 May 2018 18:20:53 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58608) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02a-0000at-BS for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02Y-0007qJ-RC for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:00 -0400 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:42513) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02Y-0007pV-L3 for qemu-devel@nongnu.org; Wed, 02 May 2018 18:15:58 -0400 Received: by mail-pf0-x242.google.com with SMTP id p14so1579040pfh.9 for ; Wed, 02 May 2018 15:15:58 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.15.56 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:15:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/7Is7JNJJAWMsuntBwVi2s5wQjfXgdNNCqqq9DMfcWs=; b=Dib89hnSudeq1lR9lqlhhXVKPx83azCNoCDwFPf98GK0UNgQ4Z4+VHEHoiLeY998kt +J8QsjiEzPL9mxKpSYN7RU46lzMn0Nkg453QDOZmLE6p2ktdHzgxJfECBZKzkmxjItpw AVu2WPLKgJP9XRyND5hUxRsU9Tr9MBYtnC5/U= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/7Is7JNJJAWMsuntBwVi2s5wQjfXgdNNCqqq9DMfcWs=; b=JVvKmcDab4v5hIMzoz92yd+CBY+HehhUUkZAa2cE0x8AhKk7zz4e9FDmWXtNuuZqdv 1kNDF0nhSHHOJ/kKigH/O1XI1oTM7fuX8jqVj8qgnzknrhozyIvN9Kn0i/Jy7qz6ijxd /vtQkaPWxTEiMu8lHTHcGMtC8RdRY+d/wwB6/zX4uNxmjfLunTiIJvB9luJGcdakKXpl HBBYMW3DMa69dj8VopVG5/iYb8X+o7pHrQmh1mJHunVOsiIOEzeY5SpnOyXumEnytfKU ilpxIG8rsKV8mmqg6GdaPhPLnhmzbiDmBQGfZX0ztkdd8uF4143TH4XDxyVYIMm5FF7i 9PmQ== X-Gm-Message-State: ALQs6tD1WSjSqa/qiMAjLK98mHOgm38ivEP1MgsQNkY6O/TmbfQtgrNB o5O2UEqO0PiGJ3b/FBcxnSJHUBZ3BBU= X-Google-Smtp-Source: AB8JxZoVnVObeH7a+NjdecAP2p98ZF7FnLijmyoF1aUwfam4L/7QVQWpYoVBVGe2cwloQiXeMdSX1w== X-Received: by 2002:a65:6117:: with SMTP id z23-v6mr17103294pgu.72.1525299357362; Wed, 02 May 2018 15:15:57 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:40 -0700 Message-Id: <20180502221552.3873-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [PATCH v2 02/14] target/arm: Implement vector shifted FCVT for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" While we have some of the scalar paths for FCVT for fp16, we failed to decode the fp16 version of these instructions. Cc: qemu-stable@nongnu.org Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- v2: Use parens with (x << y) >> z. --- target/arm/translate-a64.c | 65 ++++++++++++++++++++++++++++++++----------= ---- 1 file changed, 46 insertions(+), 19 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 68ca445691..a64673575a 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -7208,19 +7208,28 @@ static void handle_simd_shift_fpint_conv(DisasConte= xt *s, bool is_scalar, bool is_q, bool is_u, int immh, int immb, int rn, int r= d) { - bool is_double =3D extract32(immh, 3, 1); int immhb =3D immh << 3 | immb; - int fracbits =3D (is_double ? 128 : 64) - immhb; - int pass; + int pass, size, fracbits; TCGv_ptr tcg_fpstatus; TCGv_i32 tcg_rmode, tcg_shift; =20 - if (!extract32(immh, 2, 2)) { - unallocated_encoding(s); - return; - } - - if (!is_scalar && !is_q && is_double) { + if (immh & 0x8) { + size =3D MO_64; + if (!is_scalar && !is_q) { + unallocated_encoding(s); + return; + } + } else if (immh & 0x4) { + size =3D MO_32; + } else if (immh & 0x2) { + size =3D MO_16; + if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + unallocated_encoding(s); + return; + } + } else { + /* Should have split out AdvSIMD modified immediate earlier. */ + assert(immh =3D=3D 1); unallocated_encoding(s); return; } @@ -7232,11 +7241,12 @@ static void handle_simd_shift_fpint_conv(DisasConte= xt *s, bool is_scalar, assert(!(is_scalar && is_q)); =20 tcg_rmode =3D tcg_const_i32(arm_rmode_to_sf(FPROUNDING_ZERO)); - tcg_fpstatus =3D get_fpstatus_ptr(false); + tcg_fpstatus =3D get_fpstatus_ptr(size =3D=3D MO_16); gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus); + fracbits =3D (16 << size) - immhb; tcg_shift =3D tcg_const_i32(fracbits); =20 - if (is_double) { + if (size =3D=3D MO_64) { int maxpass =3D is_scalar ? 1 : 2; =20 for (pass =3D 0; pass < maxpass; pass++) { @@ -7253,20 +7263,37 @@ static void handle_simd_shift_fpint_conv(DisasConte= xt *s, bool is_scalar, } clear_vec_high(s, is_q, rd); } else { - int maxpass =3D is_scalar ? 1 : is_q ? 4 : 2; + void (*fn)(TCGv_i32, TCGv_i32, TCGv_i32, TCGv_ptr); + int maxpass =3D is_scalar ? 1 : ((8 << is_q) >> size); + + switch (size) { + case MO_16: + if (is_u) { + fn =3D gen_helper_vfp_toulh; + } else { + fn =3D gen_helper_vfp_toslh; + } + break; + case MO_32: + if (is_u) { + fn =3D gen_helper_vfp_touls; + } else { + fn =3D gen_helper_vfp_tosls; + } + break; + default: + g_assert_not_reached(); + } + for (pass =3D 0; pass < maxpass; pass++) { TCGv_i32 tcg_op =3D tcg_temp_new_i32(); =20 - read_vec_element_i32(s, tcg_op, rn, pass, MO_32); - if (is_u) { - gen_helper_vfp_touls(tcg_op, tcg_op, tcg_shift, tcg_fpstat= us); - } else { - gen_helper_vfp_tosls(tcg_op, tcg_op, tcg_shift, tcg_fpstat= us); - } + read_vec_element_i32(s, tcg_op, rn, pass, size); + fn(tcg_op, tcg_op, tcg_shift, tcg_fpstatus); if (is_scalar) { write_fp_sreg(s, rd, tcg_op); } else { - write_vec_element_i32(s, tcg_op, rd, pass, MO_32); + write_vec_element_i32(s, tcg_op, rd, pass, size); } tcg_temp_free_i32(tcg_op); } --=20 2.14.3 From nobody Wed Oct 29 20:36:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525299794894853.7488951582653; Wed, 2 May 2018 15:23:14 -0700 (PDT) Received: from localhost ([::1]:52828 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE09Z-0005su-IR for importer@patchew.org; Wed, 02 May 2018 18:23:13 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58653) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02b-0000bc-GE for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02a-0007rZ-5N for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:01 -0400 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:44362) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02Z-0007qu-Sc for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:00 -0400 Received: by mail-pf0-x242.google.com with SMTP id q22so12956785pff.11 for ; Wed, 02 May 2018 15:15:59 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. 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X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [PATCH v2 03/14] target/arm: Fix float16 to/from int16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 The instruction "ucvtf v0.4h, v04h, #2", with input 0x8000u, overflows the intermediate float16 to infinity before we have a chance to scale the output. Use float64 as the intermediate type so that no input argument (uint32_t in this case) can overflow or round before scaling. Given the declared argument, the signed int32_t function has the same problem. When converting from float16 to integer, using u/int32_t instead of u/int16_t means that the bounding is incorrect. Cc: qemu-stable@nongnu.org Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- target/arm/helper.h | 4 ++-- target/arm/helper.c | 53 ++++++++++++++++++++++++++++++++++++++++++= ++-- target/arm/translate-a64.c | 4 ++-- 3 files changed, 55 insertions(+), 6 deletions(-) diff --git a/target/arm/helper.h b/target/arm/helper.h index 34e8cc8904..1969b37f2d 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -149,8 +149,8 @@ DEF_HELPER_3(vfp_toshd_round_to_zero, i64, f64, i32, pt= r) DEF_HELPER_3(vfp_tosld_round_to_zero, i64, f64, i32, ptr) DEF_HELPER_3(vfp_touhd_round_to_zero, i64, f64, i32, ptr) DEF_HELPER_3(vfp_tould_round_to_zero, i64, f64, i32, ptr) -DEF_HELPER_3(vfp_toulh, i32, f16, i32, ptr) -DEF_HELPER_3(vfp_toslh, i32, f16, i32, ptr) +DEF_HELPER_3(vfp_touhh, i32, f16, i32, ptr) +DEF_HELPER_3(vfp_toshh, i32, f16, i32, ptr) DEF_HELPER_3(vfp_toshs, i32, f32, i32, ptr) DEF_HELPER_3(vfp_tosls, i32, f32, i32, ptr) DEF_HELPER_3(vfp_tosqs, i64, f32, i32, ptr) diff --git a/target/arm/helper.c b/target/arm/helper.c index 52a88e0297..ba04cddda0 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11420,11 +11420,60 @@ VFP_CONV_FIX_A64(sq, s, 32, 64, int64) VFP_CONV_FIX(uh, s, 32, 32, uint16) VFP_CONV_FIX(ul, s, 32, 32, uint32) VFP_CONV_FIX_A64(uq, s, 32, 64, uint64) -VFP_CONV_FIX_A64(sl, h, 16, 32, int32) -VFP_CONV_FIX_A64(ul, h, 16, 32, uint32) + #undef VFP_CONV_FIX #undef VFP_CONV_FIX_FLOAT #undef VFP_CONV_FLOAT_FIX_ROUND +#undef VFP_CONV_FIX_A64 + +/* Conversion to/from f16 can overflow to infinity before/after scaling. + * Therefore we convert to f64 (which does not round), scale, + * and then convert f64 to f16 (which may round). + */ + +static float16 do_postscale_fp16(float64 f, int shift, float_status *fpst) +{ + return float64_to_float16(float64_scalbn(f, -shift, fpst), true, fpst); +} + +float16 HELPER(vfp_sltoh)(uint32_t x, uint32_t shift, void *fpst) +{ + return do_postscale_fp16(int32_to_float64(x, fpst), shift, fpst); +} + +float16 HELPER(vfp_ultoh)(uint32_t x, uint32_t shift, void *fpst) +{ + return do_postscale_fp16(uint32_to_float64(x, fpst), shift, fpst); +} + +static float64 do_prescale_fp16(float16 f, int shift, float_status *fpst) +{ + if (unlikely(float16_is_any_nan(f))) { + float_raise(float_flag_invalid, fpst); + return 0; + } else { + int old_exc_flags =3D get_float_exception_flags(fpst); + float64 ret; + + ret =3D float16_to_float64(f, true, fpst); + ret =3D float64_scalbn(ret, shift, fpst); + old_exc_flags |=3D get_float_exception_flags(fpst) + & float_flag_input_denormal; + set_float_exception_flags(old_exc_flags, fpst); + + return ret; + } +} + +uint32_t HELPER(vfp_toshh)(float16 x, uint32_t shift, void *fpst) +{ + return float64_to_int16(do_prescale_fp16(x, shift, fpst), fpst); +} + +uint32_t HELPER(vfp_touhh)(float16 x, uint32_t shift, void *fpst) +{ + return float64_to_uint16(do_prescale_fp16(x, shift, fpst), fpst); +} =20 /* Set the current fp rounding mode and return the old one. * The argument is a softfloat float_round_ value. diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index a64673575a..7021a31b89 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -7269,9 +7269,9 @@ static void handle_simd_shift_fpint_conv(DisasContext= *s, bool is_scalar, switch (size) { case MO_16: if (is_u) { - fn =3D gen_helper_vfp_toulh; + fn =3D gen_helper_vfp_touhh; } else { - fn =3D gen_helper_vfp_toslh; + fn =3D gen_helper_vfp_toshh; } break; case MO_32: --=20 2.14.3 From nobody Wed Oct 29 20:36:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.15.58 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:15:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HhI4bpwSZ0GekzoXGS7KrVmo2AaxCWuHnRf4OdGfNGI=; b=aLbn7kyNaVYO6PcXgcDlLp/AMICfWsnLrkXRzWDxvJP94iSkylV2LbSZFyZbNpE4fW YjAxP/tb4gL2/pDTJbTX0dj8CgoL0goLcZiE4HE0r5w8qFCjrkMbQGk2axs8qR/+4Gxx burI5cI/MmqTzzBmyzQwiNge+q+HCShadKwHQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HhI4bpwSZ0GekzoXGS7KrVmo2AaxCWuHnRf4OdGfNGI=; b=cm+TUSWw+QOVWVkEWzQtsjmmjkiXxja0kXxnKE24IztvS6H5bnll13TOULt+KWOIlL kLBVqjJOzUXDy3PQnP84EIta80uxh8GMiouX00ASzCl7PmI99GsfzqP7H7ncS4xkYpsQ eQEq9CaXE6uyE/H4XdclGmXFSdahwVr3QXaeJN26tEbRDjeCin8cT9MV5j2Yp69VUN5o NNjq+utQcDz/LR/8Ttj1mSJjAvS8dFV0mxx2Eo7QULOxR95EPJPZcCYxF91ESvaRaa0b ULrT+3H5TyYL4WnSxfLeVxsYXNTrERoT5DvvTGa9mLPmn4BC0ACo2lMqWgozrCEIRv/a uMVA== X-Gm-Message-State: ALQs6tC2XgRReU3mY1iGx7blADzeWNMIQye8M8IjFlM6MJPJdeE14zuj ao6HCRdvmlLHBgWvEEo38KtHlXejg1M= X-Google-Smtp-Source: AB8JxZr5/iLMof1AmFsDWorMk0CjnZxCUUJr6HDxNRm4uEER+bdZkmY5CAAPXbdQrjEARUMVUaPSgA== X-Received: by 10.98.72.29 with SMTP id v29mr15252295pfa.57.1525299359937; Wed, 02 May 2018 15:15:59 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:42 -0700 Message-Id: <20180502221552.3873-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::244 Subject: [Qemu-devel] [PATCH v2 04/14] target/arm: Clear SVE high bits for FMOV X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Use write_fp_dreg and clear_vec_high to zero the bits that need zeroing for these cases. Cc: qemu-stable@nongnu.org Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 17 +++++------------ 1 file changed, 5 insertions(+), 12 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 7021a31b89..c64c3ed99d 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5444,31 +5444,24 @@ static void handle_fmov(DisasContext *s, int rd, in= t rn, int type, bool itof) =20 if (itof) { TCGv_i64 tcg_rn =3D cpu_reg(s, rn); + TCGv_i64 tmp; =20 switch (type) { case 0: - { /* 32 bit */ - TCGv_i64 tmp =3D tcg_temp_new_i64(); + tmp =3D tcg_temp_new_i64(); tcg_gen_ext32u_i64(tmp, tcg_rn); - tcg_gen_st_i64(tmp, cpu_env, fp_reg_offset(s, rd, MO_64)); - tcg_gen_movi_i64(tmp, 0); - tcg_gen_st_i64(tmp, cpu_env, fp_reg_hi_offset(s, rd)); + write_fp_dreg(s, rd, tmp); tcg_temp_free_i64(tmp); break; - } case 1: - { /* 64 bit */ - TCGv_i64 tmp =3D tcg_const_i64(0); - tcg_gen_st_i64(tcg_rn, cpu_env, fp_reg_offset(s, rd, MO_64)); - tcg_gen_st_i64(tmp, cpu_env, fp_reg_hi_offset(s, rd)); - tcg_temp_free_i64(tmp); + write_fp_dreg(s, rd, tcg_rn); break; - } case 2: /* 64 bit to top half. */ tcg_gen_st_i64(tcg_rn, cpu_env, fp_reg_hi_offset(s, rd)); + clear_vec_high(s, true, rd); break; } } else { --=20 2.14.3 From nobody Wed Oct 29 20:36:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525299697820637.90511787918; Wed, 2 May 2018 15:21:37 -0700 (PDT) Received: from localhost ([::1]:52818 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE080-0004Qt-J9 for importer@patchew.org; Wed, 02 May 2018 18:21:36 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58725) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02d-0000em-MX for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02c-0007tR-MM for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:03 -0400 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:39709) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02c-0007sv-HI for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:02 -0400 Received: by mail-pf0-x242.google.com with SMTP id z9so12955528pfe.6 for ; Wed, 02 May 2018 15:16:02 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.16.00 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:16:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=WwqWFnklKjiIuffvTXcb3kCGinNAr4T/DUG63Bdts3w=; b=a5N2jNNj+fXoT9hLC83Eyxc2IWCv6rCTxhDJjcPO3+OfocOxmBvRUuYrB51fIriE22 jQ8FMNWLZvK1o8x23nUrzQPllbnqGU/wblJqZZeD/1OsCj7pa05sPiwnV2dYf8zsFeDj h9wDNh43AjydGfcplR7S+wxxBqgfuV76Q8Ih4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WwqWFnklKjiIuffvTXcb3kCGinNAr4T/DUG63Bdts3w=; b=V0lO2JfJlloxy0WjIuaysTU06dSfV5K4jJHcHSTENighm6dD40kKzO1cN2+YbZKQaI WGsblTszOGoenLMP/9wLu3a5AFBNYEg5SU0hrPIoFcEMrg7SbIdNRNxu2S6iqZwtbo0p vmgK2wtKAhMusHlfF7+IAHwVl42VZu7gbL+M92vtZj6DHegqQCwTqmqABoXrRH64KQtI sv2pcdt+NcHoCp6y3Wv5bVC1jl3RvfmM/72MlPHWi8210IBUGMWBjwoz3IwUop8avJWn rPP/B4OjAcH2AqkXhhd4lOO8QsVUmSde3KWE+orB5DYQn+4Xho/PvybQ+vAp4iIyrJwf MoeA== X-Gm-Message-State: ALQs6tCoVy4bfPUUCpNC3kV/mbPgzCDDGiSwOrgcefCyandOoNFTbv60 ztouSPYmW+/Gagp90WpeaQ0jNX/Tvh0= X-Google-Smtp-Source: AB8JxZrtT21G2dfnfo37zEwQqC8581XF09uor6xD3e+p+5PAU1muF/BA9N5gpy7E0V4RT+/wwbYWOg== X-Received: by 10.98.201.92 with SMTP id k89mr20787451pfg.47.1525299361286; Wed, 02 May 2018 15:16:01 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:43 -0700 Message-Id: <20180502221552.3873-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [PATCH v2 05/14] target/arm: Implement FMOV (general) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Adding the fp16 moves to/from general registers. Cc: qemu-stable@nongnu.org Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index c64c3ed99d..247a4f0cce 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5463,6 +5463,15 @@ static void handle_fmov(DisasContext *s, int rd, int= rn, int type, bool itof) tcg_gen_st_i64(tcg_rn, cpu_env, fp_reg_hi_offset(s, rd)); clear_vec_high(s, true, rd); break; + case 3: + /* 16 bit */ + tmp =3D tcg_temp_new_i64(); + tcg_gen_ext16u_i64(tmp, tcg_rn); + write_fp_dreg(s, rd, tmp); + tcg_temp_free_i64(tmp); + break; + default: + g_assert_not_reached(); } } else { TCGv_i64 tcg_rd =3D cpu_reg(s, rd); @@ -5480,6 +5489,12 @@ static void handle_fmov(DisasContext *s, int rd, int= rn, int type, bool itof) /* 64 bits from top half */ tcg_gen_ld_i64(tcg_rd, cpu_env, fp_reg_hi_offset(s, rn)); break; + case 3: + /* 16 bit */ + tcg_gen_ld16u_i64(tcg_rd, cpu_env, fp_reg_offset(s, rn, MO_16)= ); + break; + default: + g_assert_not_reached(); } } } @@ -5519,10 +5534,15 @@ static void disas_fp_int_conv(DisasContext *s, uint= 32_t insn) case 0xa: /* 64 bit */ case 0xd: /* 64 bit to top half of quad */ break; + case 0x6: /* 16-bit */ + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ default: /* all other sf/type/rmode combinations are invalid */ unallocated_encoding(s); - break; + return; } =20 if (!fp_access_check(s)) { --=20 2.14.3 From nobody Wed Oct 29 20:36:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525299694741249.85048790595908; Wed, 2 May 2018 15:21:34 -0700 (PDT) Received: from localhost ([::1]:52817 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE07s-0004Ll-Jo for importer@patchew.org; Wed, 02 May 2018 18:21:28 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58777) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02f-0000hG-Mc for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02e-0007uV-14 for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:05 -0400 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:33251) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02d-0007ty-PA for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:03 -0400 Received: by mail-pf0-x242.google.com with SMTP id f20so4172280pfn.0 for ; Wed, 02 May 2018 15:16:03 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.16.01 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:16:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=f8miKIJRLY9NrBo+16MHxogxHquu/1wJws6BUD0nnSY=; b=eAZtGX8XK4muXeHo9po3xDWX0Nto1AsHGbdqF5+zF2lq22bMv8q5cBNolQWwRKQXiD 2j2OXIKakyIYQl8oeTwgNQGrcNKOZwNwiH10j+zcwA7t9a+S5lDrh59p9eoGGm34vjD6 PXjRMypNzjb7gtfSwwkT3UlGd59K1VM73Tt1k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=f8miKIJRLY9NrBo+16MHxogxHquu/1wJws6BUD0nnSY=; b=PJDxkee3B/qKksxafNuZBTMcqP233YTMFHKJPt/V0Gf89TmmDgkzOqJRvbat7JnBaE g2ozDsp2PKGH9tyGxAIfdD7mh9uJoXfrh8zMinriazwEXtl7jLXuGaTRELwC+RS8VbxX pCi3QQLkHVPyTaoE/GeXfuNrrYDfqy/Xvl+Ki0JJcx3r0lKg5MrmYhfHikpV8/9bmCLK b0TxPsHCKxmcFwBUB9urgeCiIACbU5xyOdSPgtMfHKe74G5SRQXeaw2473cl6uWv9sYQ e6kXRNmKeH1rwF3zhe0RCCkyZv0E5wHZRckQzETnT4vB2htowJ5PYdN+drbUJ7CpXPS7 jFow== X-Gm-Message-State: ALQs6tDl8g4U55PovuZXRa10rj/LSPkYefistJel0Pa6EmSYg3wbsPql YFnAsXyFpfPA8Cvw4kveT5D8UhcAmDo= X-Google-Smtp-Source: AB8JxZo/KwIZg4C3xnlwqV2dbqJ/f0mxx0O2AMARo1R5i0gkw2rtN5cGcf9IGv8VMt6851p6zhV/Jg== X-Received: by 10.98.15.23 with SMTP id x23mr20998345pfi.3.1525299362491; Wed, 02 May 2018 15:16:02 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:44 -0700 Message-Id: <20180502221552.3873-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [PATCH v2 06/14] target/arm: Implement FCVT (scalar, integer) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Cc: qemu-stable@nongnu.org Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- target/arm/helper.h | 6 +++ target/arm/helper.c | 38 +++++++++++++++++- target/arm/translate-a64.c | 96 ++++++++++++++++++++++++++++++++++++++----= ---- 3 files changed, 122 insertions(+), 18 deletions(-) diff --git a/target/arm/helper.h b/target/arm/helper.h index 1969b37f2d..ce89968b2d 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -151,6 +151,10 @@ DEF_HELPER_3(vfp_touhd_round_to_zero, i64, f64, i32, p= tr) DEF_HELPER_3(vfp_tould_round_to_zero, i64, f64, i32, ptr) DEF_HELPER_3(vfp_touhh, i32, f16, i32, ptr) DEF_HELPER_3(vfp_toshh, i32, f16, i32, ptr) +DEF_HELPER_3(vfp_toulh, i32, f16, i32, ptr) +DEF_HELPER_3(vfp_toslh, i32, f16, i32, ptr) +DEF_HELPER_3(vfp_touqh, i64, f16, i32, ptr) +DEF_HELPER_3(vfp_tosqh, i64, f16, i32, ptr) DEF_HELPER_3(vfp_toshs, i32, f32, i32, ptr) DEF_HELPER_3(vfp_tosls, i32, f32, i32, ptr) DEF_HELPER_3(vfp_tosqs, i64, f32, i32, ptr) @@ -177,6 +181,8 @@ DEF_HELPER_3(vfp_ultod, f64, i64, i32, ptr) DEF_HELPER_3(vfp_uqtod, f64, i64, i32, ptr) DEF_HELPER_3(vfp_sltoh, f16, i32, i32, ptr) DEF_HELPER_3(vfp_ultoh, f16, i32, i32, ptr) +DEF_HELPER_3(vfp_sqtoh, f16, i64, i32, ptr) +DEF_HELPER_3(vfp_uqtoh, f16, i64, i32, ptr) =20 DEF_HELPER_FLAGS_2(set_rmode, TCG_CALL_NO_RWG, i32, i32, ptr) DEF_HELPER_FLAGS_2(set_neon_rmode, TCG_CALL_NO_RWG, i32, i32, env) diff --git a/target/arm/helper.c b/target/arm/helper.c index ba04cddda0..1fbf5fdec9 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11427,8 +11427,12 @@ VFP_CONV_FIX_A64(uq, s, 32, 64, uint64) #undef VFP_CONV_FIX_A64 =20 /* Conversion to/from f16 can overflow to infinity before/after scaling. - * Therefore we convert to f64 (which does not round), scale, - * and then convert f64 to f16 (which may round). + * Therefore we convert to f64, scale, and then convert f64 to f16; or + * vice versa for conversion to integer. + * + * For 16- and 32-bit integers, the conversion to f64 never rounds. + * For 64-bit integers, any integer that would cause rounding will also + * overflow to f16 infinity, so there is no double rounding problem. */ =20 static float16 do_postscale_fp16(float64 f, int shift, float_status *fpst) @@ -11446,6 +11450,16 @@ float16 HELPER(vfp_ultoh)(uint32_t x, uint32_t shi= ft, void *fpst) return do_postscale_fp16(uint32_to_float64(x, fpst), shift, fpst); } =20 +float16 HELPER(vfp_sqtoh)(uint64_t x, uint32_t shift, void *fpst) +{ + return do_postscale_fp16(int64_to_float64(x, fpst), shift, fpst); +} + +float16 HELPER(vfp_uqtoh)(uint64_t x, uint32_t shift, void *fpst) +{ + return do_postscale_fp16(uint64_to_float64(x, fpst), shift, fpst); +} + static float64 do_prescale_fp16(float16 f, int shift, float_status *fpst) { if (unlikely(float16_is_any_nan(f))) { @@ -11475,6 +11489,26 @@ uint32_t HELPER(vfp_touhh)(float16 x, uint32_t shi= ft, void *fpst) return float64_to_uint16(do_prescale_fp16(x, shift, fpst), fpst); } =20 +uint32_t HELPER(vfp_toslh)(float16 x, uint32_t shift, void *fpst) +{ + return float64_to_int32(do_prescale_fp16(x, shift, fpst), fpst); +} + +uint32_t HELPER(vfp_toulh)(float16 x, uint32_t shift, void *fpst) +{ + return float64_to_uint32(do_prescale_fp16(x, shift, fpst), fpst); +} + +uint64_t HELPER(vfp_tosqh)(float16 x, uint32_t shift, void *fpst) +{ + return float64_to_int64(do_prescale_fp16(x, shift, fpst), fpst); +} + +uint64_t HELPER(vfp_touqh)(float16 x, uint32_t shift, void *fpst) +{ + return float64_to_uint64(do_prescale_fp16(x, shift, fpst), fpst); +} + /* Set the current fp rounding mode and return the old one. * The argument is a softfloat float_round_ value. */ diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 247a4f0cce..d794744aec 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5274,11 +5274,11 @@ static void handle_fpfpcvt(DisasContext *s, int rd,= int rn, int opcode, bool itof, int rmode, int scale, int sf, int ty= pe) { bool is_signed =3D !(opcode & 1); - bool is_double =3D type; TCGv_ptr tcg_fpstatus; - TCGv_i32 tcg_shift; + TCGv_i32 tcg_shift, tcg_single; + TCGv_i64 tcg_double; =20 - tcg_fpstatus =3D get_fpstatus_ptr(false); + tcg_fpstatus =3D get_fpstatus_ptr(type =3D=3D 3); =20 tcg_shift =3D tcg_const_i32(64 - scale); =20 @@ -5296,8 +5296,9 @@ static void handle_fpfpcvt(DisasContext *s, int rd, i= nt rn, int opcode, tcg_int =3D tcg_extend; } =20 - if (is_double) { - TCGv_i64 tcg_double =3D tcg_temp_new_i64(); + switch (type) { + case 1: /* float64 */ + tcg_double =3D tcg_temp_new_i64(); if (is_signed) { gen_helper_vfp_sqtod(tcg_double, tcg_int, tcg_shift, tcg_fpstatus); @@ -5307,8 +5308,10 @@ static void handle_fpfpcvt(DisasContext *s, int rd, = int rn, int opcode, } write_fp_dreg(s, rd, tcg_double); tcg_temp_free_i64(tcg_double); - } else { - TCGv_i32 tcg_single =3D tcg_temp_new_i32(); + break; + + case 0: /* float32 */ + tcg_single =3D tcg_temp_new_i32(); if (is_signed) { gen_helper_vfp_sqtos(tcg_single, tcg_int, tcg_shift, tcg_fpstatus); @@ -5318,6 +5321,23 @@ static void handle_fpfpcvt(DisasContext *s, int rd, = int rn, int opcode, } write_fp_sreg(s, rd, tcg_single); tcg_temp_free_i32(tcg_single); + break; + + case 3: /* float16 */ + tcg_single =3D tcg_temp_new_i32(); + if (is_signed) { + gen_helper_vfp_sqtoh(tcg_single, tcg_int, + tcg_shift, tcg_fpstatus); + } else { + gen_helper_vfp_uqtoh(tcg_single, tcg_int, + tcg_shift, tcg_fpstatus); + } + write_fp_sreg(s, rd, tcg_single); + tcg_temp_free_i32(tcg_single); + break; + + default: + g_assert_not_reached(); } } else { TCGv_i64 tcg_int =3D cpu_reg(s, rd); @@ -5334,8 +5354,9 @@ static void handle_fpfpcvt(DisasContext *s, int rd, i= nt rn, int opcode, =20 gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus); =20 - if (is_double) { - TCGv_i64 tcg_double =3D read_fp_dreg(s, rn); + switch (type) { + case 1: /* float64 */ + tcg_double =3D read_fp_dreg(s, rn); if (is_signed) { if (!sf) { gen_helper_vfp_tosld(tcg_int, tcg_double, @@ -5353,9 +5374,14 @@ static void handle_fpfpcvt(DisasContext *s, int rd, = int rn, int opcode, tcg_shift, tcg_fpstatus); } } + if (!sf) { + tcg_gen_ext32u_i64(tcg_int, tcg_int); + } tcg_temp_free_i64(tcg_double); - } else { - TCGv_i32 tcg_single =3D read_fp_sreg(s, rn); + break; + + case 0: /* float32 */ + tcg_single =3D read_fp_sreg(s, rn); if (sf) { if (is_signed) { gen_helper_vfp_tosqs(tcg_int, tcg_single, @@ -5377,14 +5403,39 @@ static void handle_fpfpcvt(DisasContext *s, int rd,= int rn, int opcode, tcg_temp_free_i32(tcg_dest); } tcg_temp_free_i32(tcg_single); + break; + + case 3: /* float16 */ + tcg_single =3D read_fp_sreg(s, rn); + if (sf) { + if (is_signed) { + gen_helper_vfp_tosqh(tcg_int, tcg_single, + tcg_shift, tcg_fpstatus); + } else { + gen_helper_vfp_touqh(tcg_int, tcg_single, + tcg_shift, tcg_fpstatus); + } + } else { + TCGv_i32 tcg_dest =3D tcg_temp_new_i32(); + if (is_signed) { + gen_helper_vfp_toslh(tcg_dest, tcg_single, + tcg_shift, tcg_fpstatus); + } else { + gen_helper_vfp_toulh(tcg_dest, tcg_single, + tcg_shift, tcg_fpstatus); + } + tcg_gen_extu_i32_i64(tcg_int, tcg_dest); + tcg_temp_free_i32(tcg_dest); + } + tcg_temp_free_i32(tcg_single); + break; + + default: + g_assert_not_reached(); } =20 gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus); tcg_temp_free_i32(tcg_rmode); - - if (!sf) { - tcg_gen_ext32u_i64(tcg_int, tcg_int); - } } =20 tcg_temp_free_ptr(tcg_fpstatus); @@ -5553,7 +5604,20 @@ static void disas_fp_int_conv(DisasContext *s, uint3= 2_t insn) /* actual FP conversions */ bool itof =3D extract32(opcode, 1, 1); =20 - if (type > 1 || (rmode !=3D 0 && opcode > 1)) { + if (rmode !=3D 0 && opcode > 1) { + unallocated_encoding(s); + return; + } + switch (type) { + case 0: /* float32 */ + case 1: /* float64 */ + break; + case 3: /* float16 */ + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } --=20 2.14.3 From nobody Wed Oct 29 20:36:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [PATCH v2 07/14] target/arm: Implement FCVT (scalar, fixed-point) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Cc: qemu-stable@nongnu.org Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index d794744aec..e19d97e8f1 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5460,8 +5460,7 @@ static void disas_fp_fixed_conv(DisasContext *s, uint= 32_t insn) bool sf =3D extract32(insn, 31, 1); bool itof; =20 - if (sbit || (type > 1) - || (!sf && scale < 32)) { + if (sbit || (!sf && scale < 32)) { unallocated_encoding(s); return; } @@ -5480,6 +5479,20 @@ static void disas_fp_fixed_conv(DisasContext *s, uin= t32_t insn) return; } =20 + switch (type) { + case 0: /* float32 */ + case 1: /* float64 */ + break; + case 3: /* float16 */ + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: + unallocated_encoding(s); + return; + } + if (!fp_access_check(s)) { return; } --=20 2.14.3 From nobody Wed Oct 29 20:36:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525300032031533.190482222593; Wed, 2 May 2018 15:27:12 -0700 (PDT) Received: from localhost ([::1]:52860 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE0DP-0001CM-64 for importer@patchew.org; Wed, 02 May 2018 18:27:11 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58836) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02i-0000kf-G7 for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02g-0007w5-FB for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:08 -0400 Received: from mail-pg0-x244.google.com ([2607:f8b0:400e:c05::244]:34998) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02g-0007ve-A5 for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:06 -0400 Received: by mail-pg0-x244.google.com with SMTP id j11-v6so11635426pgf.2 for ; Wed, 02 May 2018 15:16:06 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. 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X-Received-From: 2607:f8b0:400e:c05::244 Subject: [Qemu-devel] [PATCH v2 08/14] target/arm: Introduce and use read_fp_hreg X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Cc: qemu-stable@nongnu.org Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/translate-a64.c | 30 ++++++++++++++---------------- 1 file changed, 14 insertions(+), 16 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index e19d97e8f1..8c63d5e743 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -614,6 +614,14 @@ static TCGv_i32 read_fp_sreg(DisasContext *s, int reg) return v; } =20 +static TCGv_i32 read_fp_hreg(DisasContext *s, int reg) +{ + TCGv_i32 v =3D tcg_temp_new_i32(); + + tcg_gen_ld16u_i32(v, cpu_env, fp_reg_offset(s, reg, MO_16)); + return v; +} + /* Clear the bits above an N-bit vector, for N =3D (is_q ? 128 : 64). * If SVE is not enabled, then there are only 128 bits in the vector. */ @@ -4644,11 +4652,9 @@ static void disas_fp_csel(DisasContext *s, uint32_t = insn) static void handle_fp_1src_half(DisasContext *s, int opcode, int rd, int r= n) { TCGv_ptr fpst =3D NULL; - TCGv_i32 tcg_op =3D tcg_temp_new_i32(); + TCGv_i32 tcg_op =3D read_fp_hreg(s, rn); TCGv_i32 tcg_res =3D tcg_temp_new_i32(); =20 - read_vec_element_i32(s, tcg_op, rn, 0, MO_16); - switch (opcode) { case 0x0: /* FMOV */ tcg_gen_mov_i32(tcg_res, tcg_op); @@ -7543,13 +7549,10 @@ static void disas_simd_scalar_three_reg_diff(DisasC= ontext *s, uint32_t insn) tcg_temp_free_i64(tcg_op2); tcg_temp_free_i64(tcg_res); } else { - TCGv_i32 tcg_op1 =3D tcg_temp_new_i32(); - TCGv_i32 tcg_op2 =3D tcg_temp_new_i32(); + TCGv_i32 tcg_op1 =3D read_fp_hreg(s, rn); + TCGv_i32 tcg_op2 =3D read_fp_hreg(s, rm); TCGv_i64 tcg_res =3D tcg_temp_new_i64(); =20 - read_vec_element_i32(s, tcg_op1, rn, 0, MO_16); - read_vec_element_i32(s, tcg_op2, rm, 0, MO_16); - gen_helper_neon_mull_s16(tcg_res, tcg_op1, tcg_op2); gen_helper_neon_addl_saturate_s32(tcg_res, cpu_env, tcg_res, tcg_r= es); =20 @@ -8090,13 +8093,10 @@ static void disas_simd_scalar_three_reg_same_fp16(D= isasContext *s, =20 fpst =3D get_fpstatus_ptr(true); =20 - tcg_op1 =3D tcg_temp_new_i32(); - tcg_op2 =3D tcg_temp_new_i32(); + tcg_op1 =3D read_fp_hreg(s, rn); + tcg_op2 =3D read_fp_hreg(s, rm); tcg_res =3D tcg_temp_new_i32(); =20 - read_vec_element_i32(s, tcg_op1, rn, 0, MO_16); - read_vec_element_i32(s, tcg_op2, rm, 0, MO_16); - switch (fpopcode) { case 0x03: /* FMULX */ gen_helper_advsimd_mulxh(tcg_res, tcg_op1, tcg_op2, fpst); @@ -12015,11 +12015,9 @@ static void disas_simd_two_reg_misc_fp16(DisasCont= ext *s, uint32_t insn) } =20 if (is_scalar) { - TCGv_i32 tcg_op =3D tcg_temp_new_i32(); + TCGv_i32 tcg_op =3D read_fp_hreg(s, rn); TCGv_i32 tcg_res =3D tcg_temp_new_i32(); =20 - read_vec_element_i32(s, tcg_op, rn, 0, MO_16); - switch (fpop) { case 0x1a: /* FCVTNS */ case 0x1b: /* FCVTMS */ --=20 2.14.3 From nobody Wed Oct 29 20:36:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 152529986800330.839968051157598; Wed, 2 May 2018 15:24:28 -0700 (PDT) Received: from localhost ([::1]:52834 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE0Ac-00074J-KP for importer@patchew.org; Wed, 02 May 2018 18:24:18 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58867) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02j-0000lk-9i for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02h-0007wv-PF for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:09 -0400 Received: from mail-pg0-x244.google.com ([2607:f8b0:400e:c05::244]:33605) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02h-0007wT-JQ for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:07 -0400 Received: by mail-pg0-x244.google.com with SMTP id i194-v6so11634147pgd.0 for ; Wed, 02 May 2018 15:16:07 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. 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X-Received-From: 2607:f8b0:400e:c05::244 Subject: [Qemu-devel] [PATCH v2 09/14] target/arm: Implement FP data-processing (2 source) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 We missed all of the scalar fp16 binary operations. Cc: qemu-stable@nongnu.org Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 65 ++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 65 insertions(+) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 8c63d5e743..d7a49ef2e4 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5062,6 +5062,61 @@ static void handle_fp_2src_double(DisasContext *s, i= nt opcode, tcg_temp_free_i64(tcg_res); } =20 +/* Floating-point data-processing (2 source) - half precision */ +static void handle_fp_2src_half(DisasContext *s, int opcode, + int rd, int rn, int rm) +{ + TCGv_i32 tcg_op1; + TCGv_i32 tcg_op2; + TCGv_i32 tcg_res; + TCGv_ptr fpst; + + tcg_res =3D tcg_temp_new_i32(); + fpst =3D get_fpstatus_ptr(true); + tcg_op1 =3D read_fp_hreg(s, rn); + tcg_op2 =3D read_fp_hreg(s, rm); + + switch (opcode) { + case 0x0: /* FMUL */ + gen_helper_advsimd_mulh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x1: /* FDIV */ + gen_helper_advsimd_divh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x2: /* FADD */ + gen_helper_advsimd_addh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x3: /* FSUB */ + gen_helper_advsimd_subh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x4: /* FMAX */ + gen_helper_advsimd_maxh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x5: /* FMIN */ + gen_helper_advsimd_minh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x6: /* FMAXNM */ + gen_helper_advsimd_maxnumh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x7: /* FMINNM */ + gen_helper_advsimd_minnumh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x8: /* FNMUL */ + gen_helper_advsimd_mulh(tcg_res, tcg_op1, tcg_op2, fpst); + tcg_gen_xori_i32(tcg_res, tcg_res, 0x8000); + break; + default: + g_assert_not_reached(); + } + + write_fp_sreg(s, rd, tcg_res); + + tcg_temp_free_ptr(fpst); + tcg_temp_free_i32(tcg_op1); + tcg_temp_free_i32(tcg_op2); + tcg_temp_free_i32(tcg_res); +} + /* Floating point data-processing (2 source) * 31 30 29 28 24 23 22 21 20 16 15 12 11 10 9 5 4 0 * +---+---+---+-----------+------+---+------+--------+-----+------+------+ @@ -5094,6 +5149,16 @@ static void disas_fp_2src(DisasContext *s, uint32_t = insn) } handle_fp_2src_double(s, opcode, rd, rn, rm); break; + case 3: + if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + unallocated_encoding(s); + return; + } + if (!fp_access_check(s)) { + return; + } + handle_fp_2src_half(s, opcode, rd, rn, rm); + break; default: unallocated_encoding(s); } --=20 2.14.3 From nobody Wed Oct 29 20:36:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15252998999341008.8546112459421; Wed, 2 May 2018 15:24:59 -0700 (PDT) Received: from localhost ([::1]:52840 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE0BH-0007gp-2U for importer@patchew.org; Wed, 02 May 2018 18:24:59 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58912) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02k-0000ni-Fp for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02j-0007z5-CF for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:10 -0400 Received: from mail-pf0-x243.google.com ([2607:f8b0:400e:c00::243]:39710) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02j-0007y3-5M for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:09 -0400 Received: by mail-pf0-x243.google.com with SMTP id z9so12955726pfe.6 for ; Wed, 02 May 2018 15:16:09 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.16.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:16:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+NJcK2bxHsiTQWd1zChLZWnGl5un7Pg1c9+Vm3qmlP8=; b=edVsKRIHqE6KZU26kmq98OIAhB0lnubunVMxNkN+pbFB13uCPnSn0QOcusDzb9G0r5 If2Nv1D8wA66/ztKkHo3+LI4NBTuzJ4Ae8LZBdKtp4pph4jTf93LKn4IyyQwj/SPsbwB luG9KUfcZQyIA9PJxyE4lZOMRzDRNebwKFK80= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+NJcK2bxHsiTQWd1zChLZWnGl5un7Pg1c9+Vm3qmlP8=; b=Zbw6w/DXWk1asSejS3r811UY3q1Qe0fbaRXAlVqIt5zImfMfIFaNlR+sRX3tKQKWsv wIuDm3L92sDxAMEb4WUiKohHCTwPyAO5+lDiuzbV5U4ssxqTmd6jx9UPAWGw9oPUFmLa ig4XTJ5XRdla3t3J21IYSFs+RI0f5nrtz8B+8Za4Yp2f0/bBHJLZVyB2o7kuErLvHtlj K66i82UHqik9u8Mdv7PBVAtOn6uqhk1iv2qY/XgDs/8HX8TOAIFBj0DOt1z+r9MUQDw0 5X8C/5ixp0JWkSFGRBm5DGUzJ0P33hr9e5t661SMr6vK3WyDjcq6JHh4Uah0TMx1/lle MsMA== X-Gm-Message-State: ALQs6tDNpWS3F7oj0iyy0uktsVBVyoWV/EUef1NUfsHsYRnDwMsKiR14 0hnFjV0gkp9Fi4xBu7M+aDOytlw5AyE= X-Google-Smtp-Source: AB8JxZrzTSRcX5Ln558Znh0hXLnc5JBDjRaA+rdpr2kUf8tLKEKSXgv3Wo46u7NWtAqEl6GIz1sMRw== X-Received: by 10.98.19.151 with SMTP id 23mr21028182pft.222.1525299367890; Wed, 02 May 2018 15:16:07 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:48 -0700 Message-Id: <20180502221552.3873-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::243 Subject: [Qemu-devel] [PATCH v2 10/14] target/arm: Implement FP data-processing (3 source) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 We missed all of the scalar fp16 fma operations. Cc: qemu-stable@nongnu.org Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 48 ++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 48 insertions(+) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index d7a49ef2e4..9322b0d896 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5240,6 +5240,44 @@ static void handle_fp_3src_double(DisasContext *s, b= ool o0, bool o1, tcg_temp_free_i64(tcg_res); } =20 +/* Floating-point data-processing (3 source) - half precision */ +static void handle_fp_3src_half(DisasContext *s, bool o0, bool o1, + int rd, int rn, int rm, int ra) +{ + TCGv_i32 tcg_op1, tcg_op2, tcg_op3; + TCGv_i32 tcg_res =3D tcg_temp_new_i32(); + TCGv_ptr fpst =3D get_fpstatus_ptr(true); + + tcg_op1 =3D read_fp_hreg(s, rn); + tcg_op2 =3D read_fp_hreg(s, rm); + tcg_op3 =3D read_fp_hreg(s, ra); + + /* These are fused multiply-add, and must be done as one + * floating point operation with no rounding between the + * multiplication and addition steps. + * NB that doing the negations here as separate steps is + * correct : an input NaN should come out with its sign bit + * flipped if it is a negated-input. + */ + if (o1 =3D=3D true) { + tcg_gen_xori_i32(tcg_op3, tcg_op3, 0x8000); + } + + if (o0 !=3D o1) { + tcg_gen_xori_i32(tcg_op1, tcg_op1, 0x8000); + } + + gen_helper_advsimd_muladdh(tcg_res, tcg_op1, tcg_op2, tcg_op3, fpst); + + write_fp_sreg(s, rd, tcg_res); + + tcg_temp_free_ptr(fpst); + tcg_temp_free_i32(tcg_op1); + tcg_temp_free_i32(tcg_op2); + tcg_temp_free_i32(tcg_op3); + tcg_temp_free_i32(tcg_res); +} + /* Floating point data-processing (3 source) * 31 30 29 28 24 23 22 21 20 16 15 14 10 9 5 4 0 * +---+---+---+-----------+------+----+------+----+------+------+------+ @@ -5269,6 +5307,16 @@ static void disas_fp_3src(DisasContext *s, uint32_t = insn) } handle_fp_3src_double(s, o0, o1, rd, rn, rm, ra); break; + case 3: + if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + unallocated_encoding(s); + return; + } + if (!fp_access_check(s)) { + return; + } + handle_fp_3src_half(s, o0, o1, rd, rn, rm, ra); + break; default: unallocated_encoding(s); } --=20 2.14.3 From nobody Wed Oct 29 20:36:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15253001999137.942071248973207; Wed, 2 May 2018 15:29:59 -0700 (PDT) Received: from localhost ([::1]:52877 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE0G3-0003rM-26 for importer@patchew.org; Wed, 02 May 2018 18:29:55 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58956) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02m-0000op-4C for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02k-00080e-MG for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:12 -0400 Received: from mail-pf0-x244.google.com ([2607:f8b0:400e:c00::244]:42516) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02k-0007zz-DV for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:10 -0400 Received: by mail-pf0-x244.google.com with SMTP id p14so1579385pfh.9 for ; Wed, 02 May 2018 15:16:10 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.16.07 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:16:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DqVFNk569BoPF3fOx2mc2LarcCeWFIvVhbVzAZxftS4=; b=NkKb4ArxC7sBnHkcVVY56ry3fdjcBHyXHdGcA9hWABmu9PZ3gI8A4ZwTKhAOYo9pXm XWPbm3qzPXpkqEriqtFqIN+6cjn8HQFfO05mDJFX+z7D1TvoZ/LdKZ+FoAAi7hhIo97B UeqQm7TPeceZquQ1oem1wMW4LkD2ePS/m4aqY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DqVFNk569BoPF3fOx2mc2LarcCeWFIvVhbVzAZxftS4=; b=GAbakhkYOE2YOEgejDiaIMe49Gnall42bzn5avQzHFrhfj1AH+DCi5dX048rCgSsfW U9zvMipCLf4x4zV024/F9K1kYgjnEJ3dFdcpfsjwRCyOToAlpXhqQRnVX2qD4zwJgHbC 79JQKfCz27n5crTTewXTf1jYnF84VabmPgptlAQKAV3W+ppCAStts4lOU/NfvI/8aPHm LKtsRhyfRb1WZlkmKp/rScZhZe5EKOkzS6LZtP2QKoDMSaftObJmbBrLcfvVe493Z0d3 2QQsyVjwrbPvW82JEGA/HyaiSaLgxfHBqU54cRDEQguH51vucLGn7rAMnw/4y19nBcTP wOaw== X-Gm-Message-State: ALQs6tCukhFfqK8sjIC1Qzvyt84y+VjpHB4ISN4JqOAZMNW0NSbEzONM +qU2iAn4BvrAYYxZHz6MhjmflXvBQb0= X-Google-Smtp-Source: AB8JxZox9DF3Cd+0JG84fj2+sN7pECnOn0t72JH3MWpHM2A7GPKR+38flPsp6A11tI3Dv2hXI066Qw== X-Received: by 2002:a63:545:: with SMTP id 66-v6mr17368110pgf.446.1525299369123; Wed, 02 May 2018 15:16:09 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:49 -0700 Message-Id: <20180502221552.3873-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::244 Subject: [Qemu-devel] [PATCH v2 11/14] target/arm: Implement FCMP for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 From: Alex Benn=C3=A9e These where missed out from the rest of the half-precision work. Cc: qemu-stable@nongnu.org Signed-off-by: Alex Benn=C3=A9e [rth: Diagnose lack of FP16 before fp_access_check] Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/helper-a64.h | 2 ++ target/arm/helper-a64.c | 10 ++++++ target/arm/translate-a64.c | 88 +++++++++++++++++++++++++++++++++++++-----= ---- 3 files changed, 83 insertions(+), 17 deletions(-) diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h index ef4ddfe9d8..5c0b9bd799 100644 --- a/target/arm/helper-a64.h +++ b/target/arm/helper-a64.h @@ -19,6 +19,8 @@ DEF_HELPER_FLAGS_2(udiv64, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(sdiv64, TCG_CALL_NO_RWG_SE, s64, s64, s64) DEF_HELPER_FLAGS_1(rbit64, TCG_CALL_NO_RWG_SE, i64, i64) +DEF_HELPER_3(vfp_cmph_a64, i64, f16, f16, ptr) +DEF_HELPER_3(vfp_cmpeh_a64, i64, f16, f16, ptr) DEF_HELPER_3(vfp_cmps_a64, i64, f32, f32, ptr) DEF_HELPER_3(vfp_cmpes_a64, i64, f32, f32, ptr) DEF_HELPER_3(vfp_cmpd_a64, i64, f64, f64, ptr) diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index afb25ad20c..35df07adb9 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -85,6 +85,16 @@ static inline uint32_t float_rel_to_flags(int res) return flags; } =20 +uint64_t HELPER(vfp_cmph_a64)(float16 x, float16 y, void *fp_status) +{ + return float_rel_to_flags(float16_compare_quiet(x, y, fp_status)); +} + +uint64_t HELPER(vfp_cmpeh_a64)(float16 x, float16 y, void *fp_status) +{ + return float_rel_to_flags(float16_compare(x, y, fp_status)); +} + uint64_t HELPER(vfp_cmps_a64)(float32 x, float32 y, void *fp_status) { return float_rel_to_flags(float32_compare_quiet(x, y, fp_status)); diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 9322b0d896..f0aca20771 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -4475,14 +4475,14 @@ static void disas_data_proc_reg(DisasContext *s, ui= nt32_t insn) } } =20 -static void handle_fp_compare(DisasContext *s, bool is_double, +static void handle_fp_compare(DisasContext *s, int size, unsigned int rn, unsigned int rm, bool cmp_with_zero, bool signal_all_nans) { TCGv_i64 tcg_flags =3D tcg_temp_new_i64(); - TCGv_ptr fpst =3D get_fpstatus_ptr(false); + TCGv_ptr fpst =3D get_fpstatus_ptr(size =3D=3D MO_16); =20 - if (is_double) { + if (size =3D=3D MO_64) { TCGv_i64 tcg_vn, tcg_vm; =20 tcg_vn =3D read_fp_dreg(s, rn); @@ -4499,19 +4499,35 @@ static void handle_fp_compare(DisasContext *s, bool= is_double, tcg_temp_free_i64(tcg_vn); tcg_temp_free_i64(tcg_vm); } else { - TCGv_i32 tcg_vn, tcg_vm; + TCGv_i32 tcg_vn =3D tcg_temp_new_i32(); + TCGv_i32 tcg_vm =3D tcg_temp_new_i32(); =20 - tcg_vn =3D read_fp_sreg(s, rn); + read_vec_element_i32(s, tcg_vn, rn, 0, size); if (cmp_with_zero) { - tcg_vm =3D tcg_const_i32(0); + tcg_gen_movi_i32(tcg_vm, 0); } else { - tcg_vm =3D read_fp_sreg(s, rm); + read_vec_element_i32(s, tcg_vm, rm, 0, size); } - if (signal_all_nans) { - gen_helper_vfp_cmpes_a64(tcg_flags, tcg_vn, tcg_vm, fpst); - } else { - gen_helper_vfp_cmps_a64(tcg_flags, tcg_vn, tcg_vm, fpst); + + switch (size) { + case MO_32: + if (signal_all_nans) { + gen_helper_vfp_cmpes_a64(tcg_flags, tcg_vn, tcg_vm, fpst); + } else { + gen_helper_vfp_cmps_a64(tcg_flags, tcg_vn, tcg_vm, fpst); + } + break; + case MO_16: + if (signal_all_nans) { + gen_helper_vfp_cmpeh_a64(tcg_flags, tcg_vn, tcg_vm, fpst); + } else { + gen_helper_vfp_cmph_a64(tcg_flags, tcg_vn, tcg_vm, fpst); + } + break; + default: + g_assert_not_reached(); } + tcg_temp_free_i32(tcg_vn); tcg_temp_free_i32(tcg_vm); } @@ -4532,16 +4548,35 @@ static void handle_fp_compare(DisasContext *s, bool= is_double, static void disas_fp_compare(DisasContext *s, uint32_t insn) { unsigned int mos, type, rm, op, rn, opc, op2r; + int size; =20 mos =3D extract32(insn, 29, 3); - type =3D extract32(insn, 22, 2); /* 0 =3D single, 1 =3D double */ + type =3D extract32(insn, 22, 2); rm =3D extract32(insn, 16, 5); op =3D extract32(insn, 14, 2); rn =3D extract32(insn, 5, 5); opc =3D extract32(insn, 3, 2); op2r =3D extract32(insn, 0, 3); =20 - if (mos || op || op2r || type > 1) { + if (mos || op || op2r) { + unallocated_encoding(s); + return; + } + + switch (type) { + case 0: + size =3D MO_32; + break; + case 1: + size =3D MO_64; + break; + case 3: + size =3D MO_16; + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } @@ -4550,7 +4585,7 @@ static void disas_fp_compare(DisasContext *s, uint32_= t insn) return; } =20 - handle_fp_compare(s, type, rn, rm, opc & 1, opc & 2); + handle_fp_compare(s, size, rn, rm, opc & 1, opc & 2); } =20 /* Floating point conditional compare @@ -4564,16 +4599,35 @@ static void disas_fp_ccomp(DisasContext *s, uint32_= t insn) unsigned int mos, type, rm, cond, rn, op, nzcv; TCGv_i64 tcg_flags; TCGLabel *label_continue =3D NULL; + int size; =20 mos =3D extract32(insn, 29, 3); - type =3D extract32(insn, 22, 2); /* 0 =3D single, 1 =3D double */ + type =3D extract32(insn, 22, 2); rm =3D extract32(insn, 16, 5); cond =3D extract32(insn, 12, 4); rn =3D extract32(insn, 5, 5); op =3D extract32(insn, 4, 1); nzcv =3D extract32(insn, 0, 4); =20 - if (mos || type > 1) { + if (mos) { + unallocated_encoding(s); + return; + } + + switch (type) { + case 0: + size =3D MO_32; + break; + case 1: + size =3D MO_64; + break; + case 3: + size =3D MO_16; + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } @@ -4594,7 +4648,7 @@ static void disas_fp_ccomp(DisasContext *s, uint32_t = insn) gen_set_label(label_match); } =20 - handle_fp_compare(s, type, rn, rm, false, op); + handle_fp_compare(s, size, rn, rm, false, op); =20 if (cond < 0x0e) { gen_set_label(label_continue); --=20 2.14.3 From nobody Wed Oct 29 20:36:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525300000449838.848958325576; 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[97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.16.09 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:16:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Qjy5KDciNnwaKwZSWdv3Ve9BMVD2CqGha4QSuIzajro=; b=Foz0SZTsRtXezzTitqGfd9EvbKbbstdiZ/GqNJAnnM3NTm/IYL0dETN5Hm0AAb+0Wt HgUooCugVqokRG0/YveMbEQhmiPANlSUXPeP7YbI+0LHKuZTvb9rUTTzq7kkagnFIi7l dNDe9Seqm2p9UPwJ7n6jaTOXcmxAvMYbCsCBM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Qjy5KDciNnwaKwZSWdv3Ve9BMVD2CqGha4QSuIzajro=; b=BuylXYnxEHWcvovNiES41uHnoq5y514gLi219LCq3NDOXwTkiW7zFKnryer5yGjn+d oYlvljf9el8gACwJ/fV+kZI009egXswRBvg2rsIDlZ1YjxXYX/LdBVqoxOWG7cx0pmnk fFbARAtfczH9n89lWnjrYGlsPil3+jPT+DPg+Ks+ePCDM+2V0qQvJYva6ep6pXPcrxah 5iaE6jRIGbMTIZ3bEG9odnwQynsMSY21dp6qWYjdp89bXEWHccvfI2UiohEs9pPkH9Ci G1i7d9IRM5wdWnFo+w6Igc5hOrUxiivYyDN7t+rbfdYJR501JlM5TcEsnSbYawPPlDoC UOlA== X-Gm-Message-State: ALQs6tC94Ms0Y33m8UrMly8kQ4/bSM308Ar5/z5RP/jnSzRou9m19jT6 eL79o5owUPVzKG+xN8ndPrcKLH1Q2Ok= X-Google-Smtp-Source: AB8JxZqNaJ0DtwmvV5wJPEUnvH8XLKYzXZ10C8uaMghiNk8FiNsKXj4HBFygmKsGgGxpfituCanYMw== X-Received: by 2002:a65:4e03:: with SMTP id r3-v6mr17674540pgt.121.1525299370415; Wed, 02 May 2018 15:16:10 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:50 -0700 Message-Id: <20180502221552.3873-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::244 Subject: [Qemu-devel] [PATCH v2 12/14] target/arm: Implement FCSEL for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 From: Alex Benn=C3=A9e These were missed out from the rest of the half-precision work. Cc: qemu-stable@nongnu.org Signed-off-by: Alex Benn=C3=A9e [rth: Fix erroneous check vs type] Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/translate-a64.c | 31 +++++++++++++++++++++++++------ 1 file changed, 25 insertions(+), 6 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index f0aca20771..1ea5185f14 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -4666,15 +4666,34 @@ static void disas_fp_csel(DisasContext *s, uint32_t= insn) unsigned int mos, type, rm, cond, rn, rd; TCGv_i64 t_true, t_false, t_zero; DisasCompare64 c; + TCGMemOp sz; =20 mos =3D extract32(insn, 29, 3); - type =3D extract32(insn, 22, 2); /* 0 =3D single, 1 =3D double */ + type =3D extract32(insn, 22, 2); rm =3D extract32(insn, 16, 5); cond =3D extract32(insn, 12, 4); rn =3D extract32(insn, 5, 5); rd =3D extract32(insn, 0, 5); =20 - if (mos || type > 1) { + if (mos) { + unallocated_encoding(s); + return; + } + + switch(type) { + case 0: + sz =3D MO_32; + break; + case 1: + sz =3D MO_64; + break; + case 3: + sz =3D MO_16; + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } @@ -4683,11 +4702,11 @@ static void disas_fp_csel(DisasContext *s, uint32_t= insn) return; } =20 - /* Zero extend sreg inputs to 64 bits now. */ + /* Zero extend sreg & hreg inputs to 64 bits now. */ t_true =3D tcg_temp_new_i64(); t_false =3D tcg_temp_new_i64(); - read_vec_element(s, t_true, rn, 0, type ? MO_64 : MO_32); - read_vec_element(s, t_false, rm, 0, type ? MO_64 : MO_32); + read_vec_element(s, t_true, rn, 0, sz); + read_vec_element(s, t_false, rm, 0, sz); =20 a64_test_cc(&c, cond); t_zero =3D tcg_const_i64(0); @@ -4696,7 +4715,7 @@ static void disas_fp_csel(DisasContext *s, uint32_t i= nsn) tcg_temp_free_i64(t_false); a64_free_cc(&c); =20 - /* Note that sregs write back zeros to the high bits, + /* Note that sregs & hregs write back zeros to the high bits, and we've already done the zero-extension. */ write_fp_dreg(s, rd, t_true); tcg_temp_free_i64(t_true); --=20 2.14.3 From nobody Wed Oct 29 20:36:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525300285903499.2832917084545; Wed, 2 May 2018 15:31:25 -0700 (PDT) Received: from localhost ([::1]:52887 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE0HR-0004gE-7F for importer@patchew.org; Wed, 02 May 2018 18:31:21 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59034) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02o-0000oz-B6 for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02n-00084H-2M for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:14 -0400 Received: from mail-pg0-x244.google.com ([2607:f8b0:400e:c05::244]:45787) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02m-00082v-UE for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:13 -0400 Received: by mail-pg0-x244.google.com with SMTP id i29-v6so11613134pgn.12 for ; Wed, 02 May 2018 15:16:12 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.16.10 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:16:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/7J+dDkSM4Xa1wJSgJjRgLbXvJcp4wTSzR2jMj2N0bo=; b=jglgpfj8DC/RkpFTtU7vE3OR4pf+ON78LNY9WZmzws6i+pUNZALYLywCxLS3sTjmoa 14Wjq8YEYC4LDPMAZlRV5qj4URehqV40eCTQRSP+sns2ckeiAtV28pdbMMuHCIWHxL6L 01rU+3bLJcIHOYryAvX3JHFkFAf/2ZI+yZIEg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/7J+dDkSM4Xa1wJSgJjRgLbXvJcp4wTSzR2jMj2N0bo=; b=t5brm1AZTtXAdeTEcYmFs3BYftkPhtga2vadiRHkQ1aKczxTOhmduYMtivxRwzMh8O fHwJyl4UfzELOjHtWgAnjwJ8sw5vdWP4rpypkFm/lekpjbjzrLRzWk6inv403ShEXpZm wJSlKC427x90oRfiPyHoQNGaYd6G+A+75oP7ptPwaZIam9ezJeYBKITSe4+8UM0c0aDE 77PD11i2YtzVyKG5VOibfUlsxAErUUuVE6L2aMdy5UTmFBr/Rsl4BstO1eNIMqPTAedq RDe09Jmzo4w1WjaQOGoWPTT5e+BnrpAaKjULzhbjUWZITfcKfZRBY05fC0/1HL20tUCV jHcA== X-Gm-Message-State: ALQs6tAin+fula/RkmnhdBcoZi7GN2PsrIJYpNfv59TZTP13tjgJy0OG 8bw6mVr0m8MxZLsQK99wcgM4WXU34x0= X-Google-Smtp-Source: AB8JxZpv4NiE6j0ciqOw7SonTa8zQJnD4ZmLY5ZUluEkjpDMfP3zcR0q0qPWfh8O/tmIHdIAk+QqBA== X-Received: by 2002:a17:902:76c1:: with SMTP id j1-v6mr21452037plt.284.1525299371717; Wed, 02 May 2018 15:16:11 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:51 -0700 Message-Id: <20180502221552.3873-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::244 Subject: [Qemu-devel] [PATCH v2 13/14] target/arm: Implement FMOV (immediate) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 From: Alex Benn=C3=A9e All the hard work is already done by vfp_expand_imm, we just need to make sure we pick up the correct size. Cc: qemu-stable@nongnu.org Signed-off-by: Alex Benn=C3=A9e [rth: Merge unallocated_encoding check with TCGMemOp conversion.] Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/translate-a64.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 1ea5185f14..b73d6d96cd 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5437,11 +5437,25 @@ static void disas_fp_imm(DisasContext *s, uint32_t = insn) { int rd =3D extract32(insn, 0, 5); int imm8 =3D extract32(insn, 13, 8); - int is_double =3D extract32(insn, 22, 2); + int type =3D extract32(insn, 22, 2); uint64_t imm; TCGv_i64 tcg_res; + TCGMemOp sz; =20 - if (is_double > 1) { + switch (type) { + case 0: + sz =3D MO_32; + break; + case 1: + sz =3D MO_64; + break; + case 3: + sz =3D MO_16; + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } @@ -5450,7 +5464,7 @@ static void disas_fp_imm(DisasContext *s, uint32_t in= sn) return; } =20 - imm =3D vfp_expand_imm(MO_32 + is_double, imm8); + imm =3D vfp_expand_imm(sz, imm8); =20 tcg_res =3D tcg_const_i64(imm); write_fp_dreg(s, rd, tcg_res); --=20 2.14.3 From nobody Wed Oct 29 20:36:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525300042345671.9463673293561; Wed, 2 May 2018 15:27:22 -0700 (PDT) Received: from localhost ([::1]:52861 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE0DY-0001KG-Pv for importer@patchew.org; Wed, 02 May 2018 18:27:20 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59073) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fE02r-0000qd-9m for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fE02o-00086W-DQ for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:17 -0400 Received: from mail-pg0-x242.google.com ([2607:f8b0:400e:c05::242]:40799) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fE02o-00084t-42 for qemu-devel@nongnu.org; Wed, 02 May 2018 18:16:14 -0400 Received: by mail-pg0-x242.google.com with SMTP id l2-v6so11621658pgc.7 for ; Wed, 02 May 2018 15:16:14 -0700 (PDT) Received: from cloudburst.twiddle.net (97-113-2-170.tukw.qwest.net. [97.113.2.170]) by smtp.gmail.com with ESMTPSA id 65sm26170145pft.74.2018.05.02.15.16.11 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 15:16:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Nwrrh4E41GtFRXCHQJcmc6i/oaMBOH59tfZ3rvdlzVw=; b=RVuLu1SjmHrN0GXNBM9ImbFwEhHFClUtAFWVIyzU1AdRuIiiYbNWZsyzoWYbAeMf+5 3Hf2qLiNBvd5j9vUzFUMh8yFl1rdiPLv7EY/YTrPw0TgXwhCrwibMfd5sflbZ+s2hVQj v+fHzN56gfQM9H9heLOaUnnSNFEvLwGHO87/8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Nwrrh4E41GtFRXCHQJcmc6i/oaMBOH59tfZ3rvdlzVw=; b=R7yG6a5cTOrAVspaGYg8rxVbU1O/2lo6Yt2aO4IKOwRQZalG2Pwlm9KAkBWWkKKPTd l2h0WyCurRlRKflwCYXvcQHSB9RzTrnvT1MVrXd5V88r1YEPfelFigqLqve8ZpradSwy 5aWnppJU25B40e3RjDsy7p/KqEUOWZjg2dgeRSLWal2x32dmdQwH7oaawuJYfwTuB9xo NbRnyykD2QrzUVrHZEMnz03SGI+hR/L7vr/tK3nI6XOuBOxOHhexKN/GRKyunlnCzWS4 AXKyimK/PJ0q+NWF+da8RLrCICNASAMC/jEfU8VrxRu0uTMRXSqw2EGD8IT4frL+/SvE tHOw== X-Gm-Message-State: ALQs6tAlBOwIuBR3UoU1YJn9co9dg7mhw5XeiIgvk7uq/9EnIWhOWz5D PXJmy43CqQffZu86DS6At7XrNz6NlWo= X-Google-Smtp-Source: AB8JxZrLTtipcixwYM4biPL/cLivOCF1HPD09REO0lD6fxWgEVUUk28ZlMZUFMWfZf3m8LkHjlw3xA== X-Received: by 2002:a63:6706:: with SMTP id b6-v6mr17373639pgc.214.1525299372927; Wed, 02 May 2018 15:16:12 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 15:15:52 -0700 Message-Id: <20180502221552.3873-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180502221552.3873-1-richard.henderson@linaro.org> References: <20180502221552.3873-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::242 Subject: [Qemu-devel] [PATCH v2 14/14] target/arm: Fix sqrt_f16 exception raising X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 From: Alex Benn=C3=A9e We are meant to explicitly pass fpst, not cpu_env. Cc: qemu-stable@nongnu.org Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index b73d6d96cd..07e196c19c 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -4739,7 +4739,8 @@ static void handle_fp_1src_half(DisasContext *s, int = opcode, int rd, int rn) tcg_gen_xori_i32(tcg_res, tcg_op, 0x8000); break; case 0x3: /* FSQRT */ - gen_helper_sqrt_f16(tcg_res, tcg_op, cpu_env); + fpst =3D get_fpstatus_ptr(true); + gen_helper_sqrt_f16(tcg_res, tcg_op, fpst); break; case 0x8: /* FRINTN */ case 0x9: /* FRINTP */ --=20 2.14.3