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[94.255.130.40]) by smtp.gmail.com with ESMTPSA id e24-v6sm2510687lfb.54.2018.05.02.13.06.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 02 May 2018 13:06:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Dymmtzzuh/pXUX3KaU4d12JqPx5A4DfdPxm7eUw3F9I=; b=uYhr0KX2tyPnU6uz2vm5u3e0kcg5xLp71tpfDk9TKTey8EdWhOu81PTux+/ucuEOgp PqVS9Nz9weRO+eJsItSHA3tSYuAch7jWTZbHcIwpC+kdXDlnJtC6qDuG+GCE90P4Yf7P zCzMiU13T+P+2j7nKbLzhqZXgsxPUByBByEQ/Y4p1RMvWpkRgenYMjipg0VkaNkCr7Fz p6Ekt5x6uT/HrYGyyaFfAMZLHdeoQWbS9O4FWS1z3MF3A3qbDA3sRaLb15GhAeMK/8CZ vE/7zwGeU/na6JV9VQ52bUP/a1f1VETiTLD+Gvt2hAcq8YB15XAFOqCmmIiPN3WrbFZ3 2WTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Dymmtzzuh/pXUX3KaU4d12JqPx5A4DfdPxm7eUw3F9I=; b=a7EHZLWZ2FLzbFgS8WlHJ1RZoZawxmcFF1kB+VTHmcrjhV453jeTkTntZvz0pNZTgJ BHBXgeCxJL4nQoYey9Ur2WqOhnJuDfUun0CwKvfRl+Y650q+8YcUwliHQU0vEMi3NrID ioTZFa47nJU9YeuPpYdBcivDRwLk49lSYCQjIfSwXKPgd5piTnJKFzK3gsKEVcnHk5hv 26YJBp69N7jDaHO2GOpqRFRVXh+mJN13DZ2OtdaS+a7bEVXlAwxxmfO3W5JaaximVToE 2kWUqjSFOkDTQUUKZSktzMkbugrLAuLkIhXarxPwwfv9S8elbmT0g7gU3r3G6HKKXIbY 8Mww== X-Gm-Message-State: ALQs6tDq36aeVArRt5U/1Xz1ic3+5eEgGYvfw6AOel1JHqoocorEhVYv WbRaUl3pbAbPGS525hu9/7mYKw== X-Google-Smtp-Source: AB8JxZqERus2LYxBpBM7nbyT8Gm18bzcoSO1Tu3C5ZVp0+L+dNfLOHi8dZivVz7OUkXTXDBKthGJpA== X-Received: by 2002:a2e:2402:: with SMTP id k2-v6mr15177403ljk.20.1525291605036; Wed, 02 May 2018 13:06:45 -0700 (PDT) From: Francisco Iglesias To: qemu-devel@nongnu.org Date: Wed, 2 May 2018 22:06:40 +0200 Message-Id: <20180502200640.22635-3-frasse.iglesias@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180502200640.22635-1-frasse.iglesias@gmail.com> References: <20180502200640.22635-1-frasse.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4010:c07::244 Subject: [Qemu-devel] [PATCH v2 2/2] xlnx-zynqmp: Connect the ZynqMP GDMA and ADMA X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, francisco.iglesias@feimtech.se, sai.pavan.boddu@xilinx.com, alistair@alistair23.me, edgari@xilinx.com, alistair23@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The ZynqMP contains two instances of a generic DMA, the GDMA, located in the FPD (full power domain), and the ADMA, located in LPD (low power domain). = This patch adds these two DMAs to the ZynqMP board. Signed-off-by: Francisco Iglesias --- hw/arm/xlnx-zynqmp.c | 53 ++++++++++++++++++++++++++++++++++++++++= ++++ include/hw/arm/xlnx-zynqmp.h | 5 +++++ 2 files changed, 58 insertions(+) diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index 505253e0d2..2045b9d71e 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -90,6 +90,24 @@ static const int spi_intr[XLNX_ZYNQMP_NUM_SPIS] =3D { 19, 20, }; =20 +static const uint64_t gdma_ch_addr[XLNX_ZYNQMP_NUM_GDMA_CH] =3D { + 0xFD500000, 0xFD510000, 0xFD520000, 0xFD530000, + 0xFD540000, 0xFD550000, 0xFD560000, 0xFD570000 +}; + +static const int gdma_ch_intr[XLNX_ZYNQMP_NUM_GDMA_CH] =3D { + 124, 125, 126, 127, 128, 129, 130, 131 +}; + +static const uint64_t adma_ch_addr[XLNX_ZYNQMP_NUM_ADMA_CH] =3D { + 0xFFA80000, 0xFFA90000, 0xFFAA0000, 0xFFAB0000, + 0xFFAC0000, 0xFFAD0000, 0xFFAE0000, 0xFFAF0000 +}; + +static const int adma_ch_intr[XLNX_ZYNQMP_NUM_ADMA_CH] =3D { + 77, 78, 79, 80, 81, 82, 83, 84 +}; + typedef struct XlnxZynqMPGICRegion { int region_index; uint32_t address; @@ -197,6 +215,16 @@ static void xlnx_zynqmp_init(Object *obj) =20 object_initialize(&s->rtc, sizeof(s->rtc), TYPE_XLNX_ZYNQMP_RTC); qdev_set_parent_bus(DEVICE(&s->rtc), sysbus_get_default()); + + for (i =3D 0; i < XLNX_ZYNQMP_NUM_GDMA_CH; i++) { + object_initialize(&s->gdma[i], sizeof(s->gdma[i]), TYPE_XLNX_ZDMA); + qdev_set_parent_bus(DEVICE(&s->gdma[i]), sysbus_get_default()); + } + + for (i =3D 0; i < XLNX_ZYNQMP_NUM_ADMA_CH; i++) { + object_initialize(&s->adma[i], sizeof(s->adma[i]), TYPE_XLNX_ZDMA); + qdev_set_parent_bus(DEVICE(&s->adma[i]), sysbus_get_default()); + } } =20 static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) @@ -492,6 +520,31 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Erro= r **errp) } sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, RTC_ADDR); sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, gic_spi[RTC_IRQ]); + + for (i =3D 0; i < XLNX_ZYNQMP_NUM_GDMA_CH; i++) { + object_property_set_uint(OBJECT(&s->gdma[i]), 128, "bus-width", &e= rr); + object_property_set_bool(OBJECT(&s->gdma[i]), true, "realized", &e= rr); + if (err) { + error_propagate(errp, err); + return; + } + + sysbus_mmio_map(SYS_BUS_DEVICE(&s->gdma[i]), 0, gdma_ch_addr[i]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->gdma[i]), 0, + gic_spi[gdma_ch_intr[i]]); + } + + for (i =3D 0; i < XLNX_ZYNQMP_NUM_ADMA_CH; i++) { + object_property_set_bool(OBJECT(&s->adma[i]), true, "realized", &e= rr); + if (err) { + error_propagate(errp, err); + return; + } + + sysbus_mmio_map(SYS_BUS_DEVICE(&s->adma[i]), 0, adma_ch_addr[i]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->adma[i]), 0, + gic_spi[adma_ch_intr[i]]); + } } =20 static Property xlnx_zynqmp_props[] =3D { diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h index 3b613e364d..82b6ec2486 100644 --- a/include/hw/arm/xlnx-zynqmp.h +++ b/include/hw/arm/xlnx-zynqmp.h @@ -27,6 +27,7 @@ #include "hw/sd/sdhci.h" #include "hw/ssi/xilinx_spips.h" #include "hw/dma/xlnx_dpdma.h" +#include "hw/dma/xlnx-zdma.h" #include "hw/display/xlnx_dp.h" #include "hw/intc/xlnx-zynqmp-ipi.h" #include "hw/timer/xlnx-zynqmp-rtc.h" @@ -41,6 +42,8 @@ #define XLNX_ZYNQMP_NUM_UARTS 2 #define XLNX_ZYNQMP_NUM_SDHCI 2 #define XLNX_ZYNQMP_NUM_SPIS 2 +#define XLNX_ZYNQMP_NUM_GDMA_CH 8 +#define XLNX_ZYNQMP_NUM_ADMA_CH 8 =20 #define XLNX_ZYNQMP_NUM_QSPI_BUS 2 #define XLNX_ZYNQMP_NUM_QSPI_BUS_CS 2 @@ -94,6 +97,8 @@ typedef struct XlnxZynqMPState { XlnxDPDMAState dpdma; XlnxZynqMPIPI ipi; XlnxZynqMPRTC rtc; + XlnxZDMA gdma[XLNX_ZYNQMP_NUM_GDMA_CH]; + XlnxZDMA adma[XLNX_ZYNQMP_NUM_ADMA_CH]; =20 char *boot_cpu; ARMCPU *boot_cpu_ptr; --=20 2.11.0