From nobody Wed Oct 29 09:10:30 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525165745912573.0913741356568; Tue, 1 May 2018 02:09:05 -0700 (PDT) Received: from localhost ([::1]:36742 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDRHV-0001bf-1m for importer@patchew.org; Tue, 01 May 2018 05:09:05 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46144) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDR8X-0003XR-HR for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fDR8W-0007ru-1E for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:49 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41380) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fDR8V-0007p3-P1 for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:47 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fDR8P-0007Ll-9E; Tue, 01 May 2018 09:59:41 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 1 May 2018 09:59:28 +0100 Message-Id: <20180501085939.6201-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180501085939.6201-1-peter.maydell@linaro.org> References: <20180501085939.6201-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [RFC PATCH v2 01/12] Make tb_invalidate_phys_addr() take a MemTxAttrs argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Eric Auger , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" As part of plumbing MemTxAttrs down to the IOMMU translate method, add MemTxAttrs as an argument to tb_invalidate_phys_addr(). Its callers either have an attrs value to hand, or don't care and can use MEMTXATTRS_UNSPECIFIED. Signed-off-by: Peter Maydell --- include/exec/exec-all.h | 5 +++-- accel/tcg/translate-all.c | 2 +- exec.c | 2 +- target/xtensa/op_helper.c | 3 ++- 4 files changed, 7 insertions(+), 5 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index bd68328ed9..4d09eaba72 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -255,7 +255,7 @@ void tlb_set_page_with_attrs(CPUState *cpu, target_ulon= g vaddr, void tlb_set_page(CPUState *cpu, target_ulong vaddr, hwaddr paddr, int prot, int mmu_idx, target_ulong size); -void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr); +void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs att= rs); void probe_write(CPUArchState *env, target_ulong addr, int size, int mmu_i= dx, uintptr_t retaddr); #else @@ -303,7 +303,8 @@ static inline void tlb_flush_by_mmuidx_all_cpus_synced(= CPUState *cpu, uint16_t idxmap) { } -static inline void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr) +static inline void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, + MemTxAttrs attrs) { } #endif diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index f409d42d54..f04a922ef7 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1672,7 +1672,7 @@ static TranslationBlock *tb_find_pc(uintptr_t tc_ptr) } =20 #if !defined(CONFIG_USER_ONLY) -void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr) +void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs att= rs) { ram_addr_t ram_addr; MemoryRegion *mr; diff --git a/exec.c b/exec.c index c7fcefa851..df35e6dd85 100644 --- a/exec.c +++ b/exec.c @@ -863,7 +863,7 @@ static void breakpoint_invalidate(CPUState *cpu, target= _ulong pc) if (phys !=3D -1) { /* Locks grabbed by tb_invalidate_phys_addr */ tb_invalidate_phys_addr(cpu->cpu_ases[asidx].as, - phys | (pc & ~TARGET_PAGE_MASK)); + phys | (pc & ~TARGET_PAGE_MASK), attrs); } } #endif diff --git a/target/xtensa/op_helper.c b/target/xtensa/op_helper.c index e3bcbe10d6..8a8c763c63 100644 --- a/target/xtensa/op_helper.c +++ b/target/xtensa/op_helper.c @@ -105,7 +105,8 @@ static void tb_invalidate_virtual_addr(CPUXtensaState *= env, uint32_t vaddr) int ret =3D xtensa_get_physical_addr(env, false, vaddr, 2, 0, &paddr, &page_size, &access); if (ret =3D=3D 0) { - tb_invalidate_phys_addr(&address_space_memory, paddr); + tb_invalidate_phys_addr(&address_space_memory, paddr, + MEMTXATTRS_UNSPECIFIED); } } =20 --=20 2.17.0 From nobody Wed Oct 29 09:10:30 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525165743771465.4315722655248; Tue, 1 May 2018 02:09:03 -0700 (PDT) Received: from localhost ([::1]:36741 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDRHT-0001Zs-0M for importer@patchew.org; Tue, 01 May 2018 05:09:03 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46138) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDR8X-0003Wu-41 for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fDR8V-0007rm-Os for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:49 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41356) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fDR8V-0007mW-Gq for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:47 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fDR8P-0007M3-VR; Tue, 01 May 2018 09:59:41 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 1 May 2018 09:59:29 +0100 Message-Id: <20180501085939.6201-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180501085939.6201-1-peter.maydell@linaro.org> References: <20180501085939.6201-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [RFC PATCH v2 02/12] Make address_space_translate() take a MemTxAttrs argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Eric Auger , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" As part of plumbing MemTxAttrs down to the IOMMU translate method, add MemTxAttrs as an argument to address_space_translate(). Its callers either have an attrs value to hand, or don't care and can use MEMTXATTRS_UNSPECIFIED. Signed-off-by: Peter Maydell --- include/exec/memory.h | 4 +++- accel/tcg/translate-all.c | 2 +- exec.c | 6 ++++-- hw/vfio/common.c | 3 ++- memory_ldst.inc.c | 18 +++++++++--------- target/riscv/helper.c | 2 +- 6 files changed, 20 insertions(+), 15 deletions(-) diff --git a/include/exec/memory.h b/include/exec/memory.h index e62965a0c8..f416d1e985 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -1909,6 +1909,7 @@ IOMMUTLBEntry address_space_get_iotlb_entry(AddressSp= ace *as, hwaddr addr, * #MemoryRegion. * @len: pointer to length * @is_write: indicates the transfer direction + * @attrs: memory attributes */ MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr, hwaddr *xlat, @@ -1916,7 +1917,8 @@ MemoryRegion *flatview_translate(FlatView *fv, =20 static inline MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr, hwaddr *x= lat, - hwaddr *len, bool is_w= rite) + hwaddr *len, bool is_w= rite, + MemTxAttrs attrs) { return flatview_translate(address_space_to_flatview(as), addr, xlat, len, is_write); diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index f04a922ef7..52f7bd59a9 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1679,7 +1679,7 @@ void tb_invalidate_phys_addr(AddressSpace *as, hwaddr= addr, MemTxAttrs attrs) hwaddr l =3D 1; =20 rcu_read_lock(); - mr =3D address_space_translate(as, addr, &addr, &l, false); + mr =3D address_space_translate(as, addr, &addr, &l, false, attrs); if (!(memory_region_is_ram(mr) || memory_region_is_romd(mr))) { rcu_read_unlock(); diff --git a/exec.c b/exec.c index df35e6dd85..a0f27b7b8c 100644 --- a/exec.c +++ b/exec.c @@ -3287,7 +3287,8 @@ static inline void cpu_physical_memory_write_rom_inte= rnal(AddressSpace *as, rcu_read_lock(); while (len > 0) { l =3D len; - mr =3D address_space_translate(as, addr, &addr1, &l, true); + mr =3D address_space_translate(as, addr, &addr1, &l, true, + MEMTXATTRS_UNSPECIFIED); =20 if (!(memory_region_is_ram(mr) || memory_region_is_romd(mr))) { @@ -3716,7 +3717,8 @@ bool cpu_physical_memory_is_io(hwaddr phys_addr) =20 rcu_read_lock(); mr =3D address_space_translate(&address_space_memory, - phys_addr, &phys_addr, &l, false); + phys_addr, &phys_addr, &l, false, + MEMTXATTRS_UNSPECIFIED); =20 res =3D !(memory_region_is_ram(mr) || memory_region_is_romd(mr)); rcu_read_unlock(); diff --git a/hw/vfio/common.c b/hw/vfio/common.c index 07ffa0ba10..8e57265edf 100644 --- a/hw/vfio/common.c +++ b/hw/vfio/common.c @@ -324,7 +324,8 @@ static bool vfio_get_vaddr(IOMMUTLBEntry *iotlb, void *= *vaddr, */ mr =3D address_space_translate(&address_space_memory, iotlb->translated_addr, - &xlat, &len, writable); + &xlat, &len, writable, + MEMTXATTRS_UNSPECIFIED); if (!memory_region_is_ram(mr)) { error_report("iommu map to non memory area %"HWADDR_PRIx"", xlat); diff --git a/memory_ldst.inc.c b/memory_ldst.inc.c index 5dbff9cef8..860ba31ac8 100644 --- a/memory_ldst.inc.c +++ b/memory_ldst.inc.c @@ -33,7 +33,7 @@ static inline uint32_t glue(address_space_ldl_internal, S= UFFIX)(ARG1_DECL, bool release_lock =3D false; =20 RCU_READ_LOCK(); - mr =3D TRANSLATE(addr, &addr1, &l, false); + mr =3D TRANSLATE(addr, &addr1, &l, false, attrs); if (l < 4 || !IS_DIRECT(mr, false)) { release_lock |=3D prepare_mmio_access(mr); =20 @@ -127,7 +127,7 @@ static inline uint64_t glue(address_space_ldq_internal,= SUFFIX)(ARG1_DECL, bool release_lock =3D false; =20 RCU_READ_LOCK(); - mr =3D TRANSLATE(addr, &addr1, &l, false); + mr =3D TRANSLATE(addr, &addr1, &l, false, attrs); if (l < 8 || !IS_DIRECT(mr, false)) { release_lock |=3D prepare_mmio_access(mr); =20 @@ -219,7 +219,7 @@ uint32_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, bool release_lock =3D false; =20 RCU_READ_LOCK(); - mr =3D TRANSLATE(addr, &addr1, &l, false); + mr =3D TRANSLATE(addr, &addr1, &l, false, attrs); if (!IS_DIRECT(mr, false)) { release_lock |=3D prepare_mmio_access(mr); =20 @@ -261,7 +261,7 @@ static inline uint32_t glue(address_space_lduw_internal= , SUFFIX)(ARG1_DECL, bool release_lock =3D false; =20 RCU_READ_LOCK(); - mr =3D TRANSLATE(addr, &addr1, &l, false); + mr =3D TRANSLATE(addr, &addr1, &l, false, attrs); if (l < 2 || !IS_DIRECT(mr, false)) { release_lock |=3D prepare_mmio_access(mr); =20 @@ -356,7 +356,7 @@ void glue(address_space_stl_notdirty, SUFFIX)(ARG1_DECL, bool release_lock =3D false; =20 RCU_READ_LOCK(); - mr =3D TRANSLATE(addr, &addr1, &l, true); + mr =3D TRANSLATE(addr, &addr1, &l, true, attrs); if (l < 4 || !IS_DIRECT(mr, true)) { release_lock |=3D prepare_mmio_access(mr); =20 @@ -399,7 +399,7 @@ static inline void glue(address_space_stl_internal, SUF= FIX)(ARG1_DECL, bool release_lock =3D false; =20 RCU_READ_LOCK(); - mr =3D TRANSLATE(addr, &addr1, &l, true); + mr =3D TRANSLATE(addr, &addr1, &l, true, attrs); if (l < 4 || !IS_DIRECT(mr, true)) { release_lock |=3D prepare_mmio_access(mr); =20 @@ -489,7 +489,7 @@ void glue(address_space_stb, SUFFIX)(ARG1_DECL, bool release_lock =3D false; =20 RCU_READ_LOCK(); - mr =3D TRANSLATE(addr, &addr1, &l, true); + mr =3D TRANSLATE(addr, &addr1, &l, true, attrs); if (!IS_DIRECT(mr, true)) { release_lock |=3D prepare_mmio_access(mr); r =3D memory_region_dispatch_write(mr, addr1, val, 1, attrs); @@ -528,7 +528,7 @@ static inline void glue(address_space_stw_internal, SUF= FIX)(ARG1_DECL, bool release_lock =3D false; =20 RCU_READ_LOCK(); - mr =3D TRANSLATE(addr, &addr1, &l, true); + mr =3D TRANSLATE(addr, &addr1, &l, true, attrs); if (l < 2 || !IS_DIRECT(mr, true)) { release_lock |=3D prepare_mmio_access(mr); =20 @@ -619,7 +619,7 @@ static void glue(address_space_stq_internal, SUFFIX)(AR= G1_DECL, bool release_lock =3D false; =20 RCU_READ_LOCK(); - mr =3D TRANSLATE(addr, &addr1, &l, true); + mr =3D TRANSLATE(addr, &addr1, &l, true, attrs); if (l < 8 || !IS_DIRECT(mr, true)) { release_lock |=3D prepare_mmio_access(mr); =20 diff --git a/target/riscv/helper.c b/target/riscv/helper.c index 02cbcea2b7..d7023ad78e 100644 --- a/target/riscv/helper.c +++ b/target/riscv/helper.c @@ -210,7 +210,7 @@ restart: MemoryRegion *mr; hwaddr l =3D sizeof(target_ulong), addr1; mr =3D address_space_translate(cs->as, pte_addr, - &addr1, &l, false); + &addr1, &l, false, MEMTXATTRS_UNSPECIFIED); if (memory_access_is_direct(mr, true)) { target_ulong *pte_pa =3D qemu_map_ram_ptr(mr->ram_block, addr1); --=20 2.17.0 From nobody Wed Oct 29 09:10:30 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525165349003225.87064655696645; Tue, 1 May 2018 02:02:29 -0700 (PDT) Received: from localhost ([::1]:35365 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDRB6-0004re-6G for importer@patchew.org; Tue, 01 May 2018 05:02:28 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46063) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDR8T-0003Tb-RL for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fDR8S-0007ny-QD for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:45 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41356) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fDR8S-0007mW-Ip for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:44 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fDR8Q-0007MK-M4; Tue, 01 May 2018 09:59:42 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 1 May 2018 09:59:30 +0100 Message-Id: <20180501085939.6201-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180501085939.6201-1-peter.maydell@linaro.org> References: <20180501085939.6201-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [RFC PATCH v2 03/12] Make address_space_map() take a MemTxAttrs argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Eric Auger , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" As part of plumbing MemTxAttrs down to the IOMMU translate method, add MemTxAttrs as an argument to address_space_map(). Its callers either have an attrs value to hand, or don't care and can use MEMTXATTRS_UNSPECIFIED. Signed-off-by: Peter Maydell --- include/exec/memory.h | 3 ++- include/sysemu/dma.h | 3 ++- exec.c | 6 ++++-- target/ppc/mmu-hash64.c | 3 ++- 4 files changed, 10 insertions(+), 5 deletions(-) diff --git a/include/exec/memory.h b/include/exec/memory.h index f416d1e985..1af4e3cd5b 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -1953,9 +1953,10 @@ bool address_space_access_valid(AddressSpace *as, hw= addr addr, int len, bool is_ * @addr: address within that address space * @plen: pointer to length of buffer; updated on return * @is_write: indicates the transfer direction + * @attrs: memory attributes */ void *address_space_map(AddressSpace *as, hwaddr addr, - hwaddr *plen, bool is_write); + hwaddr *plen, bool is_write, MemTxAttrs attrs); =20 /* address_space_unmap: Unmaps a memory region previously mapped by addres= s_space_map() * diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h index c228c66513..0d73902634 100644 --- a/include/sysemu/dma.h +++ b/include/sysemu/dma.h @@ -132,7 +132,8 @@ static inline void *dma_memory_map(AddressSpace *as, hwaddr xlen =3D *len; void *p; =20 - p =3D address_space_map(as, addr, &xlen, dir =3D=3D DMA_DIRECTION_FROM= _DEVICE); + p =3D address_space_map(as, addr, &xlen, dir =3D=3D DMA_DIRECTION_FROM= _DEVICE, + MEMTXATTRS_UNSPECIFIED); *len =3D xlen; return p; } diff --git a/exec.c b/exec.c index a0f27b7b8c..eb6471abfe 100644 --- a/exec.c +++ b/exec.c @@ -3494,7 +3494,8 @@ flatview_extend_translation(FlatView *fv, hwaddr addr, void *address_space_map(AddressSpace *as, hwaddr addr, hwaddr *plen, - bool is_write) + bool is_write, + MemTxAttrs attrs) { hwaddr len =3D *plen; hwaddr l, xlat; @@ -3581,7 +3582,8 @@ void *cpu_physical_memory_map(hwaddr addr, hwaddr *plen, int is_write) { - return address_space_map(&address_space_memory, addr, plen, is_write); + return address_space_map(&address_space_memory, addr, plen, is_write, + MEMTXATTRS_UNSPECIFIED); } =20 void cpu_physical_memory_unmap(void *buffer, hwaddr len, diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index 7e0adecfd9..4839dc22f0 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -431,7 +431,8 @@ const ppc_hash_pte64_t *ppc_hash64_map_hptes(PowerPCCPU= *cpu, return NULL; } =20 - hptes =3D address_space_map(CPU(cpu)->as, base + pte_offset, &plen, fa= lse); + hptes =3D address_space_map(CPU(cpu)->as, base + pte_offset, &plen, fa= lse, + MEMTXATTRS_UNSPECIFIED); if (plen < (n * HASH_PTE_SIZE_64)) { hw_error("%s: Unable to map all requested HPTEs\n", __func__); } --=20 2.17.0 From nobody Wed Oct 29 09:10:30 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525165499926933.2499232205786; Tue, 1 May 2018 02:04:59 -0700 (PDT) Received: from localhost ([::1]:35413 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDRDN-0006C1-4n for importer@patchew.org; Tue, 01 May 2018 05:04:49 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46083) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDR8U-0003UO-Ur for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fDR8T-0007ok-Nf for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:47 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41356) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fDR8T-0007mW-Fk for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:45 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fDR8R-0007Ma-EM; Tue, 01 May 2018 09:59:43 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 1 May 2018 09:59:31 +0100 Message-Id: <20180501085939.6201-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180501085939.6201-1-peter.maydell@linaro.org> References: <20180501085939.6201-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [RFC PATCH v2 04/12] Make address_space_access_valid() take a MemTxAttrs argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Eric Auger , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" As part of plumbing MemTxAttrs down to the IOMMU translate method, add MemTxAttrs as an argument to address_space_access_valid(). Its callers either have an attrs value to hand, or don't care and can use MEMTXATTRS_UNSPECIFIED. Signed-off-by: Peter Maydell --- include/exec/memory.h | 4 +++- include/sysemu/dma.h | 3 ++- exec.c | 3 ++- target/s390x/diag.c | 6 ++++-- target/s390x/excp_helper.c | 3 ++- target/s390x/mmu_helper.c | 3 ++- target/s390x/sigp.c | 3 ++- 7 files changed, 17 insertions(+), 8 deletions(-) diff --git a/include/exec/memory.h b/include/exec/memory.h index 1af4e3cd5b..eb1ceace27 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -1938,8 +1938,10 @@ static inline MemoryRegion *address_space_translate(= AddressSpace *as, * @addr: address within that address space * @len: length of the area to be checked * @is_write: indicates the transfer direction + * @attrs: memory attributes */ -bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, bo= ol is_write); +bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, + bool is_write, MemTxAttrs attrs); =20 /* address_space_map: map a physical memory region into a host virtual add= ress * diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h index 0d73902634..5da3c4e3c5 100644 --- a/include/sysemu/dma.h +++ b/include/sysemu/dma.h @@ -77,7 +77,8 @@ static inline bool dma_memory_valid(AddressSpace *as, DMADirection dir) { return address_space_access_valid(as, addr, len, - dir =3D=3D DMA_DIRECTION_FROM_DEVICE= ); + dir =3D=3D DMA_DIRECTION_FROM_DEVICE, + MEMTXATTRS_UNSPECIFIED); } =20 static inline int dma_memory_rw_relaxed(AddressSpace *as, dma_addr_t addr, diff --git a/exec.c b/exec.c index eb6471abfe..87650dc7ed 100644 --- a/exec.c +++ b/exec.c @@ -3445,7 +3445,8 @@ static bool flatview_access_valid(FlatView *fv, hwadd= r addr, int len, } =20 bool address_space_access_valid(AddressSpace *as, hwaddr addr, - int len, bool is_write) + int len, bool is_write, + MemTxAttrs attrs) { FlatView *fv; bool result; diff --git a/target/s390x/diag.c b/target/s390x/diag.c index a755837ad5..6ab473e7b6 100644 --- a/target/s390x/diag.c +++ b/target/s390x/diag.c @@ -140,7 +140,8 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1, u= int64_t r3, uintptr_t ra) return; } if (!address_space_access_valid(&address_space_memory, addr, - sizeof(IplParameterBlock), false))= { + sizeof(IplParameterBlock), false, + MEMTXATTRS_UNSPECIFIED)) { s390_program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO, ra); return; } @@ -169,7 +170,8 @@ out: return; } if (!address_space_access_valid(&address_space_memory, addr, - sizeof(IplParameterBlock), true)) { + sizeof(IplParameterBlock), true, + MEMTXATTRS_UNSPECIFIED)) { s390_program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO, ra); return; } diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index dfee221111..f0ce60cff2 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -120,7 +120,8 @@ int s390_cpu_handle_mmu_fault(CPUState *cs, vaddr orig_= vaddr, int size, =20 /* check out of RAM access */ if (!address_space_access_valid(&address_space_memory, raddr, - TARGET_PAGE_SIZE, rw)) { + TARGET_PAGE_SIZE, rw, + MEMTXATTRS_UNSPECIFIED)) { DPRINTF("%s: raddr %" PRIx64 " > ram_size %" PRIx64 "\n", __func__, (uint64_t)raddr, (uint64_t)ram_size); trigger_pgm_exception(env, PGM_ADDRESSING, ILEN_AUTO); diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index a25deef5dd..145b62a7ef 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -461,7 +461,8 @@ static int translate_pages(S390CPU *cpu, vaddr addr, in= t nr_pages, return ret; } if (!address_space_access_valid(&address_space_memory, pages[i], - TARGET_PAGE_SIZE, is_write)) { + TARGET_PAGE_SIZE, is_write, + MEMTXATTRS_UNSPECIFIED)) { trigger_access_exception(env, PGM_ADDRESSING, ILEN_AUTO, 0); return -EFAULT; } diff --git a/target/s390x/sigp.c b/target/s390x/sigp.c index aff1530c82..c1f9245797 100644 --- a/target/s390x/sigp.c +++ b/target/s390x/sigp.c @@ -280,7 +280,8 @@ static void sigp_set_prefix(CPUState *cs, run_on_cpu_da= ta arg) cpu_synchronize_state(cs); =20 if (!address_space_access_valid(&address_space_memory, addr, - sizeof(struct LowCore), false)) { + sizeof(struct LowCore), false, + MEMTXATTRS_UNSPECIFIED)) { set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); return; } --=20 2.17.0 From nobody Wed Oct 29 09:10:30 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525165572341834.0410776162497; Tue, 1 May 2018 02:06:12 -0700 (PDT) Received: from localhost ([::1]:35809 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDREc-0007Rl-Jq for importer@patchew.org; Tue, 01 May 2018 05:06:06 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46068) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDR8U-0003Ts-87 for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fDR8T-0007oT-Hg for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:46 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41372) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fDR8T-0007ns-97 for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:45 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fDR8S-0007N9-68; Tue, 01 May 2018 09:59:44 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 1 May 2018 09:59:32 +0100 Message-Id: <20180501085939.6201-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180501085939.6201-1-peter.maydell@linaro.org> References: <20180501085939.6201-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [RFC PATCH v2 05/12] Make flatview_extend_translation() take a MemTxAttrs argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Eric Auger , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" As part of plumbing MemTxAttrs down to the IOMMU translate method, add MemTxAttrs as an argument to flatview_extend_translation(). Its callers either have an attrs value to hand, or don't care and can use MEMTXATTRS_UNSPECIFIED. Signed-off-by: Peter Maydell --- exec.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/exec.c b/exec.c index 87650dc7ed..e56c3442c7 100644 --- a/exec.c +++ b/exec.c @@ -3460,9 +3460,9 @@ bool address_space_access_valid(AddressSpace *as, hwa= ddr addr, =20 static hwaddr flatview_extend_translation(FlatView *fv, hwaddr addr, - hwaddr target_len, - MemoryRegion *mr, hwaddr base, hwaddr len, - bool is_write) + hwaddr target_len, + MemoryRegion *mr, hwaddr base, hwaddr len, + bool is_write, MemTxAttrs attrs) { hwaddr done =3D 0; hwaddr xlat; @@ -3539,7 +3539,7 @@ void *address_space_map(AddressSpace *as, =20 memory_region_ref(mr); *plen =3D flatview_extend_translation(fv, addr, len, mr, xlat, - l, is_write); + l, is_write, attrs); ptr =3D qemu_ram_ptr_length(mr->ram_block, xlat, plen, true); rcu_read_unlock(); =20 --=20 2.17.0 From nobody Wed Oct 29 09:10:30 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525165355001735.7360638161241; Tue, 1 May 2018 02:02:35 -0700 (PDT) Received: from localhost ([::1]:35366 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDRBC-0004tJ-8V for importer@patchew.org; Tue, 01 May 2018 05:02:34 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46105) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDR8V-0003Vc-Ub for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fDR8U-0007qA-Qm for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:48 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41356) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fDR8U-0007mW-Gn for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:46 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fDR8S-0007Nf-Sf; Tue, 01 May 2018 09:59:44 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 1 May 2018 09:59:33 +0100 Message-Id: <20180501085939.6201-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180501085939.6201-1-peter.maydell@linaro.org> References: <20180501085939.6201-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [RFC PATCH v2 06/12] Make memory_region_access_valid() take a MemTxAttrs argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Eric Auger , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" As part of plumbing MemTxAttrs down to the IOMMU translate method, add MemTxAttrs as an argument to memory_region_access_valid(). Its callers either have an attrs value to hand, or don't care and can use MEMTXATTRS_UNSPECIFIED. The callsite in flatview_access_valid() is part of a recursive loop flatview_access_valid() -> memory_region_access_valid() -> subpage_accepts() -> flatview_access_valid(); we make it pass MEMTXATTRS_UNSPECIFIED for now, until the next several commits have plumbed an attrs parameter through the rest of the loop and we can add an attrs parameter to flatview_access_valid(). Signed-off-by: Peter Maydell --- include/exec/memory-internal.h | 3 ++- exec.c | 4 +++- hw/s390x/s390-pci-inst.c | 3 ++- memory.c | 7 ++++--- 4 files changed, 11 insertions(+), 6 deletions(-) diff --git a/include/exec/memory-internal.h b/include/exec/memory-internal.h index 6a5ee42d36..063dca0475 100644 --- a/include/exec/memory-internal.h +++ b/include/exec/memory-internal.h @@ -34,7 +34,8 @@ static inline AddressSpaceDispatch *address_space_to_disp= atch(AddressSpace *as) extern const MemoryRegionOps unassigned_mem_ops; =20 bool memory_region_access_valid(MemoryRegion *mr, hwaddr addr, - unsigned size, bool is_write); + unsigned size, bool is_write, + MemTxAttrs attrs); =20 void flatview_add_to_dispatch(FlatView *fv, MemoryRegionSection *section); AddressSpaceDispatch *address_space_dispatch_new(FlatView *fv); diff --git a/exec.c b/exec.c index e56c3442c7..57a984758e 100644 --- a/exec.c +++ b/exec.c @@ -3433,7 +3433,9 @@ static bool flatview_access_valid(FlatView *fv, hwadd= r addr, int len, mr =3D flatview_translate(fv, addr, &xlat, &l, is_write); if (!memory_access_is_direct(mr, is_write)) { l =3D memory_access_size(mr, l, addr); - if (!memory_region_access_valid(mr, xlat, l, is_write)) { + /* When our callers all have attrs we'll pass them through her= e */ + if (!memory_region_access_valid(mr, xlat, l, is_write, + MEMTXATTRS_UNSPECIFIED)) { return false; } } diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c index 3fcc330fe3..2e7b4068c0 100644 --- a/hw/s390x/s390-pci-inst.c +++ b/hw/s390x/s390-pci-inst.c @@ -770,7 +770,8 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8= _t r3, uint64_t gaddr, mr =3D s390_get_subregion(mr, offset, len); offset -=3D mr->addr; =20 - if (!memory_region_access_valid(mr, offset, len, true)) { + if (!memory_region_access_valid(mr, offset, len, true, + MEMTXATTRS_UNSPECIFIED)) { s390_program_interrupt(env, PGM_OPERAND, 6, ra); return 0; } diff --git a/memory.c b/memory.c index e70b64b8b9..0f8f37a57b 100644 --- a/memory.c +++ b/memory.c @@ -1347,7 +1347,8 @@ static const MemoryRegionOps ram_device_mem_ops =3D { bool memory_region_access_valid(MemoryRegion *mr, hwaddr addr, unsigned size, - bool is_write) + bool is_write, + MemTxAttrs attrs) { int access_size_min, access_size_max; int access_size, i; @@ -1416,7 +1417,7 @@ MemTxResult memory_region_dispatch_read(MemoryRegion = *mr, { MemTxResult r; =20 - if (!memory_region_access_valid(mr, addr, size, false)) { + if (!memory_region_access_valid(mr, addr, size, false, attrs)) { *pval =3D unassigned_mem_read(mr, addr, size); return MEMTX_DECODE_ERROR; } @@ -1458,7 +1459,7 @@ MemTxResult memory_region_dispatch_write(MemoryRegion= *mr, unsigned size, MemTxAttrs attrs) { - if (!memory_region_access_valid(mr, addr, size, true)) { + if (!memory_region_access_valid(mr, addr, size, true, attrs)) { unassigned_mem_write(mr, addr, data, size); return MEMTX_DECODE_ERROR; } --=20 2.17.0 From nobody Wed Oct 29 09:10:30 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525165677806127.00484427923709; Tue, 1 May 2018 02:07:57 -0700 (PDT) Received: from localhost ([::1]:36378 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDRGO-0000Vh-Vf for importer@patchew.org; Tue, 01 May 2018 05:07:57 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46109) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDR8W-0003Vr-80 for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fDR8V-0007qd-1b for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:48 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41380) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fDR8U-0007p3-Nu for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:46 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fDR8T-0007OR-JI; Tue, 01 May 2018 09:59:45 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 1 May 2018 09:59:34 +0100 Message-Id: <20180501085939.6201-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180501085939.6201-1-peter.maydell@linaro.org> References: <20180501085939.6201-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [RFC PATCH v2 07/12] Make MemoryRegion valid.accepts callback take a MemTxAttrs argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Eric Auger , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" As part of plumbing MemTxAttrs down to the IOMMU translate method, add MemTxAttrs as an argument to the MemoryRegion valid.accepts callback. We'll need this for subpage_accepts(). We could take the approach we used with the read and write callbacks and add new a new _with_attrs version, but since there are so few implementations of the accepts hook we just change them all. Signed-off-by: Peter Maydell --- include/exec/memory.h | 3 ++- exec.c | 9 ++++++--- hw/hppa/dino.c | 3 ++- hw/nvram/fw_cfg.c | 12 ++++++++---- hw/scsi/esp.c | 3 ++- hw/xen/xen_pt_msi.c | 3 ++- memory.c | 5 +++-- 7 files changed, 25 insertions(+), 13 deletions(-) diff --git a/include/exec/memory.h b/include/exec/memory.h index eb1ceace27..7c461b9718 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -166,7 +166,8 @@ struct MemoryRegionOps { * as a machine check exception). */ bool (*accepts)(void *opaque, hwaddr addr, - unsigned size, bool is_write); + unsigned size, bool is_write, + MemTxAttrs attrs); } valid; /* Internal implementation constraints: */ struct { diff --git a/exec.c b/exec.c index 57a984758e..3ceeb0643f 100644 --- a/exec.c +++ b/exec.c @@ -2504,7 +2504,8 @@ static void notdirty_mem_write(void *opaque, hwaddr r= am_addr, } =20 static bool notdirty_mem_accepts(void *opaque, hwaddr addr, - unsigned size, bool is_write) + unsigned size, bool is_write, + MemTxAttrs attrs) { return is_write; } @@ -2727,7 +2728,8 @@ static MemTxResult subpage_write(void *opaque, hwaddr= addr, } =20 static bool subpage_accepts(void *opaque, hwaddr addr, - unsigned len, bool is_write) + unsigned len, bool is_write, + MemTxAttrs attrs) { subpage_t *subpage =3D opaque; #if defined(DEBUG_SUBPAGE) @@ -2810,7 +2812,8 @@ static void readonly_mem_write(void *opaque, hwaddr a= ddr, } =20 static bool readonly_mem_accepts(void *opaque, hwaddr addr, - unsigned size, bool is_write) + unsigned size, bool is_write, + MemTxAttrs attrs) { return is_write; } diff --git a/hw/hppa/dino.c b/hw/hppa/dino.c index 15aefde09c..77463672a3 100644 --- a/hw/hppa/dino.c +++ b/hw/hppa/dino.c @@ -137,7 +137,8 @@ static void gsc_to_pci_forwarding(DinoState *s) } =20 static bool dino_chip_mem_valid(void *opaque, hwaddr addr, - unsigned size, bool is_write) + unsigned size, bool is_write, + MemTxAttrs attrs) { switch (addr) { case DINO_IAR0: diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index 2a0739d0e9..b23e7f64a8 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -420,14 +420,16 @@ static void fw_cfg_dma_mem_write(void *opaque, hwaddr= addr, } =20 static bool fw_cfg_dma_mem_valid(void *opaque, hwaddr addr, - unsigned size, bool is_write) + unsigned size, bool is_write, + MemTxAttrs attrs) { return !is_write || ((size =3D=3D 4 && (addr =3D=3D 0 || addr =3D=3D 4= )) || (size =3D=3D 8 && addr =3D=3D 0)); } =20 static bool fw_cfg_data_mem_valid(void *opaque, hwaddr addr, - unsigned size, bool is_write) + unsigned size, bool is_write, + MemTxAttrs attrs) { return addr =3D=3D 0; } @@ -439,7 +441,8 @@ static void fw_cfg_ctl_mem_write(void *opaque, hwaddr a= ddr, } =20 static bool fw_cfg_ctl_mem_valid(void *opaque, hwaddr addr, - unsigned size, bool is_write) + unsigned size, bool is_write, + MemTxAttrs attrs) { return is_write && size =3D=3D 2; } @@ -458,7 +461,8 @@ static void fw_cfg_comb_write(void *opaque, hwaddr addr, } =20 static bool fw_cfg_comb_valid(void *opaque, hwaddr addr, - unsigned size, bool is_write) + unsigned size, bool is_write, + MemTxAttrs attrs) { return (size =3D=3D 1) || (is_write && size =3D=3D 2); } diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index 64ec285826..9ed9727744 100644 --- a/hw/scsi/esp.c +++ b/hw/scsi/esp.c @@ -564,7 +564,8 @@ void esp_reg_write(ESPState *s, uint32_t saddr, uint64_= t val) } =20 static bool esp_mem_accepts(void *opaque, hwaddr addr, - unsigned size, bool is_write) + unsigned size, bool is_write, + MemTxAttrs attrs) { return (size =3D=3D 1) || (is_write && size =3D=3D 4); } diff --git a/hw/xen/xen_pt_msi.c b/hw/xen/xen_pt_msi.c index 6d1e3bdeb4..cc514f9157 100644 --- a/hw/xen/xen_pt_msi.c +++ b/hw/xen/xen_pt_msi.c @@ -498,7 +498,8 @@ static uint64_t pci_msix_read(void *opaque, hwaddr addr, } =20 static bool pci_msix_accepts(void *opaque, hwaddr addr, - unsigned size, bool is_write) + unsigned size, bool is_write, + MemTxAttrs attrs) { return !(addr & (size - 1)); } diff --git a/memory.c b/memory.c index 0f8f37a57b..a729c29862 100644 --- a/memory.c +++ b/memory.c @@ -1269,7 +1269,8 @@ static void unassigned_mem_write(void *opaque, hwaddr= addr, } =20 static bool unassigned_mem_accepts(void *opaque, hwaddr addr, - unsigned size, bool is_write) + unsigned size, bool is_write, + MemTxAttrs attrs) { return false; } @@ -1374,7 +1375,7 @@ bool memory_region_access_valid(MemoryRegion *mr, access_size =3D MAX(MIN(size, access_size_max), access_size_min); for (i =3D 0; i < size; i +=3D access_size) { if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size, - is_write)) { + is_write, attrs)) { return false; } } --=20 2.17.0 From nobody Wed Oct 29 09:10:30 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15251655761611002.1260489725827; Tue, 1 May 2018 02:06:16 -0700 (PDT) Received: from localhost ([::1]:35844 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDREk-0007XU-Mh for importer@patchew.org; Tue, 01 May 2018 05:06:14 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46147) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDR8X-0003Xm-Ov for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fDR8W-0007sV-M9 for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:49 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41356) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fDR8W-0007mW-Fo for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:48 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fDR8U-0007Oy-B5; Tue, 01 May 2018 09:59:46 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 1 May 2018 09:59:35 +0100 Message-Id: <20180501085939.6201-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180501085939.6201-1-peter.maydell@linaro.org> References: <20180501085939.6201-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [RFC PATCH v2 08/12] Make flatview_access_valid() take a MemTxAttrs argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Eric Auger , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" As part of plumbing MemTxAttrs down to the IOMMU translate method, add MemTxAttrs as an argument to flatview_access_valid(). Its callers now all have an attrs value to hand, so we can correct our earlier temporary use of MEMTXATTRS_UNSPECIFIED. Signed-off-by: Peter Maydell --- exec.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/exec.c b/exec.c index 3ceeb0643f..0eef4702a5 100644 --- a/exec.c +++ b/exec.c @@ -2662,7 +2662,7 @@ static MemTxResult flatview_read(FlatView *fv, hwaddr= addr, static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs at= trs, const uint8_t *buf, int len); static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len, - bool is_write); + bool is_write, MemTxAttrs attrs); =20 static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data, unsigned len, MemTxAttrs attrs) @@ -2738,7 +2738,7 @@ static bool subpage_accepts(void *opaque, hwaddr addr, #endif =20 return flatview_access_valid(subpage->fv, addr + subpage->base, - len, is_write); + len, is_write, attrs); } =20 static const MemoryRegionOps subpage_ops =3D { @@ -3426,7 +3426,7 @@ static void cpu_notify_map_clients(void) } =20 static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len, - bool is_write) + bool is_write, MemTxAttrs attrs) { MemoryRegion *mr; hwaddr l, xlat; @@ -3437,8 +3437,7 @@ static bool flatview_access_valid(FlatView *fv, hwadd= r addr, int len, if (!memory_access_is_direct(mr, is_write)) { l =3D memory_access_size(mr, l, addr); /* When our callers all have attrs we'll pass them through her= e */ - if (!memory_region_access_valid(mr, xlat, l, is_write, - MEMTXATTRS_UNSPECIFIED)) { + if (!memory_region_access_valid(mr, xlat, l, is_write, attrs))= { return false; } } @@ -3458,7 +3457,7 @@ bool address_space_access_valid(AddressSpace *as, hwa= ddr addr, =20 rcu_read_lock(); fv =3D address_space_to_flatview(as); - result =3D flatview_access_valid(fv, addr, len, is_write); + result =3D flatview_access_valid(fv, addr, len, is_write, attrs); rcu_read_unlock(); return result; } --=20 2.17.0 From nobody Wed Oct 29 09:10:30 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525165886278269.40525335691143; Tue, 1 May 2018 02:11:26 -0700 (PDT) Received: from localhost ([::1]:36924 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDRJl-0003Vd-DD for importer@patchew.org; Tue, 01 May 2018 05:11:25 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46146) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDR8X-0003Xl-OR for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fDR8W-0007sL-G5 for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:49 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41388) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fDR8W-0007rX-6q for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:48 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fDR8V-0007PX-4G; Tue, 01 May 2018 09:59:47 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 1 May 2018 09:59:36 +0100 Message-Id: <20180501085939.6201-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180501085939.6201-1-peter.maydell@linaro.org> References: <20180501085939.6201-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [RFC PATCH v2 09/12] Make flatview_translate() take a MemTxAttrs argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Eric Auger , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" As part of plumbing MemTxAttrs down to the IOMMU translate method, add MemTxAttrs as an argument to flatview_translate(); all its callers now have attrs available. Signed-off-by: Peter Maydell --- include/exec/memory.h | 7 ++++--- exec.c | 17 +++++++++-------- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/include/exec/memory.h b/include/exec/memory.h index 7c461b9718..bd50424804 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -1914,7 +1914,8 @@ IOMMUTLBEntry address_space_get_iotlb_entry(AddressSp= ace *as, hwaddr addr, */ MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr, hwaddr *xlat, - hwaddr *len, bool is_write); + hwaddr *len, bool is_write, + MemTxAttrs attrs); =20 static inline MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr, hwaddr *x= lat, @@ -1922,7 +1923,7 @@ static inline MemoryRegion *address_space_translate(A= ddressSpace *as, MemTxAttrs attrs) { return flatview_translate(address_space_to_flatview(as), - addr, xlat, len, is_write); + addr, xlat, len, is_write, attrs); } =20 /* address_space_access_valid: check for validity of accessing an address @@ -2024,7 +2025,7 @@ MemTxResult address_space_read(AddressSpace *as, hwad= dr addr, rcu_read_lock(); fv =3D address_space_to_flatview(as); l =3D len; - mr =3D flatview_translate(fv, addr, &addr1, &l, false); + mr =3D flatview_translate(fv, addr, &addr1, &l, false, attrs); if (len =3D=3D l && memory_access_is_direct(mr, false)) { ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); memcpy(buf, ptr, len); diff --git a/exec.c b/exec.c index 0eef4702a5..41f7a7f5c4 100644 --- a/exec.c +++ b/exec.c @@ -583,7 +583,8 @@ iotlb_fail: =20 /* Called from RCU critical section */ MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr, hwaddr *xlat, - hwaddr *plen, bool is_write) + hwaddr *plen, bool is_write, + MemTxAttrs attrs) { MemoryRegion *mr; MemoryRegionSection section; @@ -3117,7 +3118,7 @@ static MemTxResult flatview_write_continue(FlatView *= fv, hwaddr addr, } =20 l =3D len; - mr =3D flatview_translate(fv, addr, &addr1, &l, true); + mr =3D flatview_translate(fv, addr, &addr1, &l, true, attrs); } =20 return result; @@ -3133,7 +3134,7 @@ static MemTxResult flatview_write(FlatView *fv, hwadd= r addr, MemTxAttrs attrs, MemTxResult result =3D MEMTX_OK; =20 l =3D len; - mr =3D flatview_translate(fv, addr, &addr1, &l, true); + mr =3D flatview_translate(fv, addr, &addr1, &l, true, attrs); result =3D flatview_write_continue(fv, addr, attrs, buf, len, addr1, l, mr); =20 @@ -3204,7 +3205,7 @@ MemTxResult flatview_read_continue(FlatView *fv, hwad= dr addr, } =20 l =3D len; - mr =3D flatview_translate(fv, addr, &addr1, &l, false); + mr =3D flatview_translate(fv, addr, &addr1, &l, false, attrs); } =20 return result; @@ -3219,7 +3220,7 @@ static MemTxResult flatview_read(FlatView *fv, hwaddr= addr, MemoryRegion *mr; =20 l =3D len; - mr =3D flatview_translate(fv, addr, &addr1, &l, false); + mr =3D flatview_translate(fv, addr, &addr1, &l, false, attrs); return flatview_read_continue(fv, addr, attrs, buf, len, addr1, l, mr); } @@ -3433,7 +3434,7 @@ static bool flatview_access_valid(FlatView *fv, hwadd= r addr, int len, =20 while (len > 0) { l =3D len; - mr =3D flatview_translate(fv, addr, &xlat, &l, is_write); + mr =3D flatview_translate(fv, addr, &xlat, &l, is_write, attrs); if (!memory_access_is_direct(mr, is_write)) { l =3D memory_access_size(mr, l, addr); /* When our callers all have attrs we'll pass them through her= e */ @@ -3482,7 +3483,7 @@ flatview_extend_translation(FlatView *fv, hwaddr addr, =20 len =3D target_len; this_mr =3D flatview_translate(fv, addr, &xlat, - &len, is_write); + &len, is_write, attrs); if (this_mr !=3D mr || xlat !=3D base + done) { return done; } @@ -3515,7 +3516,7 @@ void *address_space_map(AddressSpace *as, l =3D len; rcu_read_lock(); fv =3D address_space_to_flatview(as); - mr =3D flatview_translate(fv, addr, &xlat, &l, is_write); + mr =3D flatview_translate(fv, addr, &xlat, &l, is_write, attrs); =20 if (!memory_access_is_direct(mr, is_write)) { if (atomic_xchg(&bounce.in_use, true)) { --=20 2.17.0 From nobody Wed Oct 29 09:10:30 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525166032461132.77033013190476; Tue, 1 May 2018 02:13:52 -0700 (PDT) Received: from localhost ([::1]:37313 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDRM3-0005Nc-O7 for importer@patchew.org; Tue, 01 May 2018 05:13:47 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46185) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDR8Z-0003aG-S0 for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fDR8Y-0007tc-SZ for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:51 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41396) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fDR8Y-0007sf-M7 for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:50 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fDR8V-0007Q5-Tg; Tue, 01 May 2018 09:59:47 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 1 May 2018 09:59:37 +0100 Message-Id: <20180501085939.6201-11-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180501085939.6201-1-peter.maydell@linaro.org> References: <20180501085939.6201-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [RFC PATCH v2 10/12] Make address_space_get_iotlb_entry() take a MemTxAttrs argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Eric Auger , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" As part of plumbing MemTxAttrs down to the IOMMU translate method, add MemTxAttrs as an argument to address_space_get_iotlb_entry(). Signed-off-by: Peter Maydell --- include/exec/memory.h | 2 +- exec.c | 2 +- hw/virtio/vhost.c | 3 ++- 3 files changed, 4 insertions(+), 3 deletions(-) diff --git a/include/exec/memory.h b/include/exec/memory.h index bd50424804..16a82d9722 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -1897,7 +1897,7 @@ void stq_be_phys_cached(MemoryRegionCache *cache, hwa= ddr addr, uint64_t val); * entry. Should be called from an RCU critical section. */ IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr, - bool is_write); + bool is_write, MemTxAttrs attr= s); =20 /* address_space_translate: translate an address range into an address spa= ce * into a MemoryRegion and an address range into that section. Should be diff --git a/exec.c b/exec.c index 41f7a7f5c4..c29bf47ce2 100644 --- a/exec.c +++ b/exec.c @@ -547,7 +547,7 @@ translate_fail: =20 /* Called from RCU critical section */ IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr, - bool is_write) + bool is_write, MemTxAttrs attr= s) { MemoryRegionSection section; hwaddr xlat, page_mask; diff --git a/hw/virtio/vhost.c b/hw/virtio/vhost.c index 9d5850a7d7..48f4fd7cc9 100644 --- a/hw/virtio/vhost.c +++ b/hw/virtio/vhost.c @@ -895,7 +895,8 @@ int vhost_device_iotlb_miss(struct vhost_dev *dev, uint= 64_t iova, int write) rcu_read_lock(); =20 iotlb =3D address_space_get_iotlb_entry(dev->vdev->dma_as, - iova, write); + iova, write, + MEMTXATTRS_UNSPECIFIED); if (iotlb.target_as !=3D NULL) { ret =3D vhost_memory_region_lookup(dev, iotlb.translated_addr, &uaddr, &len); --=20 2.17.0 From nobody Wed Oct 29 09:10:30 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 152516588793558.94047115850208; Tue, 1 May 2018 02:11:27 -0700 (PDT) Received: from localhost ([::1]:36925 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDRJn-0003X9-58 for importer@patchew.org; Tue, 01 May 2018 05:11:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46173) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDR8Y-0003Yx-Rn for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fDR8X-0007tN-VN for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:50 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41396) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fDR8X-0007sf-On for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:49 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fDR8W-0007Qm-M4; Tue, 01 May 2018 09:59:48 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 1 May 2018 09:59:38 +0100 Message-Id: <20180501085939.6201-12-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180501085939.6201-1-peter.maydell@linaro.org> References: <20180501085939.6201-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [RFC PATCH v2 11/12] Make flatview_do_translate() take a MemTxAttrs argument X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Eric Auger , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" As part of plumbing MemTxAttrs down to the IOMMU translate method, add MemTxAttrs as an argument to flatview_do_translate(). Signed-off-by: Peter Maydell --- exec.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/exec.c b/exec.c index c29bf47ce2..9c6d9aae28 100644 --- a/exec.c +++ b/exec.c @@ -476,6 +476,7 @@ address_space_translate_internal(AddressSpaceDispatch *= d, hwaddr addr, hwaddr *x * would tell. It can be @NULL if we don't care about it. * @is_write: whether the translation operation is for write * @is_mmio: whether this can be MMIO, set true if it can + * @attrs: memory transaction attributes * * This function is called from RCU critical section */ @@ -486,7 +487,8 @@ static MemoryRegionSection flatview_do_translate(FlatVi= ew *fv, hwaddr *page_mask_out, bool is_write, bool is_mmio, - AddressSpace **target_as) + AddressSpace **target_as, + MemTxAttrs attrs) { IOMMUTLBEntry iotlb; MemoryRegionSection *section; @@ -557,7 +559,8 @@ IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpac= e *as, hwaddr addr, * but page mask. */ section =3D flatview_do_translate(address_space_to_flatview(as), addr,= &xlat, - NULL, &page_mask, is_write, false, &as= ); + NULL, &page_mask, is_write, false, &as, + attrs); =20 /* Illegal translation */ if (section.mr =3D=3D &io_mem_unassigned) { @@ -592,7 +595,7 @@ MemoryRegion *flatview_translate(FlatView *fv, hwaddr a= ddr, hwaddr *xlat, =20 /* This can be MMIO, so setup MMIO bit. */ section =3D flatview_do_translate(fv, addr, xlat, plen, NULL, - is_write, true, &as); + is_write, true, &as, attrs); mr =3D section.mr; =20 if (xen_enabled() && memory_access_is_direct(mr, is_write)) { --=20 2.17.0 From nobody Wed Oct 29 09:10:30 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525166181402813.4582691636243; Tue, 1 May 2018 02:16:21 -0700 (PDT) Received: from localhost ([::1]:38738 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDROO-0007q6-KI for importer@patchew.org; Tue, 01 May 2018 05:16:12 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46195) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fDR8b-0003bm-8m for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fDR8Z-0007tu-Pi for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:53 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41396) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fDR8Z-0007sf-H7 for qemu-devel@nongnu.org; Tue, 01 May 2018 04:59:51 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fDR8X-0007RI-BZ; Tue, 01 May 2018 09:59:49 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 1 May 2018 09:59:39 +0100 Message-Id: <20180501085939.6201-13-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180501085939.6201-1-peter.maydell@linaro.org> References: <20180501085939.6201-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [RFC PATCH v2 12/12] Add MemTxAttrs argument to IOMMU translate function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Eric Auger , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add a MemTxAttrs argument to the IOMMU translate function; this is necessary for IOMMU implementations that care about transaction attributes such as user/privileged or secure/nonsecure when deciding whether a transaction is permitted. Signed-off-by: Peter Maydell --- include/exec/memory.h | 3 ++- exec.c | 2 +- hw/alpha/typhoon.c | 3 ++- hw/dma/rc4030.c | 3 ++- hw/i386/amd_iommu.c | 3 ++- hw/i386/intel_iommu.c | 3 ++- hw/ppc/spapr_iommu.c | 3 ++- hw/s390x/s390-pci-bus.c | 3 ++- hw/sparc/sun4m_iommu.c | 3 ++- hw/sparc64/sun4u_iommu.c | 3 ++- memory.c | 3 ++- 11 files changed, 21 insertions(+), 11 deletions(-) diff --git a/include/exec/memory.h b/include/exec/memory.h index 16a82d9722..2c7dd4b373 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -221,9 +221,10 @@ typedef struct IOMMUMemoryRegionClass { * @iommu: the IOMMUMemoryRegion * @hwaddr: address to be translated within the memory region * @flag: requested access permissions + * @attrs: memory transaction attributes */ IOMMUTLBEntry (*translate)(IOMMUMemoryRegion *iommu, hwaddr addr, - IOMMUAccessFlags flag); + IOMMUAccessFlags flag, MemTxAttrs attrs); /* Returns minimum supported page size in bytes. * If this method is not provided then the minimum is assumed to * be TARGET_PAGE_SIZE. diff --git a/exec.c b/exec.c index 9c6d9aae28..e346424172 100644 --- a/exec.c +++ b/exec.c @@ -513,7 +513,7 @@ static MemoryRegionSection flatview_do_translate(FlatVi= ew *fv, imrc =3D memory_region_get_iommu_class_nocheck(iommu_mr); =20 iotlb =3D imrc->translate(iommu_mr, addr, is_write ? - IOMMU_WO : IOMMU_RO); + IOMMU_WO : IOMMU_RO, attrs); addr =3D ((iotlb.translated_addr & ~iotlb.addr_mask) | (addr & iotlb.addr_mask)); page_mask &=3D iotlb.addr_mask; diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 6a40869488..49192ab24d 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -666,7 +666,8 @@ static bool window_translate(TyphoonWindow *win, hwaddr= addr, Pchip and generate a machine check interrupt. */ static IOMMUTLBEntry typhoon_translate_iommu(IOMMUMemoryRegion *iommu, hwaddr addr, - IOMMUAccessFlags flag) + IOMMUAccessFlags flag, + MemTxAttrs attrs) { TyphoonPchip *pchip =3D container_of(iommu, TyphoonPchip, iommu); IOMMUTLBEntry ret; diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 5d4833eeca..89686ae7dc 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -491,7 +491,8 @@ static const MemoryRegionOps jazzio_ops =3D { }; =20 static IOMMUTLBEntry rc4030_dma_translate(IOMMUMemoryRegion *iommu, hwaddr= addr, - IOMMUAccessFlags flag) + IOMMUAccessFlags flag, + MemTxAttrs attrs) { rc4030State *s =3D container_of(iommu, rc4030State, dma_mr); IOMMUTLBEntry ret =3D { diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 63d46ff6ee..5f530b5fe6 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -991,7 +991,8 @@ static inline bool amdvi_is_interrupt_addr(hwaddr addr) } =20 static IOMMUTLBEntry amdvi_translate(IOMMUMemoryRegion *iommu, hwaddr addr, - IOMMUAccessFlags flag) + IOMMUAccessFlags flag, + MemTxAttrs attrs) { AMDVIAddressSpace *as =3D container_of(iommu, AMDVIAddressSpace, iommu= ); AMDVIState *s =3D as->iommu_state; diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index fb31de9416..483ff305f8 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2282,7 +2282,8 @@ static void vtd_mem_write(void *opaque, hwaddr addr, } =20 static IOMMUTLBEntry vtd_iommu_translate(IOMMUMemoryRegion *iommu, hwaddr = addr, - IOMMUAccessFlags flag) + IOMMUAccessFlags flag, + MemTxAttrs attrs) { VTDAddressSpace *vtd_as =3D container_of(iommu, VTDAddressSpace, iommu= ); IntelIOMMUState *s =3D vtd_as->iommu_state; diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c index aaa6010d5c..199612095a 100644 --- a/hw/ppc/spapr_iommu.c +++ b/hw/ppc/spapr_iommu.c @@ -112,7 +112,8 @@ static void spapr_tce_free_table(uint64_t *table, int f= d, uint32_t nb_table) /* Called from RCU critical section */ static IOMMUTLBEntry spapr_tce_translate_iommu(IOMMUMemoryRegion *iommu, hwaddr addr, - IOMMUAccessFlags flag) + IOMMUAccessFlags flag, + MemTxAttrs attrs) { sPAPRTCETable *tcet =3D container_of(iommu, sPAPRTCETable, iommu); uint64_t tce; diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index 10da87458e..77588c2355 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -484,7 +484,8 @@ uint16_t s390_guest_io_table_walk(uint64_t g_iota, hwad= dr addr, } =20 static IOMMUTLBEntry s390_translate_iommu(IOMMUMemoryRegion *mr, hwaddr ad= dr, - IOMMUAccessFlags flag) + IOMMUAccessFlags flag, + MemTxAttrs attrs) { S390PCIIOMMU *iommu =3D container_of(mr, S390PCIIOMMU, iommu_mr); S390IOTLBEntry *entry; diff --git a/hw/sparc/sun4m_iommu.c b/hw/sparc/sun4m_iommu.c index b677601fc6..f68bcade3c 100644 --- a/hw/sparc/sun4m_iommu.c +++ b/hw/sparc/sun4m_iommu.c @@ -282,7 +282,8 @@ static void iommu_bad_addr(IOMMUState *s, hwaddr addr, /* Called from RCU critical section */ static IOMMUTLBEntry sun4m_translate_iommu(IOMMUMemoryRegion *iommu, hwaddr addr, - IOMMUAccessFlags flags) + IOMMUAccessFlags flags, + MemTxAttrs attrs) { IOMMUState *is =3D container_of(iommu, IOMMUState, iommu); hwaddr page, pa; diff --git a/hw/sparc64/sun4u_iommu.c b/hw/sparc64/sun4u_iommu.c index eb3aaa87e6..7a5a588aed 100644 --- a/hw/sparc64/sun4u_iommu.c +++ b/hw/sparc64/sun4u_iommu.c @@ -73,7 +73,8 @@ /* Called from RCU critical section */ static IOMMUTLBEntry sun4u_translate_iommu(IOMMUMemoryRegion *iommu, hwaddr addr, - IOMMUAccessFlags flag) + IOMMUAccessFlags flag, + MemTxAttrs attrs) { IOMMUState *is =3D container_of(iommu, IOMMUState, iommu); hwaddr baseaddr, offset; diff --git a/memory.c b/memory.c index a729c29862..dbb9718bea 100644 --- a/memory.c +++ b/memory.c @@ -1832,7 +1832,8 @@ void memory_region_iommu_replay(IOMMUMemoryRegion *io= mmu_mr, IOMMUNotifier *n) granularity =3D memory_region_iommu_get_min_page_size(iommu_mr); =20 for (addr =3D 0; addr < memory_region_size(mr); addr +=3D granularity)= { - iotlb =3D imrc->translate(iommu_mr, addr, IOMMU_NONE); + iotlb =3D imrc->translate(iommu_mr, addr, IOMMU_NONE, + MEMTXATTRS_UNSPECIFIED); if (iotlb.perm !=3D IOMMU_NONE) { n->notify(n, &iotlb); } --=20 2.17.0