From nobody Tue Feb 10 00:59:53 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525081265161982.0221830323812; Mon, 30 Apr 2018 02:41:05 -0700 (PDT) Received: from localhost ([::1]:58711 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fD5Iu-0006RB-BO for importer@patchew.org; Mon, 30 Apr 2018 05:41:04 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33503) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fD4qf-0006x9-Gd for qemu-devel@nongnu.org; Mon, 30 Apr 2018 05:11:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fD4qa-0006o5-Fy for qemu-devel@nongnu.org; Mon, 30 Apr 2018 05:11:53 -0400 Received: from mout.kundenserver.de ([212.227.17.13]:32801) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fD4qZ-0006mA-WE; Mon, 30 Apr 2018 05:11:48 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue102 [212.227.15.183]) with ESMTPSA (Nemesis) id 0M1o1y-1eNiXW0uOQ-00tmty; Mon, 30 Apr 2018 11:11:24 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Mon, 30 Apr 2018 11:10:34 +0200 Message-Id: <20180430091037.13878-40-laurent@vivier.eu> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180430091037.13878-1-laurent@vivier.eu> References: <20180430091037.13878-1-laurent@vivier.eu> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:+UlEFPyMcLfLcWhFawbj/5DIsDiW9ESHsAnTN4vXP6lwzcmZZmd kpKfXd5i1NmfJHMQqeb20+tGkIaUwX9MusKYB1xsZvhhoy+T45XXeXCV4trcys3RlLEaKbB 7tUzfI7NWuj1TMJsPYqOta+sW0IId5vmNbXrihXk9sy6FEWSEZEXsaVkZmKeh/yXML6hJNW XWEJombr2Fze3plKV6ASg== X-UI-Out-Filterresults: notjunk:1;V01:K0:u9AWCb2oC9A=:2Gr/Oszc5G7XScneQqVK8Z d2fqFCEAqpwHFyWRRM8BS2xo+uypYrUlfEax9WPAelhXn+cqBg4DJub/SJUniMSndLOffNwKx CxgKpssuNo7rvbgJAftmXGUgRs9yOYD4B8n9H3eJ8jH8xR+VlNIVhddMqdUfdbEpWljWlu9L1 E/OG6grtzBs/s/2E9qpx6yabgPobIDbM7KDgcT7g4q+m0uO4YMILoPCjXazDr2QN8n1Bj5oxd 89NPs2Ueggj9fvqDvx34ZIL/9aKkzEcIlx4MfCXFIAnMFDNeutCVDSmUKlFWYWINx+6WGFFzZ KWRWGbJ1OK0alDe1iLX/B740t9mQhQfq8CfdEQRTb/PweYCz2J0fSfXEygVas71Kqo/uriNEW CGuE1vpXjuOloA2rmEmSYQ/BniD+DU1qYuTqu15Dd0VVvtGY0CxzD/oAmf5k0Zxalg/vU98dz 0NKHuZ38Go8fSDHfr1TXzassr4l55Nx1uogf2fTXn6d8bd+UA3WD0GhRqIy/82RRLtPi1fHC3 0Xnc0EObyo9lRaAGdcXMhJSa1bHqyAU0xlxomiQ0TcONTxP6Uhl03PpC/5DjyS9E8Dj4tM5bu pZsN+UccwcH9yVRPppWiJJzjdtstU3pr0dASs92GrS7CpdweqegBO5Svol+0X8EKb82MSFb51 kwuQGhrNGeFNFoALbSC6fc82+Rb1u3NpqseKCmIidkSLdaLSmSIPVCy/exakqwcdBpubxs12T MhYupNFZtMg9u64N X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.17.13 Subject: [Qemu-devel] [PULL 39/42] linux-user: move riscv cpu loop to riscv directory X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Riku Voipio , Laurent Vivier , Cornelia Huck Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 No code change, only move code from main.c to riscv/cpu_loop.c. Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson Reviewed-by: Michael Clark Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20180411185651.21351-18-laurent@vivier.eu> --- linux-user/main.c | 101 +---------------------------------------= ---- linux-user/riscv/cpu_loop.c | 92 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 93 insertions(+), 100 deletions(-) diff --git a/linux-user/main.c b/linux-user/main.c index 32922110f1..834ec0bfe5 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -149,100 +149,6 @@ void fork_end(int child) } } =20 -#ifdef TARGET_RISCV - -void cpu_loop(CPURISCVState *env) -{ - CPUState *cs =3D CPU(riscv_env_get_cpu(env)); - int trapnr, signum, sigcode; - target_ulong sigaddr; - target_ulong ret; - - for (;;) { - cpu_exec_start(cs); - trapnr =3D cpu_exec(cs); - cpu_exec_end(cs); - process_queued_cpu_work(cs); - - signum =3D 0; - sigcode =3D 0; - sigaddr =3D 0; - - switch (trapnr) { - case EXCP_INTERRUPT: - /* just indicate that signals should be handled asap */ - break; - case EXCP_ATOMIC: - cpu_exec_step_atomic(cs); - break; - case RISCV_EXCP_U_ECALL: - env->pc +=3D 4; - if (env->gpr[xA7] =3D=3D TARGET_NR_arch_specific_syscall + 15)= { - /* riscv_flush_icache_syscall is a no-op in QEMU as - self-modifying code is automatically detected */ - ret =3D 0; - } else { - ret =3D do_syscall(env, - env->gpr[xA7], - env->gpr[xA0], - env->gpr[xA1], - env->gpr[xA2], - env->gpr[xA3], - env->gpr[xA4], - env->gpr[xA5], - 0, 0); - } - if (ret =3D=3D -TARGET_ERESTARTSYS) { - env->pc -=3D 4; - } else if (ret !=3D -TARGET_QEMU_ESIGRETURN) { - env->gpr[xA0] =3D ret; - } - if (cs->singlestep_enabled) { - goto gdbstep; - } - break; - case RISCV_EXCP_ILLEGAL_INST: - signum =3D TARGET_SIGILL; - sigcode =3D TARGET_ILL_ILLOPC; - break; - case RISCV_EXCP_BREAKPOINT: - signum =3D TARGET_SIGTRAP; - sigcode =3D TARGET_TRAP_BRKPT; - sigaddr =3D env->pc; - break; - case RISCV_EXCP_INST_PAGE_FAULT: - case RISCV_EXCP_LOAD_PAGE_FAULT: - case RISCV_EXCP_STORE_PAGE_FAULT: - signum =3D TARGET_SIGSEGV; - sigcode =3D TARGET_SEGV_MAPERR; - break; - case EXCP_DEBUG: - gdbstep: - signum =3D gdb_handlesig(cs, TARGET_SIGTRAP); - sigcode =3D TARGET_TRAP_BRKPT; - break; - default: - EXCP_DUMP(env, "\nqemu: unhandled CPU exception %#x - aborting= \n", - trapnr); - exit(EXIT_FAILURE); - } - - if (signum) { - target_siginfo_t info =3D { - .si_signo =3D signum, - .si_errno =3D 0, - .si_code =3D sigcode, - ._sifields._sigfault._addr =3D sigaddr - }; - queue_signal(env, info.si_signo, QEMU_SI_KILL, &info); - } - - process_pending_signals(env); - } -} - -#endif /* TARGET_RISCV */ - #ifdef TARGET_HPPA =20 static abi_ulong hppa_lws(CPUHPPAState *env) @@ -1322,12 +1228,7 @@ int main(int argc, char **argv, char **envp) =20 target_cpu_copy_regs(env, regs); =20 -#if defined(TARGET_RISCV) - { - env->pc =3D regs->sepc; - env->gpr[xSP] =3D regs->sp; - } -#elif defined(TARGET_HPPA) +#if defined(TARGET_HPPA) { int i; for (i =3D 1; i < 32; i++) { diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c index b7700a5561..f137d39d7e 100644 --- a/linux-user/riscv/cpu_loop.c +++ b/linux-user/riscv/cpu_loop.c @@ -21,6 +21,98 @@ #include "qemu.h" #include "cpu_loop-common.h" =20 +void cpu_loop(CPURISCVState *env) +{ + CPUState *cs =3D CPU(riscv_env_get_cpu(env)); + int trapnr, signum, sigcode; + target_ulong sigaddr; + target_ulong ret; + + for (;;) { + cpu_exec_start(cs); + trapnr =3D cpu_exec(cs); + cpu_exec_end(cs); + process_queued_cpu_work(cs); + + signum =3D 0; + sigcode =3D 0; + sigaddr =3D 0; + + switch (trapnr) { + case EXCP_INTERRUPT: + /* just indicate that signals should be handled asap */ + break; + case EXCP_ATOMIC: + cpu_exec_step_atomic(cs); + break; + case RISCV_EXCP_U_ECALL: + env->pc +=3D 4; + if (env->gpr[xA7] =3D=3D TARGET_NR_arch_specific_syscall + 15)= { + /* riscv_flush_icache_syscall is a no-op in QEMU as + self-modifying code is automatically detected */ + ret =3D 0; + } else { + ret =3D do_syscall(env, + env->gpr[xA7], + env->gpr[xA0], + env->gpr[xA1], + env->gpr[xA2], + env->gpr[xA3], + env->gpr[xA4], + env->gpr[xA5], + 0, 0); + } + if (ret =3D=3D -TARGET_ERESTARTSYS) { + env->pc -=3D 4; + } else if (ret !=3D -TARGET_QEMU_ESIGRETURN) { + env->gpr[xA0] =3D ret; + } + if (cs->singlestep_enabled) { + goto gdbstep; + } + break; + case RISCV_EXCP_ILLEGAL_INST: + signum =3D TARGET_SIGILL; + sigcode =3D TARGET_ILL_ILLOPC; + break; + case RISCV_EXCP_BREAKPOINT: + signum =3D TARGET_SIGTRAP; + sigcode =3D TARGET_TRAP_BRKPT; + sigaddr =3D env->pc; + break; + case RISCV_EXCP_INST_PAGE_FAULT: + case RISCV_EXCP_LOAD_PAGE_FAULT: + case RISCV_EXCP_STORE_PAGE_FAULT: + signum =3D TARGET_SIGSEGV; + sigcode =3D TARGET_SEGV_MAPERR; + break; + case EXCP_DEBUG: + gdbstep: + signum =3D gdb_handlesig(cs, TARGET_SIGTRAP); + sigcode =3D TARGET_TRAP_BRKPT; + break; + default: + EXCP_DUMP(env, "\nqemu: unhandled CPU exception %#x - aborting= \n", + trapnr); + exit(EXIT_FAILURE); + } + + if (signum) { + target_siginfo_t info =3D { + .si_signo =3D signum, + .si_errno =3D 0, + .si_code =3D sigcode, + ._sifields._sigfault._addr =3D sigaddr + }; + queue_signal(env, info.si_signo, QEMU_SI_KILL, &info); + } + + process_pending_signals(env); + } +} + void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) { + env->pc =3D regs->sepc; + env->gpr[xSP] =3D regs->sp; } --=20 2.14.3