From nobody Tue Feb 10 01:32:54 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525080829247128.07352858002605; Mon, 30 Apr 2018 02:33:49 -0700 (PDT) Received: from localhost ([::1]:58658 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fD5Bs-0008T2-CR for importer@patchew.org; Mon, 30 Apr 2018 05:33:48 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33360) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fD4qX-0006mu-3K for qemu-devel@nongnu.org; Mon, 30 Apr 2018 05:11:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fD4qP-0006a8-Id for qemu-devel@nongnu.org; Mon, 30 Apr 2018 05:11:44 -0400 Received: from mout.kundenserver.de ([217.72.192.74]:54131) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fD4qD-0006Nt-AH; Mon, 30 Apr 2018 05:11:25 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue102 [212.227.15.183]) with ESMTPSA (Nemesis) id 0MKr32-1fD4q815KS-0002t2; Mon, 30 Apr 2018 11:11:20 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Mon, 30 Apr 2018 11:10:29 +0200 Message-Id: <20180430091037.13878-35-laurent@vivier.eu> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180430091037.13878-1-laurent@vivier.eu> References: <20180430091037.13878-1-laurent@vivier.eu> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:vcUJVp9Mb1UF3cKR7JrZECPSrAmlPrD48UaMaJYVwvoLB91ndL7 0//ARPKgFuBzLd2905k/f3mL7SUxq8KGY+UfQGG9TzI/Iq9p++PT+Zt04HYrxBCN4vnZkH0 QG5lK+2PoANFHs2MWq+VKWQO0DsP0O4VtXNnrElEN+JUie79gx1EiXzk3yHvk02GmNkFoPH YXde7xytpCAH1EtaTJPUQ== X-UI-Out-Filterresults: notjunk:1;V01:K0:OnpwqIf6gNU=:GaN8ye/uQ/Qp68lB4pvt0w 1bUZslhfWsaX/TYypBkjHDTHx3AlcrycBRwK7Fb2SHol9tisQy0On2fO6B3/nmtLZYRokvPnZ 79b+EU/s2S3pDIBhrYFVdB0QXC3xsqYMj4y6qOWIM1jijDnDjB9fl0CfR1XWShnTSLjkdGm86 mrQ89uUvNmASOLcs6qlXErJZe35gSoSg8Q6O/nBg5ebCjs2aHTwgLmWhS4YJJvOjVDx5jq1xM gkqOtt8hPJfGhLnveDG3bkWk1vwO5tVf2LNdKGEXOTeTVbq/zMpXTuhEQ28Ik1ficn6axcTco hVgYNMGMiK5UfpzyNhV9sYIdmzCGINll9KobRF1zMil1HPRtBP12RnmIJx7q9AANIkk+2S+im QqGVjDa3OU+y4zLg2DzBjN7iz+PjTCJeD5a6DfBkCynIQRuU6Q84Xiy3g6vkit8SVLtHV/JNx yXYYz5w1xpd5rV00YyDf3j9rcWyHmuu4DGMJzNBGT3lHf+aWMQ1Te1IWdxiEcPWJkUNN/GwKz Mgm2pVyHm3IF9W2WE0ODwLriRQClaz9w5lMxzKtiVS8dc77/oqwi2N2zCu96xJkaVHwUPlvlw nWAWSsp4Zr4+geq2nwzlKIpIlpcxQwkspbXS7KGqFsjcOz1STzpSssyyIubXc06+WgWfvxl6g AkRPtLUXjUFEYjC/ijZkXKH98TOoZGcCkpqfPVbAVaj2XmwpiN4/Yn4bGb6PE0f+48nb5doIc FjvT4PXmlcKJW7+Y X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 217.72.192.74 Subject: [Qemu-devel] [PULL 34/42] linux-user: move microblaze cpu loop to microblaze directory X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Riku Voipio , Laurent Vivier , Cornelia Huck Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 No code change, only move code from main.c to microblaze/cpu_loop.c. Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20180411185651.21351-13-laurent@vivier.eu> --- linux-user/main.c | 155 -----------------------------------= ---- linux-user/microblaze/cpu_loop.c | 150 +++++++++++++++++++++++++++++++++++= ++ 2 files changed, 150 insertions(+), 155 deletions(-) diff --git a/linux-user/main.c b/linux-user/main.c index 9e01325d6a..9e49c8a30c 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -149,125 +149,6 @@ void fork_end(int child) } } =20 -#ifdef TARGET_MICROBLAZE -void cpu_loop(CPUMBState *env) -{ - CPUState *cs =3D CPU(mb_env_get_cpu(env)); - int trapnr, ret; - target_siginfo_t info; - =20 - while (1) { - cpu_exec_start(cs); - trapnr =3D cpu_exec(cs); - cpu_exec_end(cs); - process_queued_cpu_work(cs); - - switch (trapnr) { - case 0xaa: - { - info.si_signo =3D TARGET_SIGSEGV; - info.si_errno =3D 0; - /* XXX: check env->error_code */ - info.si_code =3D TARGET_SEGV_MAPERR; - info._sifields._sigfault._addr =3D 0; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - } - break; - case EXCP_INTERRUPT: - /* just indicate that signals should be handled asap */ - break; - case EXCP_BREAK: - /* Return address is 4 bytes after the call. */ - env->regs[14] +=3D 4; - env->sregs[SR_PC] =3D env->regs[14]; - ret =3D do_syscall(env,=20 - env->regs[12],=20 - env->regs[5],=20 - env->regs[6],=20 - env->regs[7],=20 - env->regs[8],=20 - env->regs[9],=20 - env->regs[10], - 0, 0); - if (ret =3D=3D -TARGET_ERESTARTSYS) { - /* Wind back to before the syscall. */ - env->sregs[SR_PC] -=3D 4; - } else if (ret !=3D -TARGET_QEMU_ESIGRETURN) { - env->regs[3] =3D ret; - } - /* All syscall exits result in guest r14 being equal to the - * PC we return to, because the kernel syscall exit "rtbd" does - * this. (This is true even for sigreturn(); note that r14 is - * not a userspace-usable register, as the kernel may clobber = it - * at any point.) - */ - env->regs[14] =3D env->sregs[SR_PC]; - break; - case EXCP_HW_EXCP: - env->regs[17] =3D env->sregs[SR_PC] + 4; - if (env->iflags & D_FLAG) { - env->sregs[SR_ESR] |=3D 1 << 12; - env->sregs[SR_PC] -=3D 4; - /* FIXME: if branch was immed, replay the imm as well. */ - } - - env->iflags &=3D ~(IMM_FLAG | D_FLAG); - - switch (env->sregs[SR_ESR] & 31) { - case ESR_EC_DIVZERO: - info.si_signo =3D TARGET_SIGFPE; - info.si_errno =3D 0; - info.si_code =3D TARGET_FPE_FLTDIV; - info._sifields._sigfault._addr =3D 0; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - break; - case ESR_EC_FPU: - info.si_signo =3D TARGET_SIGFPE; - info.si_errno =3D 0; - if (env->sregs[SR_FSR] & FSR_IO) { - info.si_code =3D TARGET_FPE_FLTINV; - } - if (env->sregs[SR_FSR] & FSR_DZ) { - info.si_code =3D TARGET_FPE_FLTDIV; - } - info._sifields._sigfault._addr =3D 0; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - break; - default: - printf ("Unhandled hw-exception: 0x%x\n", - env->sregs[SR_ESR] & ESR_EC_MASK); - cpu_dump_state(cs, stderr, fprintf, 0); - exit(EXIT_FAILURE); - break; - } - break; - case EXCP_DEBUG: - { - int sig; - - sig =3D gdb_handlesig(cs, TARGET_SIGTRAP); - if (sig) - { - info.si_signo =3D sig; - info.si_errno =3D 0; - info.si_code =3D TARGET_TRAP_BRKPT; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - } - } - break; - case EXCP_ATOMIC: - cpu_exec_step_atomic(cs); - break; - default: - printf ("Unhandled trap: 0x%x\n", trapnr); - cpu_dump_state(cs, stderr, fprintf, 0); - exit(EXIT_FAILURE); - } - process_pending_signals (env); - } -} -#endif - #ifdef TARGET_M68K =20 void cpu_loop(CPUM68KState *env) @@ -2169,42 +2050,6 @@ int main(int argc, char **argv, char **envp) env->sr =3D regs->sr; ts->sim_syscalls =3D 1; } -#elif defined(TARGET_MICROBLAZE) - { - env->regs[0] =3D regs->r0; - env->regs[1] =3D regs->r1; - env->regs[2] =3D regs->r2; - env->regs[3] =3D regs->r3; - env->regs[4] =3D regs->r4; - env->regs[5] =3D regs->r5; - env->regs[6] =3D regs->r6; - env->regs[7] =3D regs->r7; - env->regs[8] =3D regs->r8; - env->regs[9] =3D regs->r9; - env->regs[10] =3D regs->r10; - env->regs[11] =3D regs->r11; - env->regs[12] =3D regs->r12; - env->regs[13] =3D regs->r13; - env->regs[14] =3D regs->r14; - env->regs[15] =3D regs->r15; =20 - env->regs[16] =3D regs->r16; =20 - env->regs[17] =3D regs->r17; =20 - env->regs[18] =3D regs->r18; =20 - env->regs[19] =3D regs->r19; =20 - env->regs[20] =3D regs->r20; =20 - env->regs[21] =3D regs->r21; =20 - env->regs[22] =3D regs->r22; =20 - env->regs[23] =3D regs->r23; =20 - env->regs[24] =3D regs->r24; =20 - env->regs[25] =3D regs->r25; =20 - env->regs[26] =3D regs->r26; =20 - env->regs[27] =3D regs->r27; =20 - env->regs[28] =3D regs->r28; =20 - env->regs[29] =3D regs->r29; =20 - env->regs[30] =3D regs->r30; =20 - env->regs[31] =3D regs->r31; =20 - env->sregs[SR_PC] =3D regs->pc; - } #elif defined(TARGET_RISCV) { env->pc =3D regs->sepc; diff --git a/linux-user/microblaze/cpu_loop.c b/linux-user/microblaze/cpu_l= oop.c index b7700a5561..5ffb83dea2 100644 --- a/linux-user/microblaze/cpu_loop.c +++ b/linux-user/microblaze/cpu_loop.c @@ -21,6 +21,156 @@ #include "qemu.h" #include "cpu_loop-common.h" =20 +void cpu_loop(CPUMBState *env) +{ + CPUState *cs =3D CPU(mb_env_get_cpu(env)); + int trapnr, ret; + target_siginfo_t info; + =20 + while (1) { + cpu_exec_start(cs); + trapnr =3D cpu_exec(cs); + cpu_exec_end(cs); + process_queued_cpu_work(cs); + + switch (trapnr) { + case 0xaa: + { + info.si_signo =3D TARGET_SIGSEGV; + info.si_errno =3D 0; + /* XXX: check env->error_code */ + info.si_code =3D TARGET_SEGV_MAPERR; + info._sifields._sigfault._addr =3D 0; + queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); + } + break; + case EXCP_INTERRUPT: + /* just indicate that signals should be handled asap */ + break; + case EXCP_BREAK: + /* Return address is 4 bytes after the call. */ + env->regs[14] +=3D 4; + env->sregs[SR_PC] =3D env->regs[14]; + ret =3D do_syscall(env,=20 + env->regs[12],=20 + env->regs[5],=20 + env->regs[6],=20 + env->regs[7],=20 + env->regs[8],=20 + env->regs[9],=20 + env->regs[10], + 0, 0); + if (ret =3D=3D -TARGET_ERESTARTSYS) { + /* Wind back to before the syscall. */ + env->sregs[SR_PC] -=3D 4; + } else if (ret !=3D -TARGET_QEMU_ESIGRETURN) { + env->regs[3] =3D ret; + } + /* All syscall exits result in guest r14 being equal to the + * PC we return to, because the kernel syscall exit "rtbd" does + * this. (This is true even for sigreturn(); note that r14 is + * not a userspace-usable register, as the kernel may clobber = it + * at any point.) + */ + env->regs[14] =3D env->sregs[SR_PC]; + break; + case EXCP_HW_EXCP: + env->regs[17] =3D env->sregs[SR_PC] + 4; + if (env->iflags & D_FLAG) { + env->sregs[SR_ESR] |=3D 1 << 12; + env->sregs[SR_PC] -=3D 4; + /* FIXME: if branch was immed, replay the imm as well. */ + } + + env->iflags &=3D ~(IMM_FLAG | D_FLAG); + + switch (env->sregs[SR_ESR] & 31) { + case ESR_EC_DIVZERO: + info.si_signo =3D TARGET_SIGFPE; + info.si_errno =3D 0; + info.si_code =3D TARGET_FPE_FLTDIV; + info._sifields._sigfault._addr =3D 0; + queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); + break; + case ESR_EC_FPU: + info.si_signo =3D TARGET_SIGFPE; + info.si_errno =3D 0; + if (env->sregs[SR_FSR] & FSR_IO) { + info.si_code =3D TARGET_FPE_FLTINV; + } + if (env->sregs[SR_FSR] & FSR_DZ) { + info.si_code =3D TARGET_FPE_FLTDIV; + } + info._sifields._sigfault._addr =3D 0; + queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); + break; + default: + printf ("Unhandled hw-exception: 0x%x\n", + env->sregs[SR_ESR] & ESR_EC_MASK); + cpu_dump_state(cs, stderr, fprintf, 0); + exit(EXIT_FAILURE); + break; + } + break; + case EXCP_DEBUG: + { + int sig; + + sig =3D gdb_handlesig(cs, TARGET_SIGTRAP); + if (sig) + { + info.si_signo =3D sig; + info.si_errno =3D 0; + info.si_code =3D TARGET_TRAP_BRKPT; + queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); + } + } + break; + case EXCP_ATOMIC: + cpu_exec_step_atomic(cs); + break; + default: + printf ("Unhandled trap: 0x%x\n", trapnr); + cpu_dump_state(cs, stderr, fprintf, 0); + exit(EXIT_FAILURE); + } + process_pending_signals (env); + } +} + void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) { + env->regs[0] =3D regs->r0; + env->regs[1] =3D regs->r1; + env->regs[2] =3D regs->r2; + env->regs[3] =3D regs->r3; + env->regs[4] =3D regs->r4; + env->regs[5] =3D regs->r5; + env->regs[6] =3D regs->r6; + env->regs[7] =3D regs->r7; + env->regs[8] =3D regs->r8; + env->regs[9] =3D regs->r9; + env->regs[10] =3D regs->r10; + env->regs[11] =3D regs->r11; + env->regs[12] =3D regs->r12; + env->regs[13] =3D regs->r13; + env->regs[14] =3D regs->r14; + env->regs[15] =3D regs->r15; + env->regs[16] =3D regs->r16; + env->regs[17] =3D regs->r17; + env->regs[18] =3D regs->r18; + env->regs[19] =3D regs->r19; + env->regs[20] =3D regs->r20; + env->regs[21] =3D regs->r21; + env->regs[22] =3D regs->r22; + env->regs[23] =3D regs->r23; + env->regs[24] =3D regs->r24; + env->regs[25] =3D regs->r25; + env->regs[26] =3D regs->r26; + env->regs[27] =3D regs->r27; + env->regs[28] =3D regs->r28; + env->regs[29] =3D regs->r29; + env->regs[30] =3D regs->r30; + env->regs[31] =3D regs->r31; + env->sregs[SR_PC] =3D regs->pc; } --=20 2.14.3