From nobody Wed Oct 29 09:31:24 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1524823729535171.6486859002016; Fri, 27 Apr 2018 03:08:49 -0700 (PDT) Received: from localhost ([::1]:46960 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fC0J6-0005CX-5x for importer@patchew.org; Fri, 27 Apr 2018 06:08:48 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60174) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fBzb7-0002m5-OY for qemu-devel@nongnu.org; Fri, 27 Apr 2018 05:23:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fBzb5-0002X8-U1 for qemu-devel@nongnu.org; Fri, 27 Apr 2018 05:23:21 -0400 Received: from ozlabs.org ([203.11.71.1]:34555) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fBzb5-0002WU-83; Fri, 27 Apr 2018 05:23:19 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 40XT2w1JqVz9sY2; Fri, 27 Apr 2018 19:21:42 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1524820904; bh=Q59wpOeHr+9O3oqnHmBeBgiIsq7HSLuij3KJxJ5kxKU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=G5c+ydp99AFP+NdM1zH8OG/NeRIBCtAlGoROmo3Tz7xQInIUEPX5VHs8LeB3yGre3 FOyiZrfrzNInvtAB0h7CYh0u4n1j0zz2iMdRheOWN4U68N05Iq9ZUwD9s7lSWUEfXN 3lD3YTX7R/AJhTc6TiaKJp59ZoQDgMxF4IXghAs0= From: David Gibson To: peter.maydell@linaro.org Date: Fri, 27 Apr 2018 19:21:23 +1000 Message-Id: <20180427092126.24812-47-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180427092126.24812-1-david@gibson.dropbear.id.au> References: <20180427092126.24812-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PULL 46/49] spapr: Support ibm, dynamic-memory-v2 property X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bharata B Rao , qemu-ppc@nongnu.org, groug@kaod.org, David Gibson , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Bharata B Rao The new property ibm,dynamic-memory-v2 allows memory to be represented in a more compact manner in device tree. Signed-off-by: Bharata B Rao Signed-off-by: David Gibson --- docs/specs/ppc-spapr-hotplug.txt | 19 ++++ hw/ppc/spapr.c | 230 +++++++++++++++++++++++++++++++----= ---- include/hw/ppc/spapr_ovec.h | 1 + 3 files changed, 202 insertions(+), 48 deletions(-) diff --git a/docs/specs/ppc-spapr-hotplug.txt b/docs/specs/ppc-spapr-hotplu= g.txt index f57e2a09c6..cc7833108e 100644 --- a/docs/specs/ppc-spapr-hotplug.txt +++ b/docs/specs/ppc-spapr-hotplug.txt @@ -387,4 +387,23 @@ Each LMB list entry consists of the following elements: - A 32bit flags word. The bit at bit position 0x00000008 defines whether the LMB is assigned to the the partition as of boot time. =20 +ibm,dynamic-memory-v2 + +This property describes the dynamically reconfigurable memory. This is +an alternate and newer way to describe dyanamically reconfigurable memory. +It is a property encoded array that has an integer N (the number of +LMB set entries) followed by N LMB set entries. There is an LMB set entry +for each sequential group of LMBs that share common attributes. + +Each LMB set entry consists of the following elements: + +- Number of sequential LMBs in the entry represented by a 32bit integer. +- Logical address of the first LMB in the set encoded as a 64bit integer. +- DRC index of the first LMB in the set. +- Associativity list index that is used as an index into + ibm,associativity-lookup-arrays property described earlier. This + is used to retrieve the right associativity list to be used for all + the LMBs in this set. +- A 32bit flags word that applies to all the LMBs in the set. + [1] http://thread.gmane.org/gmane.linux.ports.ppc.embedded/75350/focus=3D1= 06867 diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 2203b6f46d..b35aff5d81 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -668,63 +668,137 @@ static uint32_t spapr_pc_dimm_node(MemoryDeviceInfoL= ist *list, ram_addr_t addr) return -1; } =20 -/* - * Adds ibm,dynamic-reconfiguration-memory node. - * Refer to docs/specs/ppc-spapr-hotplug.txt for the documentation - * of this device tree node. - */ -static int spapr_populate_drconf_memory(sPAPRMachineState *spapr, void *fd= t) +struct sPAPRDrconfCellV2 { + uint32_t seq_lmbs; + uint64_t base_addr; + uint32_t drc_index; + uint32_t aa_index; + uint32_t flags; +} QEMU_PACKED; + +typedef struct DrconfCellQueue { + struct sPAPRDrconfCellV2 cell; + QSIMPLEQ_ENTRY(DrconfCellQueue) entry; +} DrconfCellQueue; + +static DrconfCellQueue * +spapr_get_drconf_cell(uint32_t seq_lmbs, uint64_t base_addr, + uint32_t drc_index, uint32_t aa_index, + uint32_t flags) { - MachineState *machine =3D MACHINE(spapr); - int ret, i, offset; - uint64_t lmb_size =3D SPAPR_MEMORY_BLOCK_SIZE; - uint32_t prop_lmb_size[] =3D {0, cpu_to_be32(lmb_size)}; - uint32_t hotplug_lmb_start =3D spapr->hotplug_memory.base / lmb_size; - uint32_t nr_lmbs =3D (spapr->hotplug_memory.base + - memory_region_size(&spapr->hotplug_memory.mr)) / - lmb_size; - uint32_t *int_buf, *cur_index, buf_len; - int nr_nodes =3D nb_numa_nodes ? nb_numa_nodes : 1; - MemoryDeviceInfoList *dimms =3D NULL; + DrconfCellQueue *elem; =20 - /* - * Don't create the node if there is no hotpluggable memory - */ - if (machine->ram_size =3D=3D machine->maxram_size) { - return 0; - } + elem =3D g_malloc0(sizeof(*elem)); + elem->cell.seq_lmbs =3D cpu_to_be32(seq_lmbs); + elem->cell.base_addr =3D cpu_to_be64(base_addr); + elem->cell.drc_index =3D cpu_to_be32(drc_index); + elem->cell.aa_index =3D cpu_to_be32(aa_index); + elem->cell.flags =3D cpu_to_be32(flags); =20 - /* - * Allocate enough buffer size to fit in ibm,dynamic-memory - * or ibm,associativity-lookup-arrays - */ - buf_len =3D MAX(nr_lmbs * SPAPR_DR_LMB_LIST_ENTRY_SIZE + 1, nr_nodes *= 4 + 2) - * sizeof(uint32_t); - cur_index =3D int_buf =3D g_malloc0(buf_len); + return elem; +} =20 - offset =3D fdt_add_subnode(fdt, 0, "ibm,dynamic-reconfiguration-memory= "); +/* ibm,dynamic-memory-v2 */ +static int spapr_populate_drmem_v2(sPAPRMachineState *spapr, void *fdt, + int offset, MemoryDeviceInfoList *dimms) +{ + uint8_t *int_buf, *cur_index, buf_len; + int ret; + uint64_t lmb_size =3D SPAPR_MEMORY_BLOCK_SIZE; + uint64_t addr, cur_addr, size; + uint32_t nr_boot_lmbs =3D (spapr->hotplug_memory.base / lmb_size); + uint64_t mem_end =3D spapr->hotplug_memory.base + + memory_region_size(&spapr->hotplug_memory.mr); + uint32_t node, nr_entries =3D 0; + sPAPRDRConnector *drc; + DrconfCellQueue *elem, *next; + MemoryDeviceInfoList *info; + QSIMPLEQ_HEAD(, DrconfCellQueue) drconf_queue + =3D QSIMPLEQ_HEAD_INITIALIZER(drconf_queue); + + /* Entry to cover RAM and the gap area */ + elem =3D spapr_get_drconf_cell(nr_boot_lmbs, 0, 0, -1, + SPAPR_LMB_FLAGS_RESERVED | + SPAPR_LMB_FLAGS_DRC_INVALID); + QSIMPLEQ_INSERT_TAIL(&drconf_queue, elem, entry); + nr_entries++; + + cur_addr =3D spapr->hotplug_memory.base; + for (info =3D dimms; info; info =3D info->next) { + PCDIMMDeviceInfo *di =3D info->value->u.dimm.data; + + addr =3D di->addr; + size =3D di->size; + node =3D di->node; + + /* Entry for hot-pluggable area */ + if (cur_addr < addr) { + drc =3D spapr_drc_by_id(TYPE_SPAPR_DRC_LMB, cur_addr / lmb_siz= e); + g_assert(drc); + elem =3D spapr_get_drconf_cell((addr - cur_addr) / lmb_size, + cur_addr, spapr_drc_index(drc), -= 1, 0); + QSIMPLEQ_INSERT_TAIL(&drconf_queue, elem, entry); + nr_entries++; + } =20 - ret =3D fdt_setprop(fdt, offset, "ibm,lmb-size", prop_lmb_size, - sizeof(prop_lmb_size)); - if (ret < 0) { - goto out; + /* Entry for DIMM */ + drc =3D spapr_drc_by_id(TYPE_SPAPR_DRC_LMB, addr / lmb_size); + g_assert(drc); + elem =3D spapr_get_drconf_cell(size / lmb_size, addr, + spapr_drc_index(drc), node, + SPAPR_LMB_FLAGS_ASSIGNED); + QSIMPLEQ_INSERT_TAIL(&drconf_queue, elem, entry); + nr_entries++; + cur_addr =3D addr + size; } =20 - ret =3D fdt_setprop_cell(fdt, offset, "ibm,memory-flags-mask", 0xff); - if (ret < 0) { - goto out; + /* Entry for remaining hotpluggable area */ + if (cur_addr < mem_end) { + drc =3D spapr_drc_by_id(TYPE_SPAPR_DRC_LMB, cur_addr / lmb_size); + g_assert(drc); + elem =3D spapr_get_drconf_cell((mem_end - cur_addr) / lmb_size, + cur_addr, spapr_drc_index(drc), -1, 0= ); + QSIMPLEQ_INSERT_TAIL(&drconf_queue, elem, entry); + nr_entries++; } =20 - ret =3D fdt_setprop_cell(fdt, offset, "ibm,memory-preservation-time", = 0x0); - if (ret < 0) { - goto out; + buf_len =3D nr_entries * sizeof(struct sPAPRDrconfCellV2) + sizeof(uin= t32_t); + int_buf =3D cur_index =3D g_malloc0(buf_len); + *(uint32_t *)int_buf =3D cpu_to_be32(nr_entries); + cur_index +=3D sizeof(nr_entries); + + QSIMPLEQ_FOREACH_SAFE(elem, &drconf_queue, entry, next) { + memcpy(cur_index, &elem->cell, sizeof(elem->cell)); + cur_index +=3D sizeof(elem->cell); + QSIMPLEQ_REMOVE(&drconf_queue, elem, DrconfCellQueue, entry); + g_free(elem); } =20 - if (hotplug_lmb_start) { - dimms =3D qmp_pc_dimm_device_list(); + ret =3D fdt_setprop(fdt, offset, "ibm,dynamic-memory-v2", int_buf, buf= _len); + g_free(int_buf); + if (ret < 0) { + return -1; } + return 0; +} + +/* ibm,dynamic-memory */ +static int spapr_populate_drmem_v1(sPAPRMachineState *spapr, void *fdt, + int offset, MemoryDeviceInfoList *dimms) +{ + int i, ret; + uint64_t lmb_size =3D SPAPR_MEMORY_BLOCK_SIZE; + uint32_t hotplug_lmb_start =3D spapr->hotplug_memory.base / lmb_size; + uint32_t nr_lmbs =3D (spapr->hotplug_memory.base + + memory_region_size(&spapr->hotplug_memory.mr)) / + lmb_size; + uint32_t *int_buf, *cur_index, buf_len; =20 - /* ibm,dynamic-memory */ + /* + * Allocate enough buffer size to fit in ibm,dynamic-memory + */ + buf_len =3D (nr_lmbs * SPAPR_DR_LMB_LIST_ENTRY_SIZE + 1) * sizeof(uint= 32_t); + cur_index =3D int_buf =3D g_malloc0(buf_len); int_buf[0] =3D cpu_to_be32(nr_lmbs); cur_index++; for (i =3D 0; i < nr_lmbs; i++) { @@ -764,13 +838,71 @@ static int spapr_populate_drconf_memory(sPAPRMachineS= tate *spapr, void *fdt) =20 cur_index +=3D SPAPR_DR_LMB_LIST_ENTRY_SIZE; } - qapi_free_MemoryDeviceInfoList(dimms); ret =3D fdt_setprop(fdt, offset, "ibm,dynamic-memory", int_buf, buf_le= n); + g_free(int_buf); if (ret < 0) { - goto out; + return -1; + } + return 0; +} + +/* + * Adds ibm,dynamic-reconfiguration-memory node. + * Refer to docs/specs/ppc-spapr-hotplug.txt for the documentation + * of this device tree node. + */ +static int spapr_populate_drconf_memory(sPAPRMachineState *spapr, void *fd= t) +{ + MachineState *machine =3D MACHINE(spapr); + int ret, i, offset; + uint64_t lmb_size =3D SPAPR_MEMORY_BLOCK_SIZE; + uint32_t prop_lmb_size[] =3D {0, cpu_to_be32(lmb_size)}; + uint32_t *int_buf, *cur_index, buf_len; + int nr_nodes =3D nb_numa_nodes ? nb_numa_nodes : 1; + MemoryDeviceInfoList *dimms =3D NULL; + + /* + * Don't create the node if there is no hotpluggable memory + */ + if (machine->ram_size =3D=3D machine->maxram_size) { + return 0; + } + + offset =3D fdt_add_subnode(fdt, 0, "ibm,dynamic-reconfiguration-memory= "); + + ret =3D fdt_setprop(fdt, offset, "ibm,lmb-size", prop_lmb_size, + sizeof(prop_lmb_size)); + if (ret < 0) { + return ret; + } + + ret =3D fdt_setprop_cell(fdt, offset, "ibm,memory-flags-mask", 0xff); + if (ret < 0) { + return ret; + } + + ret =3D fdt_setprop_cell(fdt, offset, "ibm,memory-preservation-time", = 0x0); + if (ret < 0) { + return ret; + } + + /* ibm,dynamic-memory or ibm,dynamic-memory-v2 */ + dimms =3D qmp_pc_dimm_device_list(); + if (spapr_ovec_test(spapr->ov5_cas, OV5_DRMEM_V2)) { + ret =3D spapr_populate_drmem_v2(spapr, fdt, offset, dimms); + } else { + ret =3D spapr_populate_drmem_v1(spapr, fdt, offset, dimms); + } + qapi_free_MemoryDeviceInfoList(dimms); + + if (ret < 0) { + return ret; } =20 /* ibm,associativity-lookup-arrays */ + buf_len =3D (nr_nodes * 4 + 2) * sizeof(uint32_t); + cur_index =3D int_buf =3D g_malloc0(buf_len); + cur_index =3D int_buf; int_buf[0] =3D cpu_to_be32(nr_nodes); int_buf[1] =3D cpu_to_be32(4); /* Number of entries per associativity = list */ @@ -787,8 +919,8 @@ static int spapr_populate_drconf_memory(sPAPRMachineSta= te *spapr, void *fdt) } ret =3D fdt_setprop(fdt, offset, "ibm,associativity-lookup-arrays", in= t_buf, (cur_index - int_buf) * sizeof(uint32_t)); -out: g_free(int_buf); + return ret; } =20 @@ -2491,6 +2623,9 @@ static void spapr_machine_init(MachineState *machine) spapr_ovec_set(spapr->ov5, OV5_HPT_RESIZE); } =20 + /* advertise support for ibm,dyamic-memory-v2 */ + spapr_ovec_set(spapr->ov5, OV5_DRMEM_V2); + /* init CPUs */ spapr_init_cpus(spapr); =20 @@ -2918,7 +3053,6 @@ static void spapr_instance_init(Object *obj) " place of standard EPOW events when p= ossible" " (required for memory hot-unplug supp= ort)", NULL); - ppc_compat_add_property(obj, "max-cpu-compat", &spapr->max_compat_pvr, "Maximum permitted CPU compatibility mode", &error_fatal); diff --git a/include/hw/ppc/spapr_ovec.h b/include/hw/ppc/spapr_ovec.h index bf25e5d954..0f2d8d715d 100644 --- a/include/hw/ppc/spapr_ovec.h +++ b/include/hw/ppc/spapr_ovec.h @@ -51,6 +51,7 @@ typedef struct sPAPROptionVector sPAPROptionVector; #define OV5_FORM1_AFFINITY OV_BIT(5, 0) #define OV5_HP_EVT OV_BIT(6, 5) #define OV5_HPT_RESIZE OV_BIT(6, 7) +#define OV5_DRMEM_V2 OV_BIT(22, 0) #define OV5_XIVE_BOTH OV_BIT(23, 0) #define OV5_XIVE_EXPLOIT OV_BIT(23, 1) /* 1=3Dexploitation 0=3Dlega= cy */ =20 --=20 2.14.3