From nobody Wed Oct 29 17:31:57 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1524823532019949.7363621008975; Fri, 27 Apr 2018 03:05:32 -0700 (PDT) Received: from localhost ([::1]:46939 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fC0Fj-0007cs-MR for importer@patchew.org; Fri, 27 Apr 2018 06:05:19 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60136) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fBzb5-0002jO-2E for qemu-devel@nongnu.org; Fri, 27 Apr 2018 05:23:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fBzb1-0002W0-Ur for qemu-devel@nongnu.org; Fri, 27 Apr 2018 05:23:19 -0400 Received: from ozlabs.org ([203.11.71.1]:36139) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fBzb1-0002VK-AJ; Fri, 27 Apr 2018 05:23:15 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 40XT2v4p9qz9s7f; Fri, 27 Apr 2018 19:21:39 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1524820903; bh=xhDy7aonv/WG8FC2brwH1sg9nw3vR0bAPDSNVzL52xQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fnR2xbFUvWfGEFi5ml19R/gvg29sPeHrb5M5UsLpDV8rvZcCv4NM1claS6Jrc0q/x 5tujhkl5B2dkoQfg4Q8LlQwn97te85P7Wceh9DaD4seG+h7sCQ5N0ilWvK5gXlKcIF rv/yTkwcloJq5I4FQDDaDmH4AGdqHmpECCn3GG7c= From: David Gibson To: peter.maydell@linaro.org Date: Fri, 27 Apr 2018 19:21:13 +1000 Message-Id: <20180427092126.24812-37-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180427092126.24812-1-david@gibson.dropbear.id.au> References: <20180427092126.24812-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PULL 36/49] target/ppc: Move page size setup to helper function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-ppc@nongnu.org, groug@kaod.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Initialization of the env->sps structure at the end of instance_init is specific to the 64-bit hash MMU, so move the code into a helper function in mmu-hash64.c. We also create a corresponding function to be called at finalize time - it's empty for now, but we'll need it shortly. Signed-off-by: David Gibson Reviewed-by: C=C3=A9dric Le Goater Reviewed-by: Greg Kurz --- target/ppc/mmu-hash64.c | 29 +++++++++++++++++++++++++++++ target/ppc/mmu-hash64.h | 11 +++++++++++ target/ppc/translate_init.c | 29 +++++++++-------------------- 3 files changed, 49 insertions(+), 20 deletions(-) diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index a87fa7c83f..4cb7d1cf07 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -1095,3 +1095,32 @@ void helper_store_lpcr(CPUPPCState *env, target_ulon= g val) ppc_hash64_update_rmls(cpu); ppc_hash64_update_vrma(cpu); } + +void ppc_hash64_init(PowerPCCPU *cpu) +{ + CPUPPCState *env =3D &cpu->env; + PowerPCCPUClass *pcc =3D POWERPC_CPU_GET_CLASS(cpu); + + if (pcc->sps) { + env->sps =3D *pcc->sps; + } else if (env->mmu_model & POWERPC_MMU_64) { + /* Use default sets of page sizes. We don't support MPSS */ + static const struct ppc_segment_page_sizes defsps =3D { + .sps =3D { + { .page_shift =3D 12, /* 4K */ + .slb_enc =3D 0, + .enc =3D { { .page_shift =3D 12, .pte_enc =3D 0 } } + }, + { .page_shift =3D 24, /* 16M */ + .slb_enc =3D 0x100, + .enc =3D { { .page_shift =3D 24, .pte_enc =3D 0 } } + }, + }, + }; + env->sps =3D defsps; + } +} + +void ppc_hash64_finalize(PowerPCCPU *cpu) +{ +} diff --git a/target/ppc/mmu-hash64.h b/target/ppc/mmu-hash64.h index 95a8c330d6..074ded4c27 100644 --- a/target/ppc/mmu-hash64.h +++ b/target/ppc/mmu-hash64.h @@ -19,6 +19,8 @@ unsigned ppc_hash64_hpte_page_shift_noslb(PowerPCCPU *cpu, uint64_t pte0, uint64_t pte1); void ppc_hash64_update_vrma(PowerPCCPU *cpu); void ppc_hash64_update_rmls(PowerPCCPU *cpu); +void ppc_hash64_init(PowerPCCPU *cpu); +void ppc_hash64_finalize(PowerPCCPU *cpu); #endif =20 /* @@ -136,4 +138,13 @@ static inline uint64_t ppc_hash64_hpte1(PowerPCCPU *cp= u, =20 #endif /* CONFIG_USER_ONLY */ =20 +#if defined(CONFIG_USER_ONLY) || !defined(TARGET_PPC64) +static inline void ppc_hash64_init(PowerPCCPU *cpu) +{ +} +static inline void ppc_hash64_finalize(PowerPCCPU *cpu) +{ +} +#endif + #endif /* MMU_HASH64_H */ diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 99be6fcd68..aa63a5dcb3 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -10464,26 +10464,14 @@ static void ppc_cpu_instance_init(Object *obj) env->has_hv_mode =3D !!(env->msr_mask & MSR_HVB); #endif =20 -#if defined(TARGET_PPC64) - if (pcc->sps) { - env->sps =3D *pcc->sps; - } else if (env->mmu_model & POWERPC_MMU_64) { - /* Use default sets of page sizes. We don't support MPSS */ - static const struct ppc_segment_page_sizes defsps =3D { - .sps =3D { - { .page_shift =3D 12, /* 4K */ - .slb_enc =3D 0, - .enc =3D { { .page_shift =3D 12, .pte_enc =3D 0 } } - }, - { .page_shift =3D 24, /* 16M */ - .slb_enc =3D 0x100, - .enc =3D { { .page_shift =3D 24, .pte_enc =3D 0 } } - }, - }, - }; - env->sps =3D defsps; - } -#endif /* defined(TARGET_PPC64) */ + ppc_hash64_init(cpu); +} + +static void ppc_cpu_instance_finalize(Object *obj) +{ + PowerPCCPU *cpu =3D POWERPC_CPU(obj); + + ppc_hash64_finalize(cpu); } =20 static bool ppc_pvr_match_default(PowerPCCPUClass *pcc, uint32_t pvr) @@ -10601,6 +10589,7 @@ static const TypeInfo ppc_cpu_type_info =3D { .parent =3D TYPE_CPU, .instance_size =3D sizeof(PowerPCCPU), .instance_init =3D ppc_cpu_instance_init, + .instance_finalize =3D ppc_cpu_instance_finalize, .abstract =3D true, .class_size =3D sizeof(PowerPCCPUClass), .class_init =3D ppc_cpu_class_init, --=20 2.14.3