From nobody Wed Oct 29 17:31:56 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 15248233989994.7450456081624; Fri, 27 Apr 2018 03:03:18 -0700 (PDT) Received: from localhost ([::1]:46925 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fC0Da-0005fZ-1t for importer@patchew.org; Fri, 27 Apr 2018 06:03:06 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60120) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fBzb1-0002gK-Q6 for qemu-devel@nongnu.org; Fri, 27 Apr 2018 05:23:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fBzb0-0002VY-KY for qemu-devel@nongnu.org; Fri, 27 Apr 2018 05:23:15 -0400 Received: from ozlabs.org ([203.11.71.1]:37317) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fBzaz-0002V7-Vd; Fri, 27 Apr 2018 05:23:14 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 40XT2v2yXkz9sXs; Fri, 27 Apr 2018 19:21:39 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1524820903; bh=PAKnVOXccDdb32pgswlh2cxkzg7FYaTkY/j6EB9JSEs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ESNwwOUOwPBCLXDyBBjgGKBujYptqqWQjTbhtkHtNdS/doI5EY2vz90Jx89H6adUk yRUP/5LCIg0SxAB/m0/375Xh7/s4ewLzv0pEMhfTgxmwBM/o7QqVMc143IWdKE2MXc cnkuhx+lnKCuuuL9/DsGo92SMuU8hqR1hqQZf2xs= From: David Gibson To: peter.maydell@linaro.org Date: Fri, 27 Apr 2018 19:21:12 +1000 Message-Id: <20180427092126.24812-36-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180427092126.24812-1-david@gibson.dropbear.id.au> References: <20180427092126.24812-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PULL 35/49] target/ppc: Remove fallback 64k pagesize information X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-ppc@nongnu.org, groug@kaod.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" CPU definitions for cpus with the 64-bit hash MMU can include a table of available pagesizes. If this isn't supplied ppc_cpu_instance_init() will fill it in a fallback table based on the POWERPC_MMU_64K bit in mmu_model. However, it turns out all the cpus which support 64K pages already include an explicit table of page sizes, so there's no point to the fallback table including 64k pages. That removes the only place which tests POWERPC_MMU_64K, so we can remove it. Which in turn allows some logic to be removed from kvm_fixup_page_sizes(). Signed-off-by: David Gibson Reviewed-by: C=C3=A9dric Le Goater Reviewed-by: Greg Kurz --- target/ppc/cpu-qom.h | 4 ---- target/ppc/kvm.c | 7 ------- target/ppc/translate_init.c | 20 ++------------------ 3 files changed, 2 insertions(+), 29 deletions(-) diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h index deaa46a14b..9bbb05cf62 100644 --- a/target/ppc/cpu-qom.h +++ b/target/ppc/cpu-qom.h @@ -70,7 +70,6 @@ enum powerpc_mmu_t { #define POWERPC_MMU_64 0x00010000 #define POWERPC_MMU_1TSEG 0x00020000 #define POWERPC_MMU_AMR 0x00040000 -#define POWERPC_MMU_64K 0x00080000 #define POWERPC_MMU_V3 0x00100000 /* ISA V3.00 MMU Support */ /* 64 bits PowerPC MMU */ POWERPC_MMU_64B =3D POWERPC_MMU_64 | 0x00000001, @@ -78,15 +77,12 @@ enum powerpc_mmu_t { POWERPC_MMU_2_03 =3D POWERPC_MMU_64 | 0x00000002, /* Architecture 2.06 variant */ POWERPC_MMU_2_06 =3D POWERPC_MMU_64 | POWERPC_MMU_1TSEG - | POWERPC_MMU_64K | POWERPC_MMU_AMR | 0x00000003, /* Architecture 2.07 variant */ POWERPC_MMU_2_07 =3D POWERPC_MMU_64 | POWERPC_MMU_1TSEG - | POWERPC_MMU_64K | POWERPC_MMU_AMR | 0x00000004, /* Architecture 3.00 variant */ POWERPC_MMU_3_00 =3D POWERPC_MMU_64 | POWERPC_MMU_1TSEG - | POWERPC_MMU_64K | POWERPC_MMU_AMR | POWERPC_MMU_V3 | 0x00000005, }; diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index f62f7ac288..660467aec6 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -425,7 +425,6 @@ static void kvm_fixup_page_sizes(PowerPCCPU *cpu) static bool has_smmu_info; CPUPPCState *env =3D &cpu->env; int iq, ik, jq, jk; - bool has_64k_pages =3D false; =20 /* We only handle page sizes for 64-bit server guests for now */ if (!(env->mmu_model & POWERPC_MMU_64)) { @@ -471,9 +470,6 @@ static void kvm_fixup_page_sizes(PowerPCCPU *cpu) ksps->enc[jk].page_shift)) { continue; } - if (ksps->enc[jk].page_shift =3D=3D 16) { - has_64k_pages =3D true; - } qsps->enc[jq].page_shift =3D ksps->enc[jk].page_shift; qsps->enc[jq].pte_enc =3D ksps->enc[jk].pte_enc; if (++jq >=3D PPC_PAGE_SIZES_MAX_SZ) { @@ -488,9 +484,6 @@ static void kvm_fixup_page_sizes(PowerPCCPU *cpu) if (!(smmu_info.flags & KVM_PPC_1T_SEGMENTS)) { env->mmu_model &=3D ~POWERPC_MMU_1TSEG; } - if (!has_64k_pages) { - env->mmu_model &=3D ~POWERPC_MMU_64K; - } } =20 bool kvmppc_is_mem_backend_page_size_ok(const char *obj_path) diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 29bd6f3654..99be6fcd68 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -10469,7 +10469,7 @@ static void ppc_cpu_instance_init(Object *obj) env->sps =3D *pcc->sps; } else if (env->mmu_model & POWERPC_MMU_64) { /* Use default sets of page sizes. We don't support MPSS */ - static const struct ppc_segment_page_sizes defsps_4k =3D { + static const struct ppc_segment_page_sizes defsps =3D { .sps =3D { { .page_shift =3D 12, /* 4K */ .slb_enc =3D 0, @@ -10481,23 +10481,7 @@ static void ppc_cpu_instance_init(Object *obj) }, }, }; - static const struct ppc_segment_page_sizes defsps_64k =3D { - .sps =3D { - { .page_shift =3D 12, /* 4K */ - .slb_enc =3D 0, - .enc =3D { { .page_shift =3D 12, .pte_enc =3D 0 } } - }, - { .page_shift =3D 16, /* 64K */ - .slb_enc =3D 0x110, - .enc =3D { { .page_shift =3D 16, .pte_enc =3D 1 } } - }, - { .page_shift =3D 24, /* 16M */ - .slb_enc =3D 0x100, - .enc =3D { { .page_shift =3D 24, .pte_enc =3D 0 } } - }, - }, - }; - env->sps =3D (env->mmu_model & POWERPC_MMU_64K) ? defsps_64k : def= sps_4k; + env->sps =3D defsps; } #endif /* defined(TARGET_PPC64) */ } --=20 2.14.3