From nobody Tue Feb 10 12:39:38 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1524119493599518.6577197358765; Wed, 18 Apr 2018 23:31:33 -0700 (PDT) Received: from localhost ([::1]:53047 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f936S-0006uN-O2 for importer@patchew.org; Thu, 19 Apr 2018 02:31:32 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60523) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f934P-0005Wq-1v for qemu-devel@nongnu.org; Thu, 19 Apr 2018 02:29:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1f934O-0005Qm-9Q for qemu-devel@nongnu.org; Thu, 19 Apr 2018 02:29:25 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:55335) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1f934N-0005Oj-Mu; Thu, 19 Apr 2018 02:29:24 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 40RTbj1WDGz9s27; Thu, 19 Apr 2018 16:29:21 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1524119361; bh=yStT8YRU+SLEwsBsKAo4UEzFUGxG32PeG6I3gORZrxU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UxnuGsGkyYxxX9RWr+eQ07UXl/y0Nr6FWpIvcPDs6NqxEErdwOdUaEAwdODOBHwPL HM8HjXzbuEfVzrD7RL6C+6d299pBBP60kFa4oceqvb4WC2X5tsAvCfxxLi3hKdWuJN wi+DeY/wl5s9eEiKPXGCjvg51Ucx8yQ94MKvDyvU= From: David Gibson To: groug@kaod.org, abologna@redhat.com Date: Thu, 19 Apr 2018 16:29:13 +1000 Message-Id: <20180419062917.31486-4-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180419062917.31486-1-david@gibson.dropbear.id.au> References: <20180419062917.31486-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [RFC for-2.13 3/7] target/ppc: Add ppc_hash64_filter_pagesizes() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aik@ozlabs.ru, David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, clg@kaod.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The paravirtualized PAPR platform sometimes needs to restrict the guest to using only some of the page sizes actually supported by the host's MMU. At the moment this is handled in KVM specific code, but for consistency we want to apply the same limitations to all accelerators. This makes a start on this by providing a helper function in the cpu code to allow platform code to remove some of the cpu's page size definitions via a caller supplied callback. Signed-off-by: David Gibson --- target/ppc/mmu-hash64.c | 59 +++++++++++++++++++++++++++++++++++++++++++++= ++++ target/ppc/mmu-hash64.h | 3 +++ 2 files changed, 62 insertions(+) diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index a1db20e3a8..b6e62864fd 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -1165,3 +1165,62 @@ const PPCHash64Options ppc_hash64_opts_POWER7 =3D { }, } }; + +void ppc_hash64_filter_pagesizes(PowerPCCPU *cpu, + bool (*cb)(void *, uint32_t, uint32_t), + void *opaque) +{ + PPCHash64Options *opts =3D cpu->hash64_opts; + int i; + int n =3D 0; + bool ci_largepage =3D false; + + assert(opts); + + n =3D 0; + for (i =3D 0; i < ARRAY_SIZE(opts->sps); i++) { + PPCHash64SegmentPageSizes *sps =3D &opts->sps[i]; + int j; + int m =3D 0; + + assert(n <=3D i); + + if (!sps->page_shift) { + break; + } + + for (j =3D 0; j < ARRAY_SIZE(sps->enc); j++) { + PPCHash64PageSize *ps =3D &sps->enc[j]; + + assert(m <=3D j); + if (!ps->page_shift) { + break; + } + + if (cb(opaque, sps->page_shift, ps->page_shift)) { + if (ps->page_shift =3D=3D 16) { + ci_largepage =3D true; + } + sps->enc[m++] =3D *ps; + } + } + + /* Clear rest of the row */ + for (j =3D m; j < ARRAY_SIZE(sps->enc); j++) { + memset(&sps->enc[j], 0, sizeof(sps->enc[j])); + } + + if (m) { + n++; + } + } + + /* Clear the rest of the table */ + for (i =3D n; i < ARRAY_SIZE(opts->sps); i++) { + memset(&opts->sps[i], 0, sizeof(opts->sps[i])); + } + + if (!ci_largepage) { + opts->flags &=3D ~PPC_HASH64_CI_LARGEPAGE; + } +} diff --git a/target/ppc/mmu-hash64.h b/target/ppc/mmu-hash64.h index f23b78d787..1aa2453497 100644 --- a/target/ppc/mmu-hash64.h +++ b/target/ppc/mmu-hash64.h @@ -20,6 +20,9 @@ unsigned ppc_hash64_hpte_page_shift_noslb(PowerPCCPU *cpu, void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val); void ppc_hash64_init(PowerPCCPU *cpu); void ppc_hash64_finalize(PowerPCCPU *cpu); +void ppc_hash64_filter_pagesizes(PowerPCCPU *cpu, + bool (*cb)(void *, uint32_t, uint32_t), + void *opaque); #endif =20 /* --=20 2.14.3