From nobody Tue Oct 28 01:57:57 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1522125935198486.4375759093517; Mon, 26 Mar 2018 21:45:35 -0700 (PDT) Received: from localhost ([::1]:60334 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f0gUB-0000Y7-Dl for importer@patchew.org; Tue, 27 Mar 2018 00:45:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50746) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f0gNC-0001zs-0c for qemu-devel@nongnu.org; Tue, 27 Mar 2018 00:38:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1f0gNA-0002qi-AX for qemu-devel@nongnu.org; Tue, 27 Mar 2018 00:38:14 -0400 Received: from ozlabs.org ([103.22.144.67]:51097) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1f0gN9-0002ki-Uh; Tue, 27 Mar 2018 00:38:12 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 409JCn0pdKz9s1q; Tue, 27 Mar 2018 15:37:54 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1522125477; bh=w9dshTepnE6d+WZbnwOD8qMbqJKlza7hwn/hG44rhHE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mGNZoH9ZPSj4KAKAJgfVYrLc1xcKVshtzN5HBK49Abtzp2cwhgq7PF/4FgHEoMd75 v7ZfxqkCnmJDLT/TsFKukf7GGqkQz7kPtGFU4t1vGr9xECaAXc1CU+WKFkyqkhgc7D Cu7HpF6y9w0IEgIAUhELasXFu8StVYd1wXQmboMg= From: David Gibson To: qemu-ppc@nongnu.org, groug@kaod.org Date: Tue, 27 Mar 2018 15:37:37 +1100 Message-Id: <20180327043741.7705-9-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180327043741.7705-1-david@gibson.dropbear.id.au> References: <20180327043741.7705-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [RFC for-2.13 08/12] target/ppc: Make hash64_opts field mandatory for 64-bit hash MMUs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: agraf@suse.de, qemu-devel@nongnu.org, clg@kaod.org, bharata@linux.vnet.ibm.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Currently some cpus set the hash64_opts field in the class structure, with specific details of their variant of the 64-bit hash mmu. For the remaining cpus with that mmu, ppc_hash64_realize() fills in defaults. But there are only a couple of cpus that use those fallbacks, so just have them to set the has64_opts field instead, simplifying the logic. Signed-off-by: David Gibson Reviewed-by: C=C3=A9dric Le Goater Reviewed-by: Greg Kurz --- target/ppc/mmu-hash64.c | 36 ++++++++++++++++++------------------ target/ppc/mmu-hash64.h | 1 + target/ppc/translate_init.c | 2 ++ 3 files changed, 21 insertions(+), 18 deletions(-) diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index d7a0e5615f..d369b1bf86 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -1100,25 +1100,12 @@ void ppc_hash64_init(PowerPCCPU *cpu) CPUPPCState *env =3D &cpu->env; PowerPCCPUClass *pcc =3D POWERPC_CPU_GET_CLASS(cpu); =20 - if (pcc->hash64_opts) { - cpu->hash64_opts =3D g_memdup(pcc->hash64_opts, - sizeof(*cpu->hash64_opts)); - } else if (env->mmu_model & POWERPC_MMU_64) { - /* Use default sets of page sizes. We don't support MPSS */ - static const PPCHash64Options defopts =3D { - .sps =3D { - { .page_shift =3D 12, /* 4K */ - .slb_enc =3D 0, - .enc =3D { { .page_shift =3D 12, .pte_enc =3D 0 } } - }, - { .page_shift =3D 24, /* 16M */ - .slb_enc =3D 0x100, - .enc =3D { { .page_shift =3D 24, .pte_enc =3D 0 } } - }, - }, - }; - cpu->hash64_opts =3D g_memdup(&defopts, sizeof(*cpu->hash64_opts)); + if (!pcc->hash64_opts) { + assert(!(env->mmu_model & POWERPC_MMU_64)); + return; } + + cpu->hash64_opts =3D g_memdup(pcc->hash64_opts, sizeof(*cpu->hash64_op= ts)); } =20 void ppc_hash64_finalize(PowerPCCPU *cpu) @@ -1126,6 +1113,19 @@ void ppc_hash64_finalize(PowerPCCPU *cpu) g_free(cpu->hash64_opts); } =20 +const PPCHash64Options ppc_hash64_opts_basic =3D { + .sps =3D { + { .page_shift =3D 12, /* 4K */ + .slb_enc =3D 0, + .enc =3D { { .page_shift =3D 12, .pte_enc =3D 0 } } + }, + { .page_shift =3D 24, /* 16M */ + .slb_enc =3D 0x100, + .enc =3D { { .page_shift =3D 24, .pte_enc =3D 0 } } + }, + }, +}; + const PPCHash64Options ppc_hash64_opts_POWER7 =3D { .sps =3D { { diff --git a/target/ppc/mmu-hash64.h b/target/ppc/mmu-hash64.h index d42cbc2762..ff0c48af55 100644 --- a/target/ppc/mmu-hash64.h +++ b/target/ppc/mmu-hash64.h @@ -155,6 +155,7 @@ struct PPCHash64Options { struct ppc_one_seg_page_size sps[PPC_PAGE_SIZES_MAX_SZ]; }; =20 +extern const PPCHash64Options ppc_hash64_opts_basic; extern const PPCHash64Options ppc_hash64_opts_POWER7; =20 #endif /* CONFIG_USER_ONLY */ diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 040d6fbac3..ae005b2a54 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -8242,6 +8242,7 @@ POWERPC_FAMILY(970)(ObjectClass *oc, void *data) pcc->mmu_model =3D POWERPC_MMU_64B; #if defined(CONFIG_SOFTMMU) pcc->handle_mmu_fault =3D ppc_hash64_handle_mmu_fault; + pcc->hash64_opts =3D &ppc_hash64_opts_basic; #endif pcc->excp_model =3D POWERPC_EXCP_970; pcc->bus_model =3D PPC_FLAGS_INPUT_970; @@ -8319,6 +8320,7 @@ POWERPC_FAMILY(POWER5P)(ObjectClass *oc, void *data) pcc->mmu_model =3D POWERPC_MMU_2_03; #if defined(CONFIG_SOFTMMU) pcc->handle_mmu_fault =3D ppc_hash64_handle_mmu_fault; + pcc->hash64_opts =3D &ppc_hash64_opts_basic; #endif pcc->excp_model =3D POWERPC_EXCP_970; pcc->bus_model =3D PPC_FLAGS_INPUT_970; --=20 2.14.3