From nobody Sat Oct 25 23:38:18 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1522122563703923.5243339354454; Mon, 26 Mar 2018 20:49:23 -0700 (PDT) Received: from localhost ([::1]:60201 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f0fbr-0005Fy-3A for importer@patchew.org; Mon, 26 Mar 2018 23:49:19 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40847) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f0fam-0004XZ-0T for qemu-devel@nongnu.org; Mon, 26 Mar 2018 23:48:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1f0fai-0001Kq-UB for qemu-devel@nongnu.org; Mon, 26 Mar 2018 23:48:12 -0400 Received: from mail-pg0-x243.google.com ([2607:f8b0:400e:c05::243]:40186) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1f0fai-0001KX-NT for qemu-devel@nongnu.org; Mon, 26 Mar 2018 23:48:08 -0400 Received: by mail-pg0-x243.google.com with SMTP id g8so8099762pgv.7 for ; Mon, 26 Mar 2018 20:48:08 -0700 (PDT) Received: from cloudburst.twiddle.net ([120.145.12.109]) by smtp.gmail.com with ESMTPSA id b24sm443051pfd.127.2018.03.26.20.48.03 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 26 Mar 2018 20:48:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=EeNaKHBZ2SVXXHmiC6hvfR0kZHIewD/3PTUVjARdzz4=; b=aWhikIEDEHyj1PdqkotAXJwCAhV6KWqRufwXhoNnkn1c0DRi/Pakd7M4i2EdOqmMqb tNe/w6Xl0qSm3Q0AwrbX30fO7K6vXxflHoWzB2o8rAghLlw++bTtMEMB+nnMytHYnLuB w+OgKq8/uXKqCU0pFB3yUIMicb/Ezk91ZEbvs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=EeNaKHBZ2SVXXHmiC6hvfR0kZHIewD/3PTUVjARdzz4=; b=T/9IbEzVSfvSVDcpcCA7U7jPOpc2gSoXF9oKnUsSkSYZYLCXaj0bEWpX2kobzfsMow d14o01zyoihkF/NNYCpaRpr5Urtbf2JydYIziw+BGxegvPnf/sBEDxK4g0QwzwSEZ8/o J66ALH5E6cZe/nmU5LsCJhg0Bh4gfCJLP1GR5KNFjwZ2YZqCylOA79wccWAbX6GBIVkc eUrP4RF2Wxil3WmrCrYM84LAXRQNb3KvVO1AG2XAzvIfx516mzF5CkT3hNGnKh4vn3ND 928a0IMzZ5FPVnABpp0uzkBX/RDbCNZwf8WHlCYlHHNelXgrynt/NCiO+E971VHOm1/W dZ4w== X-Gm-Message-State: AElRT7F9Q5jWlhhhUBpDaRar/L04XMWVP6DBxkvGMZPLVtLiHR27Y50v BkvsuI9VGLbL46TV9kjJSEHqlGtt5dE= X-Google-Smtp-Source: AG47ELs3/KhpPRbeb5L46YBNlI3JMxqtATTq4q0LG+87ctFXUT+KJS5NsUcm660TLkb9E5h6WMlHnQ== X-Received: by 10.98.73.214 with SMTP id r83mr26699737pfi.76.1522122486721; Mon, 26 Mar 2018 20:48:06 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 27 Mar 2018 11:47:57 +0800 Message-Id: <20180327034757.3432-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::243 Subject: [Qemu-devel] [PATCH for-2.12] tcg: Mark muluh_i64 and mulsh_i64 as 64-bit ops X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: patches@groups.riscv.org, mjc@sifive.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Failure to do so results in the tcg optimizer sign-extending any constant fold from 32-bits. This turns out to be visible in the RISC-V testsuite using a host that emits these opcodes (e.g. any non-x86_64). Reported-by: Michael Clark Signed-off-by: Richard Henderson Reviewed-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tcg-opc.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h index d81a6c4535..e3a43aabb6 100644 --- a/tcg/tcg-opc.h +++ b/tcg/tcg-opc.h @@ -182,8 +182,8 @@ DEF(add2_i64, 2, 4, 0, IMPL64 | IMPL(TCG_TARGET_HAS_add= 2_i64)) DEF(sub2_i64, 2, 4, 0, IMPL64 | IMPL(TCG_TARGET_HAS_sub2_i64)) DEF(mulu2_i64, 2, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_mulu2_i64)) DEF(muls2_i64, 2, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_muls2_i64)) -DEF(muluh_i64, 1, 2, 0, IMPL(TCG_TARGET_HAS_muluh_i64)) -DEF(mulsh_i64, 1, 2, 0, IMPL(TCG_TARGET_HAS_mulsh_i64)) +DEF(muluh_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_muluh_i64)) +DEF(mulsh_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_mulsh_i64)) =20 #define TLADDR_ARGS (TARGET_LONG_BITS <=3D TCG_TARGET_REG_BITS ? 1 : 2) #define DATA64_ARGS (TCG_TARGET_REG_BITS =3D=3D 64 ? 1 : 2) --=20 2.14.3