From nobody Mon Oct 27 17:59:38 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1521808342527564.3469293483222; Fri, 23 Mar 2018 05:32:22 -0700 (PDT) Received: from localhost ([::1]:37817 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ezLrp-0004N9-O7 for importer@patchew.org; Fri, 23 Mar 2018 08:32:21 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33993) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ezLlL-0005pP-Cc for qemu-devel@nongnu.org; Fri, 23 Mar 2018 08:25:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ezLlK-0002Py-14 for qemu-devel@nongnu.org; Fri, 23 Mar 2018 08:25:39 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:54378 helo=mx1.redhat.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ezLlJ-0002PR-S9 for qemu-devel@nongnu.org; Fri, 23 Mar 2018 08:25:37 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.rdu2.redhat.com [10.11.54.4]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 8428A81A43A2 for ; Fri, 23 Mar 2018 12:25:37 +0000 (UTC) Received: from sirius.home.kraxel.org (ovpn-116-39.ams2.redhat.com [10.36.116.39]) by smtp.corp.redhat.com (Postfix) with ESMTP id 22B102023231; Fri, 23 Mar 2018 12:25:35 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id 52C139B691; Fri, 23 Mar 2018 13:25:21 +0100 (CET) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Fri, 23 Mar 2018 13:25:20 +0100 Message-Id: <20180323122520.11270-8-kraxel@redhat.com> In-Reply-To: <20180323122520.11270-1-kraxel@redhat.com> References: <20180323122520.11270-1-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.78 on 10.11.54.4 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Fri, 23 Mar 2018 12:25:37 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Fri, 23 Mar 2018 12:25:37 +0000 (UTC) for IP:'10.11.54.4' DOMAIN:'int-mx04.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'kraxel@redhat.com' RCPT:'' X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.187.233.73 Subject: [Qemu-devel] [PATCH v2 7/7] [wip] hw/display: add qxl-ramfb X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alex Williamson , =?UTF-8?q?L=C3=A1szl=C3=B3=20=C3=89rsek?= , Gerd Hoffmann , "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Like qxl-vga, but using ramfb instead of legacy vga. NOT WORKING YET. Also: Hackish proof-of-concept, with debug msgs. Signed-off-by: Gerd Hoffmann --- hw/display/qxl.h | 2 ++ hw/display/qxl.c | 47 +++++++++++++++++++++++++++++++++++++++++++---- ui/spice-display.c | 6 ++++++ 3 files changed, 51 insertions(+), 4 deletions(-) diff --git a/hw/display/qxl.h b/hw/display/qxl.h index 089696ef62..7bfdf429bf 100644 --- a/hw/display/qxl.h +++ b/hw/display/qxl.h @@ -5,6 +5,7 @@ =20 #include "hw/hw.h" #include "hw/pci/pci.h" +#include "hw/display/ramfb.h" #include "vga_int.h" #include "qemu/thread.h" =20 @@ -31,6 +32,7 @@ enum qxl_mode { =20 typedef struct PCIQXLDevice { PCIDevice pci; + RAMFBState *ramfb; PortioList vga_port_list; SimpleSpiceDisplay ssd; int id; diff --git a/hw/display/qxl.c b/hw/display/qxl.c index a71714ccb4..ebe71fbcf5 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -1893,7 +1893,12 @@ static void qxl_hw_update(void *opaque) { PCIQXLDevice *qxl =3D opaque; =20 - qxl_render_update(qxl); + if (qxl->mode =3D=3D QXL_MODE_UNDEFINED && + qxl->ramfb !=3D NULL) { + ramfb_display_update(qxl->vga.con, qxl->ramfb); + } else { + qxl_render_update(qxl); + } } =20 static void qxl_dirty_one_surface(PCIQXLDevice *qxl, QXLPHYSICAL pqxl, @@ -1968,7 +1973,8 @@ static void display_update(DisplayChangeListener *dcl, { PCIQXLDevice *qxl =3D container_of(dcl, PCIQXLDevice, ssd.dcl); =20 - if (qxl->mode =3D=3D QXL_MODE_VGA) { + if (qxl->mode =3D=3D QXL_MODE_VGA || + (qxl->mode =3D=3D QXL_MODE_UNDEFINED && qxl->ramfb)) { qemu_spice_display_update(&qxl->ssd, x, y, w, h); } } @@ -1979,7 +1985,9 @@ static void display_switch(DisplayChangeListener *dcl, PCIQXLDevice *qxl =3D container_of(dcl, PCIQXLDevice, ssd.dcl); =20 qxl->ssd.ds =3D surface; - if (qxl->mode =3D=3D QXL_MODE_VGA) { + if (qxl->mode =3D=3D QXL_MODE_VGA || + (qxl->mode =3D=3D QXL_MODE_UNDEFINED && qxl->ramfb)) { + fprintf(stderr, "%s: !native\n", __func__); qemu_spice_display_switch(&qxl->ssd, surface); } } @@ -1988,7 +1996,8 @@ static void display_refresh(DisplayChangeListener *dc= l) { PCIQXLDevice *qxl =3D container_of(dcl, PCIQXLDevice, ssd.dcl); =20 - if (qxl->mode =3D=3D QXL_MODE_VGA) { + if (qxl->mode =3D=3D QXL_MODE_VGA || + (qxl->mode =3D=3D QXL_MODE_UNDEFINED && qxl->ramfb)) { qemu_spice_display_refresh(&qxl->ssd); } } @@ -2204,6 +2213,19 @@ static void qxl_realize_secondary(PCIDevice *dev, Er= ror **errp) qxl_realize_common(qxl, errp); } =20 +static void qxl_realize_ramfb(PCIDevice *dev, Error **errp) +{ + PCIQXLDevice *qxl =3D PCI_QXL(dev); + + qxl_realize_secondary(dev, errp); + qxl_hard_reset(qxl, 0); + + qxl->ramfb =3D ramfb_setup(errp); + qxl->ssd.dcl.ops =3D &display_listener_ops; + qxl->ssd.dcl.con =3D qxl->vga.con; + register_displaychangelistener(&qxl->ssd.dcl); +} + static int qxl_pre_save(void *opaque) { PCIQXLDevice* d =3D opaque; @@ -2472,11 +2494,28 @@ static const TypeInfo qxl_secondary_info =3D { .class_init =3D qxl_secondary_class_init, }; =20 +static void qxl_ramfb_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); + + k->realize =3D qxl_realize_ramfb; + k->class_id =3D PCI_CLASS_DISPLAY_OTHER; + dc->desc =3D "Spice QXL GPU (ramfb)"; +} + +static const TypeInfo qxl_ramfb_info =3D { + .name =3D "qxl-ramfb", + .parent =3D TYPE_PCI_QXL, + .class_init =3D qxl_ramfb_class_init, +}; + static void qxl_register_types(void) { type_register_static(&qxl_pci_type_info); type_register_static(&qxl_primary_info); type_register_static(&qxl_secondary_info); + type_register_static(&qxl_ramfb_info); } =20 type_init(qxl_register_types) diff --git a/ui/spice-display.c b/ui/spice-display.c index fe734821dd..c8082b0649 100644 --- a/ui/spice-display.c +++ b/ui/spice-display.c @@ -86,6 +86,9 @@ void qemu_spice_create_primary_surface(SimpleSpiceDisplay= *ssd, uint32_t id, QXLDevSurfaceCreate *surface, qxl_async_io async) { + fprintf(stderr, "%s: %dx%d, %lx, %s\n", __func__, + surface->width, surface->height, (unsigned long)surface->mem, + (surface->group_id =3D=3D MEMSLOT_GROUP_HOST) ? "host" : "gues= t"); trace_qemu_spice_create_primary_surface(ssd->qxl.id, id, surface, asyn= c); if (async !=3D QXL_SYNC) { spice_qxl_create_primary_surface_async(&ssd->qxl, id, surface, @@ -310,6 +313,7 @@ void qemu_spice_create_host_memslot(SimpleSpiceDisplay = *ssd) { QXLDevMemSlot memslot; =20 + fprintf(stderr, "%s:\n", __func__); memset(&memslot, 0, sizeof(memslot)); memslot.slot_group_id =3D MEMSLOT_GROUP_HOST; memslot.virt_end =3D ~0; @@ -343,6 +347,8 @@ void qemu_spice_create_host_primary(SimpleSpiceDisplay = *ssd) surface.mem =3D (uintptr_t)ssd->buf; surface.group_id =3D MEMSLOT_GROUP_HOST; =20 + fprintf(stderr, "%s: %dx%d @ %p\n", __func__, + surface.width, surface.height, ssd->buf); qemu_spice_create_primary_surface(ssd, 0, &surface, QXL_SYNC); } =20 --=20 2.9.3