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X-Received-From: 2a00:1450:400c:c0c::243 Subject: [Qemu-devel] [PULL 36/69] hw/isa/superio: Factor out the parallel code from pc87312.c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 From: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20180308223946.26784-11-f4bug@amsat.org> Signed-off-by: Paolo Bonzini --- hw/isa/isa-superio.c | 65 ++++++++++++++++++++++++++++++++++++++++++++= ++++ hw/isa/pc87312.c | 38 +++++++++++----------------- hw/isa/trace-events | 4 ++- include/hw/isa/pc87312.h | 4 --- include/hw/isa/superio.h | 6 +++++ 5 files changed, 89 insertions(+), 28 deletions(-) diff --git a/hw/isa/isa-superio.c b/hw/isa/isa-superio.c index 14ec16f831..eb263fcc3a 100644 --- a/hw/isa/isa-superio.c +++ b/hw/isa/isa-superio.c @@ -10,14 +10,79 @@ * SPDX-License-Identifier: GPL-2.0-or-later */ #include "qemu/osdep.h" +#include "qemu/error-report.h" +#include "sysemu/sysemu.h" +#include "chardev/char.h" #include "hw/isa/superio.h" #include "trace.h" =20 +static void isa_superio_realize(DeviceState *dev, Error **errp) +{ + ISASuperIODevice *sio =3D ISA_SUPERIO(dev); + ISASuperIOClass *k =3D ISA_SUPERIO_GET_CLASS(sio); + ISABus *bus =3D isa_bus_from_device(ISA_DEVICE(dev)); + ISADevice *isa; + DeviceState *d; + Chardev *chr; + char *name; + int i; + + /* Parallel port */ + for (i =3D 0; i < k->parallel.count; i++) { + if (i >=3D ARRAY_SIZE(sio->parallel)) { + warn_report("superio: ignoring %td parallel controllers", + k->parallel.count - ARRAY_SIZE(sio->parallel)); + break; + } + if (!k->parallel.is_enabled || k->parallel.is_enabled(sio, i)) { + /* FIXME use a qdev chardev prop instead of parallel_hds[] */ + chr =3D parallel_hds[i]; + if (chr =3D=3D NULL || chr->be) { + name =3D g_strdup_printf("discarding-parallel%d", i); + chr =3D qemu_chr_new(name, "null"); + } else { + name =3D g_strdup_printf("parallel%d", i); + } + isa =3D isa_create(bus, "isa-parallel"); + d =3D DEVICE(isa); + qdev_prop_set_uint32(d, "index", i); + if (k->parallel.get_iobase) { + qdev_prop_set_uint32(d, "iobase", + k->parallel.get_iobase(sio, i)); + } + if (k->parallel.get_irq) { + qdev_prop_set_uint32(d, "irq", k->parallel.get_irq(sio, i)= ); + } + qdev_prop_set_chr(d, "chardev", chr); + qdev_init_nofail(d); + sio->parallel[i] =3D isa; + trace_superio_create_parallel(i, + k->parallel.get_iobase ? + k->parallel.get_iobase(sio, i) := -1, + k->parallel.get_irq ? + k->parallel.get_irq(sio, i) : -1= ); + object_property_add_child(OBJECT(dev), name, + OBJECT(sio->parallel[i]), NULL); + g_free(name); + } + } +} + +static void isa_superio_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(oc); + + dc->realize =3D isa_superio_realize; + /* Reason: Uses parallel_hds[0] in realize(), so it can't be used twic= e */ + dc->user_creatable =3D false; +} + static const TypeInfo isa_superio_type_info =3D { .name =3D TYPE_ISA_SUPERIO, .parent =3D TYPE_ISA_DEVICE, .abstract =3D true, .class_size =3D sizeof(ISASuperIOClass), + .class_init =3D isa_superio_class_init, }; =20 static void isa_superio_register_types(void) diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c index 6b8100ff56..1c15715c69 100644 --- a/hw/isa/pc87312.c +++ b/hw/isa/pc87312.c @@ -64,22 +64,25 @@ =20 /* Parallel port */ =20 -static inline bool is_parallel_enabled(PC87312State *s) +static bool is_parallel_enabled(ISASuperIODevice *sio, uint8_t index) { - return s->regs[REG_FER] & FER_PARALLEL_EN; + PC87312State *s =3D PC87312(sio); + return index ? false : s->regs[REG_FER] & FER_PARALLEL_EN; } =20 static const uint16_t parallel_base[] =3D { 0x378, 0x3bc, 0x278, 0x00 }; =20 -static inline uint16_t get_parallel_iobase(PC87312State *s) +static uint16_t get_parallel_iobase(ISASuperIODevice *sio, uint8_t index) { + PC87312State *s =3D PC87312(sio); return parallel_base[s->regs[REG_FAR] & FAR_PARALLEL_ADDR]; } =20 static const unsigned int parallel_irq[] =3D { 5, 7, 5, 0 }; =20 -static inline unsigned int get_parallel_irq(PC87312State *s) +static unsigned int get_parallel_irq(ISASuperIODevice *sio, uint8_t index) { + PC87312State *s =3D PC87312(sio); int idx; idx =3D (s->regs[REG_FAR] & FAR_PARALLEL_ADDR); if (idx =3D=3D 0) { @@ -286,24 +289,6 @@ static void pc87312_realize(DeviceState *dev, Error **= errp) return; } =20 - if (is_parallel_enabled(s)) { - /* FIXME use a qdev chardev prop instead of parallel_hds[] */ - chr =3D parallel_hds[0]; - if (chr =3D=3D NULL) { - chr =3D qemu_chr_new("par0", "null"); - } - isa =3D isa_create(bus, "isa-parallel"); - d =3D DEVICE(isa); - qdev_prop_set_uint32(d, "index", 0); - qdev_prop_set_uint32(d, "iobase", get_parallel_iobase(s)); - qdev_prop_set_uint32(d, "irq", get_parallel_irq(s)); - qdev_prop_set_chr(d, "chardev", chr); - qdev_init_nofail(d); - s->parallel.dev =3D isa; - trace_pc87312_info_parallel(get_parallel_iobase(s), - get_parallel_irq(s)); - } - for (i =3D 0; i < 2; i++) { if (is_uart_enabled(s, i)) { /* FIXME use a qdev chardev prop instead of serial_hds[] */ @@ -395,8 +380,15 @@ static void pc87312_class_init(ObjectClass *klass, voi= d *data) dc->reset =3D pc87312_reset; dc->vmsd =3D &vmstate_pc87312; dc->props =3D pc87312_properties; - /* Reason: Uses parallel_hds[0] in realize(), so it can't be used twic= e */ + /* Reason: Uses serial_hds[0] in realize(), so it can't be used twice = */ dc->user_creatable =3D false; + + sc->parallel =3D (ISASuperIOFuncs){ + .count =3D 1, + .is_enabled =3D is_parallel_enabled, + .get_iobase =3D get_parallel_iobase, + .get_irq =3D get_parallel_irq, + }; } =20 static const TypeInfo pc87312_type_info =3D { diff --git a/hw/isa/trace-events b/hw/isa/trace-events index a4ab4e3634..97b1949981 100644 --- a/hw/isa/trace-events +++ b/hw/isa/trace-events @@ -1,9 +1,11 @@ # See docs/devel/tracing.txt for syntax documentation. =20 +# hw/isa/isa-superio.c +superio_create_parallel(int id, uint16_t base, unsigned int irq) "id=3D%d,= base 0x%03x, irq %u" + # hw/isa/pc87312.c pc87312_io_read(uint32_t addr, uint32_t val) "read addr=3D0x%x val=3D0x%x" pc87312_io_write(uint32_t addr, uint32_t val) "write addr=3D0x%x val=3D0x%= x" pc87312_info_floppy(uint32_t base) "base 0x%x" pc87312_info_ide(uint32_t base) "base 0x%x" -pc87312_info_parallel(uint32_t base, uint32_t irq) "base 0x%x, irq %u" pc87312_info_serial(int n, uint32_t base, uint32_t irq) "id=3D%d, base 0x%= x, irq %u" diff --git a/include/hw/isa/pc87312.h b/include/hw/isa/pc87312.h index f3761d6fe1..bcc4578479 100644 --- a/include/hw/isa/pc87312.h +++ b/include/hw/isa/pc87312.h @@ -39,10 +39,6 @@ typedef struct PC87312State { uint16_t iobase; uint8_t config; /* initial configuration */ =20 - struct { - ISADevice *dev; - } parallel; - struct { ISADevice *dev; } uart[2]; diff --git a/include/hw/isa/superio.h b/include/hw/isa/superio.h index cff6ad6c08..e9879cfde1 100644 --- a/include/hw/isa/superio.h +++ b/include/hw/isa/superio.h @@ -23,7 +23,11 @@ OBJECT_CLASS_CHECK(ISASuperIOClass, (klass), TYPE_ISA_SUPERIO) =20 typedef struct ISASuperIODevice { + /*< private >*/ ISADevice parent_obj; + /*< public >*/ + + ISADevice *parallel[MAX_PARALLEL_PORTS]; } ISASuperIODevice; =20 typedef struct ISASuperIOFuncs { @@ -39,6 +43,8 @@ typedef struct ISASuperIOClass { ISADeviceClass parent_class; /*< public >*/ DeviceRealize parent_realize; + + ISASuperIOFuncs parallel; } ISASuperIOClass; =20 #endif /* HW_ISA_SUPERIO_H */ --=20 2.14.3