From nobody Fri May 3 14:18:28 2024 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1520894253775138.9230362329556; Mon, 12 Mar 2018 15:37:33 -0700 (PDT) Received: from localhost ([::1]:35981 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1evW4Q-0005Sk-T1 for importer@patchew.org; Mon, 12 Mar 2018 18:37:30 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35901) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1evW2d-0004DP-R7 for qemu-devel@nongnu.org; Mon, 12 Mar 2018 18:35:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1evW2a-0003v9-KH for qemu-devel@nongnu.org; Mon, 12 Mar 2018 18:35:39 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41140) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1evW2a-0003uw-Ex for qemu-devel@nongnu.org; Mon, 12 Mar 2018 18:35:36 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A33A828208; Mon, 12 Mar 2018 22:35:35 +0000 (UTC) Received: from localhost (ovpn-116-64.gru2.redhat.com [10.97.116.64]) by smtp.corp.redhat.com (Postfix) with ESMTP id A4A8160BE4; Mon, 12 Mar 2018 22:35:01 +0000 (UTC) From: Eduardo Habkost To: Peter Maydell , qemu-devel@nongnu.org Date: Mon, 12 Mar 2018 19:34:49 -0300 Message-Id: <20180312223455.18124-2-ehabkost@redhat.com> In-Reply-To: <20180312223455.18124-1-ehabkost@redhat.com> References: <20180312223455.18124-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Mon, 12 Mar 2018 22:35:35 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 1/7] pc: correct misspelled CPU model-id for pc 2.2 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Wang Xin Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_6 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Wang Xin Signed-off-by: Wang Xin Message-Id: <1517367668-25048-1-git-send-email-wangxinxin.wang@huawei.com> Acked-by: Michael S. Tsirkin Signed-off-by: Eduardo Habkost --- include/hw/i386/pc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index bb49165fe0..635c8b2a3b 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -617,7 +617,7 @@ bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t= *); =20 #define PC_COMPAT_2_2 \ HW_COMPAT_2_2 \ - PC_CPU_MODEL_IDS("2.3.0") \ + PC_CPU_MODEL_IDS("2.2.0") \ {\ .driver =3D "kvm64" "-" TYPE_X86_CPU,\ .property =3D "vme",\ --=20 2.14.3 From nobody Fri May 3 14:18:28 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15208942559401006.1989817788975; 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Mon, 12 Mar 2018 22:35:39 +0000 (UTC) Received: from localhost (ovpn-116-64.gru2.redhat.com [10.97.116.64]) by smtp.corp.redhat.com (Postfix) with ESMTP id 01A695E1C6; Mon, 12 Mar 2018 22:35:36 +0000 (UTC) From: Eduardo Habkost To: Peter Maydell , qemu-devel@nongnu.org Date: Mon, 12 Mar 2018 19:34:50 -0300 Message-Id: <20180312223455.18124-3-ehabkost@redhat.com> In-Reply-To: <20180312223455.18124-1-ehabkost@redhat.com> References: <20180312223455.18124-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Mon, 12 Mar 2018 22:35:39 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 2/7] nios2: 10m50_devboard: replace cpu_model with cpu_type X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Igor Mammedov Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov use cpu_create() instead of being removed cpu_generic_init() Signed-off-by: Igor Mammedov Reviewed-by: Eduardo Habkost Message-Id: <1518000027-274608-2-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost --- hw/nios2/10m50_devboard.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/nios2/10m50_devboard.c b/hw/nios2/10m50_devboard.c index e4007f6d7f..42053b2ca9 100644 --- a/hw/nios2/10m50_devboard.c +++ b/hw/nios2/10m50_devboard.c @@ -75,7 +75,7 @@ static void nios2_10m50_ghrd_init(MachineState *machine) phys_ram_alias); =20 /* Create CPU -- FIXME */ - cpu =3D NIOS2_CPU(cpu_generic_init(TYPE_NIOS2_CPU, "nios2")); + cpu =3D NIOS2_CPU(cpu_create(TYPE_NIOS2_CPU)); =20 /* Register: CPU interrupt controller (PIC) */ cpu_irq =3D nios2_cpu_pic_init(cpu); --=20 2.14.3 From nobody Fri May 3 14:18:28 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Mon, 12 Mar 2018 18:35:44 -0400 Received: from mx1.redhat.com ([209.132.183.28]:56854) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1evW2h-0003wm-5T for qemu-devel@nongnu.org; Mon, 12 Mar 2018 18:35:43 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7538AC0587C5; Mon, 12 Mar 2018 22:35:42 +0000 (UTC) Received: from localhost (ovpn-116-64.gru2.redhat.com [10.97.116.64]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9328162660; Mon, 12 Mar 2018 22:35:40 +0000 (UTC) From: Eduardo Habkost To: Peter Maydell , qemu-devel@nongnu.org Date: Mon, 12 Mar 2018 19:34:51 -0300 Message-Id: <20180312223455.18124-4-ehabkost@redhat.com> In-Reply-To: <20180312223455.18124-1-ehabkost@redhat.com> References: <20180312223455.18124-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Mon, 12 Mar 2018 22:35:42 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 3/7] tests: add machine 'none' with -cpu test X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Igor Mammedov Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov Check that "$QEMU -M none -cpu FOO" starts QEMU without error Signed-off-by: Igor Mammedov Message-Id: <1518000027-274608-3-git-send-email-imammedo@redhat.com> [ehabkost: include qmp/qdict.h instead of qmp/types.h] Signed-off-by: Eduardo Habkost --- tests/machine-none-test.c | 101 ++++++++++++++++++++++++++++++++++++++++++= ++++ tests/Makefile.include | 2 + 2 files changed, 103 insertions(+) create mode 100644 tests/machine-none-test.c diff --git a/tests/machine-none-test.c b/tests/machine-none-test.c new file mode 100644 index 0000000000..596ad0153b --- /dev/null +++ b/tests/machine-none-test.c @@ -0,0 +1,101 @@ +/* + * Machine 'none' tests. + * + * Copyright (c) 2018 Red Hat Inc. + * + * Authors: + * Igor Mammedov , + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" + +#include "qemu-common.h" +#include "qemu/cutils.h" +#include "libqtest.h" +#include "qapi/qmp/qdict.h" + + +struct arch2cpu { + const char *arch; + const char *cpu_model; +}; + +static struct arch2cpu cpus_map[] =3D { + /* tested targets list */ + { "arm", "cortex-a15" }, + { "aarch64", "cortex-a57" }, + { "x86_64", "qemu64,apic-id=3D0" }, + { "i386", "qemu32,apic-id=3D0" }, + { "alpha", "ev67" }, + { "cris", "crisv32" }, + { "lm32", "lm32-full" }, + { "m68k", "m5206" }, + /* FIXME: { "microblaze", "any" }, doesn't work with -M none -cpu any = */ + /* FIXME: { "microblazeel", "any" }, doesn't work with -M none -cpu an= y */ + { "mips", "4Kc" }, + { "mipsel", "4Kc" }, + { "mips64", "20Kc" }, + { "mips64el", "20Kc" }, + { "moxie", "MoxieLite" }, + { "nios2", "FIXME" }, + { "or1k", "or1200" }, + { "ppc", "604" }, + { "ppc64", "power8e_v2.1" }, + { "ppcemb", "440epb" }, + { "s390x", "qemu" }, + { "sh4", "sh7750r" }, + { "sh4eb", "sh7751r" }, + { "sparc", "LEON2" }, + { "sparc64", "Fujitsu Sparc64" }, + { "tricore", "tc1796" }, + { "unicore32", "UniCore-II" }, + { "xtensa", "dc233c" }, + { "xtensaeb", "fsf" }, + { "hppa", "hppa" }, +}; + +static const char *get_cpu_model_by_arch(const char *arch) +{ + int i; + + for (i =3D 0; i < ARRAY_SIZE(cpus_map); i++) { + if (!strcmp(arch, cpus_map[i].arch)) { + return cpus_map[i].cpu_model; + } + } + return NULL; +} + +static void test_machine_cpu_cli(void) +{ + QDict *response; + const char *arch =3D qtest_get_arch(); + const char *cpu_model =3D get_cpu_model_by_arch(arch); + + if (!cpu_model) { + if (!(!strcmp(arch, "microblaze") || !strcmp(arch, "microblazeel")= )) { + fprintf(stderr, "WARNING: cpu name for target '%s' isn't defin= ed," + " add it to cpus_map\n", arch); + } + return; /* TODO: die here to force all targets have a test */ + } + global_qtest =3D qtest_startf("-machine none -cpu '%s'", cpu_model); + + response =3D qmp("{ 'execute': 'quit' }"); + g_assert(qdict_haskey(response, "return")); + QDECREF(response); + + qtest_quit(global_qtest); +} + +int main(int argc, char **argv) +{ + g_test_init(&argc, &argv, NULL); + + qtest_add_func("machine/none/cpu_option", test_machine_cpu_cli); + + return g_test_run(); +} diff --git a/tests/Makefile.include b/tests/Makefile.include index ef9b88c369..b0e3785e0f 100644 --- a/tests/Makefile.include +++ b/tests/Makefile.include @@ -399,6 +399,7 @@ check-qtest-s390x-y +=3D tests/virtio-console-test$(EXE= SUF) check-qtest-s390x-y +=3D tests/virtio-serial-test$(EXESUF) check-qtest-s390x-y +=3D tests/cpu-plug-test$(EXESUF) =20 +check-qtest-generic-y +=3D tests/machine-none-test$(EXESUF) check-qtest-generic-y +=3D tests/qom-test$(EXESUF) check-qtest-generic-y +=3D tests/test-hmp$(EXESUF) =20 @@ -794,6 +795,7 @@ tests/display-vga-test$(EXESUF): tests/display-vga-test= .o tests/ipoctal232-test$(EXESUF): tests/ipoctal232-test.o tests/qom-test$(EXESUF): tests/qom-test.o tests/test-hmp$(EXESUF): tests/test-hmp.o +tests/machine-none-test$(EXESUF): tests/machine-none-test.o tests/drive_del-test$(EXESUF): tests/drive_del-test.o $(libqos-virtio-obj-= y) tests/qdev-monitor-test$(EXESUF): tests/qdev-monitor-test.o $(libqos-pc-ob= j-y) tests/nvme-test$(EXESUF): tests/nvme-test.o --=20 2.14.3 From nobody Fri May 3 14:18:28 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1520894434003692.9420451122511; Mon, 12 Mar 2018 15:40:34 -0700 (PDT) Received: from localhost ([::1]:35997 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1evW7M-0008D5-W7 for importer@patchew.org; Mon, 12 Mar 2018 18:40:33 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35964) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1evW2n-0004Le-EN for qemu-devel@nongnu.org; Mon, 12 Mar 2018 18:35:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1evW2k-000429-5f for qemu-devel@nongnu.org; Mon, 12 Mar 2018 18:35:49 -0400 Received: from mx1.redhat.com ([209.132.183.28]:56938) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1evW2j-0003zy-T7 for qemu-devel@nongnu.org; Mon, 12 Mar 2018 18:35:46 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 2D5C1C057F9F; Mon, 12 Mar 2018 22:35:45 +0000 (UTC) Received: from localhost (ovpn-116-64.gru2.redhat.com [10.97.116.64]) by smtp.corp.redhat.com (Postfix) with ESMTP id E1656600D2; Mon, 12 Mar 2018 22:35:43 +0000 (UTC) From: Eduardo Habkost To: Peter Maydell , qemu-devel@nongnu.org Date: Mon, 12 Mar 2018 19:34:52 -0300 Message-Id: <20180312223455.18124-5-ehabkost@redhat.com> In-Reply-To: <20180312223455.18124-1-ehabkost@redhat.com> References: <20180312223455.18124-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Mon, 12 Mar 2018 22:35:45 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 4/7] cpu: add CPU_RESOLVING_TYPE macro X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Igor Mammedov Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov it will be used for providing to cpu name resolving class for parsing cpu model for system and user emulation code. Along with change add target to null-machine tests, so that when switch to CPU_RESOLVING_TYPE happens, it would ensure that null-machine usecase still works. Signed-off-by: Igor Mammedov Reviewed-by: Laurent Vivier (m68k) Acked-by: David Gibson (ppc) Acked-by: Bastian Koppelmann (tricore) Message-Id: <1518000027-274608-4-git-send-email-imammedo@redhat.com> Reviewed-by: Eduardo Habkost [ehabkost: Added macro to riscv too] Signed-off-by: Eduardo Habkost --- target/alpha/cpu.h | 1 + target/arm/cpu.h | 1 + target/cris/cpu.h | 1 + target/hppa/cpu.h | 1 + target/i386/cpu.h | 1 + target/lm32/cpu.h | 1 + target/m68k/cpu.h | 1 + target/microblaze/cpu.h | 1 + target/mips/cpu.h | 1 + target/moxie/cpu.h | 1 + target/nios2/cpu.h | 1 + target/openrisc/cpu.h | 1 + target/ppc/cpu.h | 1 + target/riscv/cpu.h | 1 + target/s390x/cpu.h | 1 + target/sh4/cpu.h | 1 + target/sparc/cpu.h | 1 + target/tilegx/cpu.h | 1 + target/tricore/cpu.h | 1 + target/unicore32/cpu.h | 1 + target/xtensa/cpu.h | 1 + 21 files changed, 21 insertions(+) diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index a79fc2e780..905855a2a1 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h @@ -470,6 +470,7 @@ void alpha_translate_init(void); =20 #define ALPHA_CPU_TYPE_SUFFIX "-" TYPE_ALPHA_CPU #define ALPHA_CPU_TYPE_NAME(model) model ALPHA_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_ALPHA_CPU =20 void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf); /* you can call this signal handler from your SIGBUS and SIGSEGV diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 1e7e1f8a7e..f4b4258655 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2306,6 +2306,7 @@ static inline bool arm_excp_unmasked(CPUState *cs, un= signed int excp_idx, =20 #define ARM_CPU_TYPE_SUFFIX "-" TYPE_ARM_CPU #define ARM_CPU_TYPE_NAME(name) (name ARM_CPU_TYPE_SUFFIX) +#define CPU_RESOLVING_TYPE TYPE_ARM_CPU =20 #define cpu_signal_handler cpu_arm_signal_handler #define cpu_list arm_cpu_list diff --git a/target/cris/cpu.h b/target/cris/cpu.h index 764b35cbae..cfb877c488 100644 --- a/target/cris/cpu.h +++ b/target/cris/cpu.h @@ -271,6 +271,7 @@ enum { =20 #define CRIS_CPU_TYPE_SUFFIX "-" TYPE_CRIS_CPU #define CRIS_CPU_TYPE_NAME(name) (name CRIS_CPU_TYPE_SUFFIX) +#define CPU_RESOLVING_TYPE TYPE_CRIS_CPU =20 #define cpu_signal_handler cpu_cris_signal_handler =20 diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index c88d844938..6ea5f4c4e4 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -267,6 +267,7 @@ static inline int cpu_mmu_index(CPUHPPAState *env, bool= ifetch) void hppa_translate_init(void); =20 #define cpu_init(cpu_model) cpu_generic_init(TYPE_HPPA_CPU, cpu_model) +#define CPU_RESOLVING_TYPE TYPE_HPPA_CPU =20 void hppa_cpu_list(FILE *f, fprintf_function cpu_fprintf); =20 diff --git a/target/i386/cpu.h b/target/i386/cpu.h index faf39ec1ce..3f7333ba28 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1564,6 +1564,7 @@ uint64_t cpu_get_tsc(CPUX86State *env); =20 #define X86_CPU_TYPE_SUFFIX "-" TYPE_X86_CPU #define X86_CPU_TYPE_NAME(name) (name X86_CPU_TYPE_SUFFIX) +#define CPU_RESOLVING_TYPE TYPE_X86_CPU =20 #ifdef TARGET_X86_64 #define TARGET_DEFAULT_CPU_TYPE X86_CPU_TYPE_NAME("qemu64") diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h index ce0a2f24c4..6f41955528 100644 --- a/target/lm32/cpu.h +++ b/target/lm32/cpu.h @@ -259,6 +259,7 @@ bool lm32_cpu_do_semihosting(CPUState *cs); =20 #define LM32_CPU_TYPE_SUFFIX "-" TYPE_LM32_CPU #define LM32_CPU_TYPE_NAME(model) model LM32_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_LM32_CPU =20 #define cpu_list lm32_cpu_list #define cpu_signal_handler cpu_lm32_signal_handler diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 2259bf22dc..f102e7216d 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -531,6 +531,7 @@ enum { =20 #define M68K_CPU_TYPE_SUFFIX "-" TYPE_M68K_CPU #define M68K_CPU_TYPE_NAME(model) model M68K_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_M68K_CPU =20 #define cpu_signal_handler cpu_m68k_signal_handler #define cpu_list m68k_cpu_list diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 1fe21c8539..55f63f7b24 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -344,6 +344,7 @@ int cpu_mb_signal_handler(int host_signum, void *pinfo, #define TARGET_VIRT_ADDR_SPACE_BITS 32 =20 #define cpu_init(cpu_model) cpu_generic_init(TYPE_MICROBLAZE_CPU, cpu_mode= l) +#define CPU_RESOLVING_TYPE TYPE_MICROBLAZE_CPU =20 #define cpu_signal_handler cpu_mb_signal_handler =20 diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 7f8ba5ff3e..0fcbfb3553 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -743,6 +743,7 @@ int cpu_mips_signal_handler(int host_signum, void *pinf= o, void *puc); =20 #define MIPS_CPU_TYPE_SUFFIX "-" TYPE_MIPS_CPU #define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_MIPS_CPU =20 bool cpu_supports_cps_smp(const char *cpu_type); bool cpu_supports_isa(const char *cpu_type, unsigned int isa); diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h index d85e1fc061..5e88c02dfb 100644 --- a/target/moxie/cpu.h +++ b/target/moxie/cpu.h @@ -123,6 +123,7 @@ int cpu_moxie_signal_handler(int host_signum, void *pin= fo, =20 #define MOXIE_CPU_TYPE_SUFFIX "-" TYPE_MOXIE_CPU #define MOXIE_CPU_TYPE_NAME(model) model MOXIE_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_MOXIE_CPU =20 #define cpu_signal_handler cpu_moxie_signal_handler =20 diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index cd4e40d1b4..4ab1da3285 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -231,6 +231,7 @@ void nios2_check_interrupts(CPUNios2State *env); #endif =20 #define cpu_init(cpu_model) cpu_generic_init(TYPE_NIOS2_CPU, cpu_model) +#define CPU_RESOLVING_TYPE TYPE_NIOS2_CPU =20 #define cpu_gen_code cpu_nios2_gen_code #define cpu_signal_handler cpu_nios2_signal_handler diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index 5050b1135c..87018c7b8e 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -393,6 +393,7 @@ int cpu_openrisc_get_phys_data(OpenRISCCPU *cpu, =20 #define OPENRISC_CPU_TYPE_SUFFIX "-" TYPE_OPENRISC_CPU #define OPENRISC_CPU_TYPE_NAME(model) model OPENRISC_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_OPENRISC_CPU =20 #include "exec/cpu-all.h" =20 diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 7bde1884a1..f6d0cd2f0f 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1379,6 +1379,7 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint= 32_t val); =20 #define POWERPC_CPU_TYPE_SUFFIX "-" TYPE_POWERPC_CPU #define POWERPC_CPU_TYPE_NAME(model) model POWERPC_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_POWERPC_CPU =20 #define cpu_signal_handler cpu_ppc_signal_handler #define cpu_list ppc_cpu_list diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index cff02a2857..41e06ac0f9 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -46,6 +46,7 @@ =20 #define RISCV_CPU_TYPE_SUFFIX "-" TYPE_RISCV_CPU #define RISCV_CPU_TYPE_NAME(name) (name RISCV_CPU_TYPE_SUFFIX) +#define CPU_RESOLVING_TYPE TYPE_RISCV_CPU =20 #define TYPE_RISCV_CPU_ANY RISCV_CPU_TYPE_NAME("any") #define TYPE_RISCV_CPU_RV32GCSU_V1_09_1 RISCV_CPU_TYPE_NAME("rv32gcsu-v1.9= .1") diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 5f357a4e2d..fa76236bf0 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -723,6 +723,7 @@ void s390_set_qemu_cpu_model(uint16_t type, uint8_t gen= , uint8_t ec_ga, =20 #define S390_CPU_TYPE_SUFFIX "-" TYPE_S390_CPU #define S390_CPU_TYPE_NAME(name) (name S390_CPU_TYPE_SUFFIX) +#define CPU_RESOLVING_TYPE TYPE_S390_CPU =20 /* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index a649b68d78..04b3d6c09b 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -276,6 +276,7 @@ void cpu_load_tlb(CPUSH4State * env); =20 #define SUPERH_CPU_TYPE_SUFFIX "-" TYPE_SUPERH_CPU #define SUPERH_CPU_TYPE_NAME(model) model SUPERH_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_SUPERH_CPU =20 #define cpu_signal_handler cpu_sh4_signal_handler #define cpu_list sh4_cpu_list diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 9724134a5b..dfe143a963 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -658,6 +658,7 @@ int cpu_sparc_signal_handler(int host_signum, void *pin= fo, void *puc); =20 #define SPARC_CPU_TYPE_SUFFIX "-" TYPE_SPARC_CPU #define SPARC_CPU_TYPE_NAME(model) model SPARC_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_SPARC_CPU =20 #define cpu_signal_handler cpu_sparc_signal_handler #define cpu_list sparc_cpu_list diff --git a/target/tilegx/cpu.h b/target/tilegx/cpu.h index 71cea04589..a73215e6cf 100644 --- a/target/tilegx/cpu.h +++ b/target/tilegx/cpu.h @@ -165,6 +165,7 @@ void tilegx_tcg_init(void); int cpu_tilegx_signal_handler(int host_signum, void *pinfo, void *puc); =20 #define cpu_init(cpu_model) cpu_generic_init(TYPE_TILEGX_CPU, cpu_model) +#define CPU_RESOLVING_TYPE TYPE_TILEGX_CPU =20 #define cpu_signal_handler cpu_tilegx_signal_handler =20 diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h index 07b8b59f58..9241a91faa 100644 --- a/target/tricore/cpu.h +++ b/target/tricore/cpu.h @@ -417,6 +417,7 @@ static inline void cpu_get_tb_cpu_state(CPUTriCoreState= *env, target_ulong *pc, =20 #define TRICORE_CPU_TYPE_SUFFIX "-" TYPE_TRICORE_CPU #define TRICORE_CPU_TYPE_NAME(model) model TRICORE_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_TRICORE_CPU =20 /* helpers.c */ int cpu_tricore_handle_mmu_fault(CPUState *cpu, target_ulong address, diff --git a/target/unicore32/cpu.h b/target/unicore32/cpu.h index 42e1d52478..1db9b6cdf9 100644 --- a/target/unicore32/cpu.h +++ b/target/unicore32/cpu.h @@ -168,6 +168,7 @@ static inline int cpu_mmu_index(CPUUniCore32State *env,= bool ifetch) =20 #define UNICORE32_CPU_TYPE_SUFFIX "-" TYPE_UNICORE32_CPU #define UNICORE32_CPU_TYPE_NAME(model) model UNICORE32_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_UNICORE32_CPU =20 static inline void cpu_get_tb_cpu_state(CPUUniCore32State *env, target_ulo= ng *pc, target_ulong *cs_base, uint32_t *f= lags) diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index 49c2e3cf9a..0e7383b2be 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -499,6 +499,7 @@ void xtensa_cpu_do_unaligned_access(CPUState *cpu, vadd= r addr, =20 #define XTENSA_CPU_TYPE_SUFFIX "-" TYPE_XTENSA_CPU #define XTENSA_CPU_TYPE_NAME(model) model XTENSA_CPU_TYPE_SUFFIX +#define CPU_RESOLVING_TYPE TYPE_XTENSA_CPU =20 #ifdef TARGET_WORDS_BIGENDIAN #define XTENSA_DEFAULT_CPU_MODEL "fsf" --=20 2.14.3 From nobody Fri May 3 14:18:28 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Mon, 12 Mar 2018 22:35:50 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 5/7] Use cpu_create(type) instead of cpu_init(cpu_model) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Igor Mammedov Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov With all targets defining CPU_RESOLVING_TYPE, refactor cpu_parse_cpu_model(type, cpu_model) to parse_cpu_model(cpu_model) so that callers won't have to know internal resolving cpu type. Place it in exec.c so it could be called from both target independed vl.c and *-user/main.c. That allows us to stop abusing cpu type from MachineClass::default_cpu_type as resolver class in vl.c which were confusing part of cpu_parse_cpu_model(). Also with new parse_cpu_model(), the last users of cpu_init() in null-machine.c and bsd/linux-user targets could be switched to cpu_create() API and cpu_init() API will be removed by follow up patch. With no longer users left remove MachineState::cpu_model field, new code should use MachineState::cpu_type instead and leave cpu_model parsing to generic code in vl.c. Signed-off-by: Igor Mammedov Reviewed-by: Eduardo Habkost Message-Id: <1518000027-274608-5-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost --- include/hw/boards.h | 1 - include/qom/cpu.h | 16 ++-------------- bsd-user/main.c | 4 +++- exec.c | 23 +++++++++++++++++++++++ hw/core/null-machine.c | 6 +++--- linux-user/main.c | 8 ++++++-- qom/cpu.c | 47 ++++------------------------------------------- vl.c | 10 +++------- 8 files changed, 44 insertions(+), 71 deletions(-) diff --git a/include/hw/boards.h b/include/hw/boards.h index efb0a9edfd..16b473a4f4 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -251,7 +251,6 @@ struct MachineState { char *kernel_filename; char *kernel_cmdline; char *initrd_filename; - const char *cpu_model; const char *cpu_type; AccelState *accelerator; CPUArchIdList *possible_cpus; diff --git a/include/qom/cpu.h b/include/qom/cpu.h index dc6d4956a8..14e45c4282 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -662,8 +662,7 @@ ObjectClass *cpu_class_by_name(const char *typename, co= nst char *cpu_model); CPUState *cpu_create(const char *typename); =20 /** - * cpu_parse_cpu_model: - * @typename: The CPU base type or CPU type. + * parse_cpu_model: * @cpu_model: The model string including optional parameters. * * processes optional parameters and registers them as global properties @@ -671,18 +670,7 @@ CPUState *cpu_create(const char *typename); * Returns: type of CPU to create or prints error and terminates process * if an error occurred. */ -const char *cpu_parse_cpu_model(const char *typename, const char *cpu_mode= l); - -/** - * cpu_generic_init: - * @typename: The CPU base type. - * @cpu_model: The model string including optional parameters. - * - * Instantiates a CPU, processes optional parameters and realizes the CPU. - * - * Returns: A #CPUState or %NULL if an error occurred. - */ -CPUState *cpu_generic_init(const char *typename, const char *cpu_model); +const char *parse_cpu_model(const char *cpu_model); =20 /** * cpu_has_work: diff --git a/bsd-user/main.c b/bsd-user/main.c index efef5ff8c5..cbc683a5f6 100644 --- a/bsd-user/main.c +++ b/bsd-user/main.c @@ -723,6 +723,7 @@ int main(int argc, char **argv) { const char *filename; const char *cpu_model; + const char *cpu_type; const char *log_file =3D NULL; const char *log_mask =3D NULL; struct target_pt_regs regs1, *regs =3D ®s1; @@ -900,7 +901,8 @@ int main(int argc, char **argv) tcg_exec_init(0); /* NOTE: we need to init the CPU at this stage to get qemu_host_page_size */ - cpu =3D cpu_init(cpu_model); + cpu_type =3D parse_cpu_model(cpu_model); + cpu =3D create(cpu_type); env =3D cpu->env_ptr; #if defined(TARGET_SPARC) || defined(TARGET_PPC) cpu_reset(cpu); diff --git a/exec.c b/exec.c index a9181e6417..bc643fc50f 100644 --- a/exec.c +++ b/exec.c @@ -817,6 +817,29 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp) #endif } =20 +const char *parse_cpu_model(const char *cpu_model) +{ + ObjectClass *oc; + CPUClass *cc; + gchar **model_pieces; + const char *cpu_type; + + model_pieces =3D g_strsplit(cpu_model, ",", 2); + + oc =3D cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]); + if (oc =3D=3D NULL) { + error_report("unable to find CPU model '%s'", model_pieces[0]); + g_strfreev(model_pieces); + exit(EXIT_FAILURE); + } + + cpu_type =3D object_class_get_name(oc); + cc =3D CPU_CLASS(oc); + cc->parse_features(cpu_type, model_pieces[1], &error_fatal); + g_strfreev(model_pieces); + return cpu_type; +} + #if defined(CONFIG_USER_ONLY) static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) { diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c index 864832db34..cde4d3eb57 100644 --- a/hw/core/null-machine.c +++ b/hw/core/null-machine.c @@ -24,9 +24,9 @@ static void machine_none_init(MachineState *mch) { CPUState *cpu =3D NULL; =20 - /* Initialize CPU (if a model has been specified) */ - if (mch->cpu_model) { - cpu =3D cpu_init(mch->cpu_model); + /* Initialize CPU (if user asked for it) */ + if (mch->cpu_type) { + cpu =3D cpu_create(mch->cpu_type); if (!cpu) { error_report("Unable to initialize CPU"); exit(1); diff --git a/linux-user/main.c b/linux-user/main.c index 7bc9bc79b0..89b24d43a5 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -45,6 +45,7 @@ static const char *argv0; static int gdbstub_port; static envlist_t *envlist; static const char *cpu_model; +static const char *cpu_type; unsigned long mmap_min_addr; unsigned long guest_base; int have_guest_base; @@ -3967,7 +3968,7 @@ void init_task_state(TaskState *ts) CPUArchState *cpu_copy(CPUArchState *env) { CPUState *cpu =3D ENV_GET_CPU(env); - CPUState *new_cpu =3D cpu_init(cpu_model); + CPUState *new_cpu =3D cpu_create(cpu_type); CPUArchState *new_env =3D new_cpu->env_ptr; CPUBreakpoint *bp; CPUWatchpoint *wp; @@ -4450,10 +4451,13 @@ int main(int argc, char **argv, char **envp) if (cpu_model =3D=3D NULL) { cpu_model =3D cpu_get_model(get_elf_eflags(execfd)); } + cpu_type =3D parse_cpu_model(cpu_model); + tcg_exec_init(0); /* NOTE: we need to init the CPU at this stage to get qemu_host_page_size */ - cpu =3D cpu_init(cpu_model); + + cpu =3D cpu_create(cpu_type); env =3D cpu->env_ptr; cpu_reset(cpu); =20 diff --git a/qom/cpu.c b/qom/cpu.c index e42d9a7f9e..60292dfde9 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -67,37 +67,6 @@ CPUState *cpu_create(const char *typename) return cpu; } =20 -const char *cpu_parse_cpu_model(const char *typename, const char *cpu_mode= l) -{ - ObjectClass *oc; - CPUClass *cc; - gchar **model_pieces; - const char *cpu_type; - - model_pieces =3D g_strsplit(cpu_model, ",", 2); - - oc =3D cpu_class_by_name(typename, model_pieces[0]); - if (oc =3D=3D NULL) { - error_report("unable to find CPU model '%s'", model_pieces[0]); - g_strfreev(model_pieces); - exit(EXIT_FAILURE); - } - - cpu_type =3D object_class_get_name(oc); - cc =3D CPU_CLASS(oc); - cc->parse_features(cpu_type, model_pieces[1], &error_fatal); - g_strfreev(model_pieces); - return cpu_type; -} - -CPUState *cpu_generic_init(const char *typename, const char *cpu_model) -{ - /* TODO: all callers of cpu_generic_init() need to be converted to - * call cpu_parse_features() only once, before calling cpu_generic_ini= t(). - */ - return cpu_create(cpu_parse_cpu_model(typename, cpu_model)); -} - bool cpu_paging_enabled(const CPUState *cpu) { CPUClass *cc =3D CPU_GET_CLASS(cpu); @@ -335,23 +304,15 @@ static ObjectClass *cpu_common_class_by_name(const ch= ar *cpu_model) static void cpu_common_parse_features(const char *typename, char *features, Error **errp) { - char *featurestr; /* Single "key=3Dvalue" string being parsed */ char *val; static bool cpu_globals_initialized; + /* Single "key=3Dvalue" string being parsed */ + char *featurestr =3D features ? strtok(features, ",") : NULL; =20 - /* TODO: all callers of ->parse_features() need to be changed to - * call it only once, so we can remove this check (or change it - * to assert(!cpu_globals_initialized). - * Current callers of ->parse_features() are: - * - cpu_generic_init() - */ - if (cpu_globals_initialized) { - return; - } + /* should be called only once, catch invalid users */ + assert(!cpu_globals_initialized); cpu_globals_initialized =3D true; =20 - featurestr =3D features ? strtok(features, ",") : NULL; - while (featurestr) { val =3D strchr(featurestr, '=3D'); if (val) { diff --git a/vl.c b/vl.c index 3ef04ce991..61c2f19365 100644 --- a/vl.c +++ b/vl.c @@ -4582,15 +4582,11 @@ int main(int argc, char **argv, char **envp) current_machine->maxram_size =3D maxram_size; current_machine->ram_slots =3D ram_slots; current_machine->boot_order =3D boot_order; - current_machine->cpu_model =3D cpu_model; =20 /* parse features once if machine provides default cpu_type */ - if (machine_class->default_cpu_type) { - current_machine->cpu_type =3D machine_class->default_cpu_type; - if (cpu_model) { - current_machine->cpu_type =3D - cpu_parse_cpu_model(machine_class->default_cpu_type, cpu_m= odel); - } + current_machine->cpu_type =3D machine_class->default_cpu_type; + if (cpu_model) { + current_machine->cpu_type =3D parse_cpu_model(cpu_model); } parse_numa_opts(current_machine); =20 --=20 2.14.3 From nobody Fri May 3 14:18:28 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Mon, 12 Mar 2018 22:35:55 +0000 (UTC) Received: from localhost (ovpn-116-64.gru2.redhat.com [10.97.116.64]) by smtp.corp.redhat.com (Postfix) with ESMTP id DE69817A7A; Mon, 12 Mar 2018 22:35:51 +0000 (UTC) From: Eduardo Habkost To: Peter Maydell , qemu-devel@nongnu.org Date: Mon, 12 Mar 2018 19:34:54 -0300 Message-Id: <20180312223455.18124-7-ehabkost@redhat.com> In-Reply-To: <20180312223455.18124-1-ehabkost@redhat.com> References: <20180312223455.18124-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Mon, 12 Mar 2018 22:35:55 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 6/7] cpu: get rid of unused cpu_init() defines X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Igor Mammedov Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov cpu_init(cpu_model) were replaced by cpu_create(cpu_type) so no users are left, remove it. Signed-off-by: Igor Mammedov Acked-by: David Gibson (ppc) Reviewed-by: Eduardo Habkost Message-Id: <1518000027-274608-6-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost --- target/alpha/cpu.h | 2 -- target/arm/cpu.h | 2 -- target/cris/cpu.h | 2 -- target/hppa/cpu.h | 1 - target/i386/cpu.h | 2 -- target/lm32/cpu.h | 2 -- target/m68k/cpu.h | 2 -- target/microblaze/cpu.h | 1 - target/mips/cpu.h | 2 -- target/moxie/cpu.h | 2 -- target/nios2/cpu.h | 1 - target/openrisc/cpu.h | 2 -- target/ppc/cpu.h | 2 -- target/s390x/cpu.h | 2 -- target/sh4/cpu.h | 2 -- target/sparc/cpu.h | 4 ---- target/tilegx/cpu.h | 1 - target/tricore/cpu.h | 2 -- target/unicore32/cpu.h | 2 -- target/xtensa/cpu.h | 2 -- 20 files changed, 38 deletions(-) diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index 905855a2a1..7b50be785d 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h @@ -466,8 +466,6 @@ enum { =20 void alpha_translate_init(void); =20 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_ALPHA_CPU, cpu_model) - #define ALPHA_CPU_TYPE_SUFFIX "-" TYPE_ALPHA_CPU #define ALPHA_CPU_TYPE_NAME(model) model ALPHA_CPU_TYPE_SUFFIX #define CPU_RESOLVING_TYPE TYPE_ALPHA_CPU diff --git a/target/arm/cpu.h b/target/arm/cpu.h index f4b4258655..19a0c03f9b 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2302,8 +2302,6 @@ static inline bool arm_excp_unmasked(CPUState *cs, un= signed int excp_idx, return unmasked || pstate_unmasked; } =20 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_ARM_CPU, cpu_model) - #define ARM_CPU_TYPE_SUFFIX "-" TYPE_ARM_CPU #define ARM_CPU_TYPE_NAME(name) (name ARM_CPU_TYPE_SUFFIX) #define CPU_RESOLVING_TYPE TYPE_ARM_CPU diff --git a/target/cris/cpu.h b/target/cris/cpu.h index cfb877c488..8bb1dbc989 100644 --- a/target/cris/cpu.h +++ b/target/cris/cpu.h @@ -267,8 +267,6 @@ enum { #define TARGET_PHYS_ADDR_SPACE_BITS 32 #define TARGET_VIRT_ADDR_SPACE_BITS 32 =20 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_CRIS_CPU, cpu_model) - #define CRIS_CPU_TYPE_SUFFIX "-" TYPE_CRIS_CPU #define CRIS_CPU_TYPE_NAME(name) (name CRIS_CPU_TYPE_SUFFIX) #define CPU_RESOLVING_TYPE TYPE_CRIS_CPU diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 6ea5f4c4e4..19dd12a93e 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -266,7 +266,6 @@ static inline int cpu_mmu_index(CPUHPPAState *env, bool= ifetch) =20 void hppa_translate_init(void); =20 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_HPPA_CPU, cpu_model) #define CPU_RESOLVING_TYPE TYPE_HPPA_CPU =20 void hppa_cpu_list(FILE *f, fprintf_function cpu_fprintf); diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 3f7333ba28..4dab6243c2 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1560,8 +1560,6 @@ uint64_t cpu_get_tsc(CPUX86State *env); =20 #define PHYS_ADDR_MASK MAKE_64BIT_MASK(0, TCG_PHYS_ADDR_BITS) =20 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_X86_CPU, cpu_model) - #define X86_CPU_TYPE_SUFFIX "-" TYPE_X86_CPU #define X86_CPU_TYPE_NAME(name) (name X86_CPU_TYPE_SUFFIX) #define CPU_RESOLVING_TYPE TYPE_X86_CPU diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h index 6f41955528..66157eefe9 100644 --- a/target/lm32/cpu.h +++ b/target/lm32/cpu.h @@ -255,8 +255,6 @@ void lm32_watchpoint_insert(CPULM32State *env, int inde= x, target_ulong address, void lm32_watchpoint_remove(CPULM32State *env, int index); bool lm32_cpu_do_semihosting(CPUState *cs); =20 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_LM32_CPU, cpu_model) - #define LM32_CPU_TYPE_SUFFIX "-" TYPE_LM32_CPU #define LM32_CPU_TYPE_NAME(model) model LM32_CPU_TYPE_SUFFIX #define CPU_RESOLVING_TYPE TYPE_LM32_CPU diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index f102e7216d..c63adf772f 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -527,8 +527,6 @@ enum { #define TARGET_PHYS_ADDR_SPACE_BITS 32 #define TARGET_VIRT_ADDR_SPACE_BITS 32 =20 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_M68K_CPU, cpu_model) - #define M68K_CPU_TYPE_SUFFIX "-" TYPE_M68K_CPU #define M68K_CPU_TYPE_NAME(model) model M68K_CPU_TYPE_SUFFIX #define CPU_RESOLVING_TYPE TYPE_M68K_CPU diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 55f63f7b24..5be71bc320 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -343,7 +343,6 @@ int cpu_mb_signal_handler(int host_signum, void *pinfo, #define TARGET_PHYS_ADDR_SPACE_BITS 32 #define TARGET_VIRT_ADDR_SPACE_BITS 32 =20 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_MICROBLAZE_CPU, cpu_mode= l) #define CPU_RESOLVING_TYPE TYPE_MICROBLAZE_CPU =20 #define cpu_signal_handler cpu_mb_signal_handler diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 0fcbfb3553..cfe1735e0e 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -739,8 +739,6 @@ enum { =20 int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc); =20 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_MIPS_CPU, cpu_model) - #define MIPS_CPU_TYPE_SUFFIX "-" TYPE_MIPS_CPU #define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX #define CPU_RESOLVING_TYPE TYPE_MIPS_CPU diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h index 5e88c02dfb..d40f1e6c45 100644 --- a/target/moxie/cpu.h +++ b/target/moxie/cpu.h @@ -119,8 +119,6 @@ void moxie_translate_init(void); int cpu_moxie_signal_handler(int host_signum, void *pinfo, void *puc); =20 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_MOXIE_CPU, cpu_model) - #define MOXIE_CPU_TYPE_SUFFIX "-" TYPE_MOXIE_CPU #define MOXIE_CPU_TYPE_NAME(model) model MOXIE_CPU_TYPE_SUFFIX #define CPU_RESOLVING_TYPE TYPE_MOXIE_CPU diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 4ab1da3285..145796e8ce 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -230,7 +230,6 @@ void nios2_check_interrupts(CPUNios2State *env); # define TARGET_VIRT_ADDR_SPACE_BITS 32 #endif =20 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_NIOS2_CPU, cpu_model) #define CPU_RESOLVING_TYPE TYPE_NIOS2_CPU =20 #define cpu_gen_code cpu_nios2_gen_code diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index 87018c7b8e..35cab65f11 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -389,8 +389,6 @@ int cpu_openrisc_get_phys_data(OpenRISCCPU *cpu, int *prot, target_ulong address, int rw); #endif =20 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model) - #define OPENRISC_CPU_TYPE_SUFFIX "-" TYPE_OPENRISC_CPU #define OPENRISC_CPU_TYPE_NAME(model) model OPENRISC_CPU_TYPE_SUFFIX #define CPU_RESOLVING_TYPE TYPE_OPENRISC_CPU diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index f6d0cd2f0f..c621a6bd5e 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1375,8 +1375,6 @@ static inline uint64_t ppc_dump_gpr(CPUPPCState *env,= int gprn) int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp); int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val); =20 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_POWERPC_CPU, cpu_model) - #define POWERPC_CPU_TYPE_SUFFIX "-" TYPE_POWERPC_CPU #define POWERPC_CPU_TYPE_NAME(model) model POWERPC_CPU_TYPE_SUFFIX #define CPU_RESOLVING_TYPE TYPE_POWERPC_CPU diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index fa76236bf0..3ee40f08b7 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -719,8 +719,6 @@ void s390_set_qemu_cpu_model(uint16_t type, uint8_t gen= , uint8_t ec_ga, =20 =20 /* helper.c */ -#define cpu_init(cpu_model) cpu_generic_init(TYPE_S390_CPU, cpu_model) - #define S390_CPU_TYPE_SUFFIX "-" TYPE_S390_CPU #define S390_CPU_TYPE_NAME(name) (name S390_CPU_TYPE_SUFFIX) #define CPU_RESOLVING_TYPE TYPE_S390_CPU diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index 04b3d6c09b..775b5743bf 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -272,8 +272,6 @@ int cpu_sh4_is_cached(CPUSH4State * env, target_ulong a= ddr); =20 void cpu_load_tlb(CPUSH4State * env); =20 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_SUPERH_CPU, cpu_model) - #define SUPERH_CPU_TYPE_SUFFIX "-" TYPE_SUPERH_CPU #define SUPERH_CPU_TYPE_NAME(model) model SUPERH_CPU_TYPE_SUFFIX #define CPU_RESOLVING_TYPE TYPE_SUPERH_CPU diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index dfe143a963..4972ebcfd4 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -652,10 +652,6 @@ hwaddr cpu_get_phys_page_nofault(CPUSPARCState *env, t= arget_ulong addr, #endif int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc); =20 -#ifndef NO_CPU_IO_DEFS -#define cpu_init(cpu_model) cpu_generic_init(TYPE_SPARC_CPU, cpu_model) -#endif - #define SPARC_CPU_TYPE_SUFFIX "-" TYPE_SPARC_CPU #define SPARC_CPU_TYPE_NAME(model) model SPARC_CPU_TYPE_SUFFIX #define CPU_RESOLVING_TYPE TYPE_SPARC_CPU diff --git a/target/tilegx/cpu.h b/target/tilegx/cpu.h index a73215e6cf..238f8d36d7 100644 --- a/target/tilegx/cpu.h +++ b/target/tilegx/cpu.h @@ -164,7 +164,6 @@ static inline TileGXCPU *tilegx_env_get_cpu(CPUTLGState= *env) void tilegx_tcg_init(void); int cpu_tilegx_signal_handler(int host_signum, void *pinfo, void *puc); =20 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_TILEGX_CPU, cpu_model) #define CPU_RESOLVING_TYPE TYPE_TILEGX_CPU =20 #define cpu_signal_handler cpu_tilegx_signal_handler diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h index 9241a91faa..c3665c6ddd 100644 --- a/target/tricore/cpu.h +++ b/target/tricore/cpu.h @@ -413,8 +413,6 @@ static inline void cpu_get_tb_cpu_state(CPUTriCoreState= *env, target_ulong *pc, *flags =3D 0; } =20 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_TRICORE_CPU, cpu_model) - #define TRICORE_CPU_TYPE_SUFFIX "-" TYPE_TRICORE_CPU #define TRICORE_CPU_TYPE_NAME(model) model TRICORE_CPU_TYPE_SUFFIX #define CPU_RESOLVING_TYPE TYPE_TRICORE_CPU diff --git a/target/unicore32/cpu.h b/target/unicore32/cpu.h index 1db9b6cdf9..735d3ae9dc 100644 --- a/target/unicore32/cpu.h +++ b/target/unicore32/cpu.h @@ -164,8 +164,6 @@ static inline int cpu_mmu_index(CPUUniCore32State *env,= bool ifetch) =20 #include "exec/cpu-all.h" =20 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_UNICORE32_CPU, cpu_model) - #define UNICORE32_CPU_TYPE_SUFFIX "-" TYPE_UNICORE32_CPU #define UNICORE32_CPU_TYPE_NAME(model) model UNICORE32_CPU_TYPE_SUFFIX #define CPU_RESOLVING_TYPE TYPE_UNICORE32_CPU diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index 0e7383b2be..aaad705e0d 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -513,8 +513,6 @@ void xtensa_cpu_do_unaligned_access(CPUState *cpu, vadd= r addr, #define XTENSA_DEFAULT_CPU_NOMMU_TYPE \ XTENSA_CPU_TYPE_NAME(XTENSA_DEFAULT_CPU_NOMMU_MODEL) =20 -#define cpu_init(cpu_model) cpu_generic_init(TYPE_XTENSA_CPU, cpu_model) - void xtensa_translate_init(void); void xtensa_breakpoint_handler(CPUState *cs); void xtensa_finalize_config(XtensaConfig *config); --=20 2.14.3 From nobody Fri May 3 14:18:28 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1520894392212786.1415390546905; Mon, 12 Mar 2018 15:39:52 -0700 (PDT) Received: from localhost ([::1]:35994 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1evW6h-0007cr-8t for importer@patchew.org; Mon, 12 Mar 2018 18:39:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36092) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1evW30-0004YW-Gl for qemu-devel@nongnu.org; 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Mon, 12 Mar 2018 22:36:00 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 7/7] cpu: drop unnecessary NULL check and cpu_common_class_by_name() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Igor Mammedov Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov both do nothing as for the first all callers parse_cpu_model() and qmp_query_cpu_model_() should provide non NULL value, so just abort if it's not so. While at it drop cpu_common_class_by_name() which is not need any more as every target has CPUClass::class_by_name callback by now, though abort in case a new arch will forget to define one. Signed-off-by: Igor Mammedov Message-Id: <1518013857-4372-1-git-send-email-imammedo@redhat.com> Reviewed-by: Eduardo Habkost Signed-off-by: Eduardo Habkost --- qom/cpu.c | 14 ++------------ target/i386/cpu.c | 8 +------- 2 files changed, 3 insertions(+), 19 deletions(-) diff --git a/qom/cpu.c b/qom/cpu.c index 60292dfde9..92599f3541 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -286,21 +286,12 @@ static bool cpu_common_has_work(CPUState *cs) =20 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model) { - CPUClass *cc; - - if (!cpu_model) { - return NULL; - } - cc =3D CPU_CLASS(object_class_by_name(typename)); + CPUClass *cc =3D CPU_CLASS(object_class_by_name(typename)); =20 + assert(cpu_model && cc->class_by_name); return cc->class_by_name(cpu_model); } =20 -static ObjectClass *cpu_common_class_by_name(const char *cpu_model) -{ - return NULL; -} - static void cpu_common_parse_features(const char *typename, char *features, Error **errp) { @@ -418,7 +409,6 @@ static void cpu_class_init(ObjectClass *klass, void *da= ta) DeviceClass *dc =3D DEVICE_CLASS(klass); CPUClass *k =3D CPU_CLASS(klass); =20 - k->class_by_name =3D cpu_common_class_by_name; k->parse_features =3D cpu_common_parse_features; k->reset =3D cpu_common_reset; k->get_arch_id =3D cpu_common_get_arch_id; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 2c04645cea..daa3779197 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -741,13 +741,7 @@ static char *x86_cpu_type_name(const char *model_name) static ObjectClass *x86_cpu_class_by_name(const char *cpu_model) { ObjectClass *oc; - char *typename; - - if (cpu_model =3D=3D NULL) { - return NULL; - } - - typename =3D x86_cpu_type_name(cpu_model); + char *typename =3D x86_cpu_type_name(cpu_model); oc =3D object_class_by_name(typename); g_free(typename); return oc; --=20 2.14.3