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X-Received-From: 2a00:1450:4010:c07::244 Subject: [Qemu-devel] [PATCH 03/11] target/xtensa: use correct number of registers in gdbstub X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" System emulation should provide access to all registers, userspace emulation should only provide access to unprivileged registers. Record register flags from GDB register map definition, calculate both num_regs and num_core_regs if either is zero. Use num_regs in system emulation, num_core_regs in userspace emulation gdbstub. Signed-off-by: Max Filippov --- target/xtensa/cpu.h | 1 + target/xtensa/gdbstub.c | 14 ++++++++++++-- target/xtensa/helper.c | 28 ++++++++++++++++++++-------- target/xtensa/overlay_tool.h | 11 ++++++++--- 4 files changed, 41 insertions(+), 13 deletions(-) diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index 49c2e3cf9a1b..255cc9e08ed9 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -310,6 +310,7 @@ typedef struct xtensa_tlb { =20 typedef struct XtensaGdbReg { int targno; + unsigned flags; int type; int group; unsigned size; diff --git a/target/xtensa/gdbstub.c b/target/xtensa/gdbstub.c index d78a1b437dbf..a8ea98d03fb8 100644 --- a/target/xtensa/gdbstub.c +++ b/target/xtensa/gdbstub.c @@ -28,9 +28,14 @@ int xtensa_cpu_gdb_read_register(CPUState *cs, uint8_t *= mem_buf, int n) XtensaCPU *cpu =3D XTENSA_CPU(cs); CPUXtensaState *env =3D &cpu->env; const XtensaGdbReg *reg =3D env->config->gdb_regmap.reg + n; +#ifdef CONFIG_USER_ONLY + int num_regs =3D env->config->gdb_regmap.num_core_regs; +#else + int num_regs =3D env->config->gdb_regmap.num_regs; +#endif unsigned i; =20 - if (n < 0 || n >=3D env->config->gdb_regmap.num_regs) { + if (n < 0 || n >=3D num_regs) { return 0; } =20 @@ -81,8 +86,13 @@ int xtensa_cpu_gdb_write_register(CPUState *cs, uint8_t = *mem_buf, int n) CPUXtensaState *env =3D &cpu->env; uint32_t tmp; const XtensaGdbReg *reg =3D env->config->gdb_regmap.reg + n; +#ifdef CONFIG_USER_ONLY + int num_regs =3D env->config->gdb_regmap.num_core_regs; +#else + int num_regs =3D env->config->gdb_regmap.num_regs; +#endif =20 - if (n < 0 || n >=3D env->config->gdb_regmap.num_regs) { + if (n < 0 || n >=3D num_regs) { return 0; } =20 diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c index 5009fecedcb0..34885038d554 100644 --- a/target/xtensa/helper.c +++ b/target/xtensa/helper.c @@ -88,19 +88,31 @@ static void init_libisa(XtensaConfig *config) =20 void xtensa_finalize_config(XtensaConfig *config) { - unsigned i, n =3D 0; - if (config->isa_internal) { init_libisa(config); } - if (config->gdb_regmap.num_regs) { - return; - } =20 - for (i =3D 0; config->gdb_regmap.reg[i].targno >=3D 0; ++i) { - n +=3D (config->gdb_regmap.reg[i].type !=3D 6); + if (config->gdb_regmap.num_regs =3D=3D 0 || + config->gdb_regmap.num_core_regs =3D=3D 0) { + unsigned i; + unsigned n_regs =3D 0; + unsigned n_core_regs =3D 0; + + for (i =3D 0; config->gdb_regmap.reg[i].targno >=3D 0; ++i) { + if (config->gdb_regmap.reg[i].type !=3D 6) { + ++n_regs; + if ((config->gdb_regmap.reg[i].flags & 0x1) =3D=3D 0) { + ++n_core_regs; + } + } + } + if (config->gdb_regmap.num_regs =3D=3D 0) { + config->gdb_regmap.num_regs =3D n_regs; + } + if (config->gdb_regmap.num_core_regs =3D=3D 0) { + config->gdb_regmap.num_core_regs =3D n_core_regs; + } } - config->gdb_regmap.num_regs =3D n; } =20 void xtensa_register_core(XtensaConfigList *node) diff --git a/target/xtensa/overlay_tool.h b/target/xtensa/overlay_tool.h index 589dd6285089..b24ad11fec1c 100644 --- a/target/xtensa/overlay_tool.h +++ b/target/xtensa/overlay_tool.h @@ -25,9 +25,14 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ =20 -#define XTREG(idx, ofs, bi, sz, al, no, flags, cp, typ, grp, name, \ - a1, a2, a3, a4, a5, a6) \ - { .targno =3D (no), .type =3D (typ), .group =3D (grp), .size =3D (sz) = }, +#define XTREG(idx, ofs, bi, sz, al, no, fl, cp, typ, grp, name, \ + a1, a2, a3, a4, a5, a6) { \ + .targno =3D (no), \ + .flags =3D (fl), \ + .type =3D (typ), \ + .group =3D (grp), \ + .size =3D (sz), \ +}, #define XTREG_END { .targno =3D -1 }, =20 #ifndef XCHAL_HAVE_DEPBITS --=20 2.11.0