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X-Received-From: 2a00:1450:400c:c0c::244 Subject: [Qemu-devel] [PATCH v4 19/31] arm/translate-a64: add FP16 FCMxx (zero) to simd_two_reg_misc_fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , richard.henderson@linaro.org, qemu-devel@nongnu.org, Peter Maydell Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 I re-use the existing handle_2misc_fcmp_zero handler and tweak it slightly to deal with the half-precision case. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- v3 - use size directly wuth read/write_vec_element - drop unneeded break - WIP: mess with calculating maxpasses --- target/arm/translate-a64.c | 80 +++++++++++++++++++++++++++++++++---------= ---- 1 file changed, 57 insertions(+), 23 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 046079b1b3..9c02f1e23c 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -7821,14 +7821,14 @@ static void handle_2misc_fcmp_zero(DisasContext *s,= int opcode, bool is_scalar, bool is_u, bool is_q, int size, int rn, int rd) { - bool is_double =3D (size =3D=3D 3); + bool is_double =3D (size =3D=3D MO_64); TCGv_ptr fpst; =20 if (!fp_access_check(s)) { return; } =20 - fpst =3D get_fpstatus_ptr(false); + fpst =3D get_fpstatus_ptr(size =3D=3D MO_16); =20 if (is_double) { TCGv_i64 tcg_op =3D tcg_temp_new_i64(); @@ -7880,34 +7880,57 @@ static void handle_2misc_fcmp_zero(DisasContext *s,= int opcode, bool swap =3D false; int pass, maxpasses; =20 - switch (opcode) { - case 0x2e: /* FCMLT (zero) */ - swap =3D true; - /* fall through */ - case 0x2c: /* FCMGT (zero) */ - genfn =3D gen_helper_neon_cgt_f32; - break; - case 0x2d: /* FCMEQ (zero) */ - genfn =3D gen_helper_neon_ceq_f32; - break; - case 0x6d: /* FCMLE (zero) */ - swap =3D true; - /* fall through */ - case 0x6c: /* FCMGE (zero) */ - genfn =3D gen_helper_neon_cge_f32; - break; - default: - g_assert_not_reached(); + if (size =3D=3D MO_16) { + switch (opcode) { + case 0x2e: /* FCMLT (zero) */ + swap =3D true; + /* fall through */ + case 0x2c: /* FCMGT (zero) */ + genfn =3D gen_helper_advsimd_cgt_f16; + break; + case 0x2d: /* FCMEQ (zero) */ + genfn =3D gen_helper_advsimd_ceq_f16; + break; + case 0x6d: /* FCMLE (zero) */ + swap =3D true; + /* fall through */ + case 0x6c: /* FCMGE (zero) */ + genfn =3D gen_helper_advsimd_cge_f16; + break; + default: + g_assert_not_reached(); + } + } else { + switch (opcode) { + case 0x2e: /* FCMLT (zero) */ + swap =3D true; + /* fall through */ + case 0x2c: /* FCMGT (zero) */ + genfn =3D gen_helper_neon_cgt_f32; + break; + case 0x2d: /* FCMEQ (zero) */ + genfn =3D gen_helper_neon_ceq_f32; + break; + case 0x6d: /* FCMLE (zero) */ + swap =3D true; + /* fall through */ + case 0x6c: /* FCMGE (zero) */ + genfn =3D gen_helper_neon_cge_f32; + break; + default: + g_assert_not_reached(); + } } =20 if (is_scalar) { maxpasses =3D 1; } else { - maxpasses =3D is_q ? 4 : 2; + int vector_size =3D 8 << is_q; + maxpasses =3D vector_size >> size; } =20 for (pass =3D 0; pass < maxpasses; pass++) { - read_vec_element_i32(s, tcg_op, rn, pass, MO_32); + read_vec_element_i32(s, tcg_op, rn, pass, size); if (swap) { genfn(tcg_res, tcg_zero, tcg_op, fpst); } else { @@ -7916,7 +7939,7 @@ static void handle_2misc_fcmp_zero(DisasContext *s, i= nt opcode, if (is_scalar) { write_fp_sreg(s, rd, tcg_res); } else { - write_vec_element_i32(s, tcg_res, rd, pass, MO_32); + write_vec_element_i32(s, tcg_res, rd, pass, size); } } tcg_temp_free_i32(tcg_res); @@ -11209,7 +11232,18 @@ static void disas_simd_two_reg_misc_fp16(DisasCont= ext *s, uint32_t insn) fpop =3D deposit32(opcode, 5, 1, a); fpop =3D deposit32(fpop, 6, 1, u); =20 + rd =3D extract32(insn, 0, 5); + rn =3D extract32(insn, 5, 5); + switch (fpop) { + break; + case 0x2c: /* FCMGT (zero) */ + case 0x2d: /* FCMEQ (zero) */ + case 0x2e: /* FCMLT (zero) */ + case 0x6c: /* FCMGE (zero) */ + case 0x6d: /* FCMLE (zero) */ + handle_2misc_fcmp_zero(s, fpop, is_scalar, 0, is_q, MO_16, rn, rd); + return; case 0x18: /* FRINTN */ need_rmode =3D true; only_in_vector =3D true; --=20 2.15.1