From nobody Fri Oct 24 09:45:21 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1519401569601312.54411925808427; Fri, 23 Feb 2018 07:59:29 -0800 (PST) Received: from localhost ([::1]:45387 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1epFkr-0006wL-TV for importer@patchew.org; Fri, 23 Feb 2018 10:59:26 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45834) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1epFUc-0008L7-4T for qemu-devel@nongnu.org; Fri, 23 Feb 2018 10:42:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1epFUb-0005X1-7v for qemu-devel@nongnu.org; Fri, 23 Feb 2018 10:42:38 -0500 Received: from mail-wr0-x242.google.com ([2a00:1450:400c:c0c::242]:45954) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1epFUa-0005VI-V9 for qemu-devel@nongnu.org; Fri, 23 Feb 2018 10:42:37 -0500 Received: by mail-wr0-x242.google.com with SMTP id p104so14512483wrc.12 for ; Fri, 23 Feb 2018 07:42:36 -0800 (PST) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id u136sm2064838wmf.5.2018.02.23.07.42.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Feb 2018 07:42:32 -0800 (PST) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id A30D23E0368; Fri, 23 Feb 2018 15:36:38 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Y+SevaV0I8K52At9O9YUAdbtnZ7m/wazFGCi+POXB38=; b=YP86D0or7Ss+Ir6eBZhtJZImjnlPEvXdPpmvutDWSArzoRFQMPqYzmA9kKGEGJ4pqB +TDvn7V5BqH7jxnbUhyy2v/d/E+VBEE/J3mBPGs+JnpEqsehf+b+MNwO1pThUHn39YjU Ns0WPYPMYbJGI6fxhjT+0TIGI8FS2Z4jxCLuM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Y+SevaV0I8K52At9O9YUAdbtnZ7m/wazFGCi+POXB38=; b=bYt9GiETH2aW1jxeDx/Fmne/evtDUP7LTh1KcP9yj+tkBY1L/GkVvjgPkQejb7xl8B OSYoWyAxRFEBuQy2Qh0bKPlY6CBpNwU09tXl214eV2nVILnuQGUlDAsSlH58W2Wc/hS2 1Ect8LWQYRIT7QfGU15rtqMIclEukqsmvqR7s31YmY4XoONoKfBU0OijKPX/A26RwnE/ A1qy34ZoL8HqMEWqRjkyUgOaVCB630r0IxklknRNgBLj6Yu6IBPINbqB0BomkQybYy9/ vKXfhJ/RHGXf6LNA3BJONIjuEQzeUW4DUM796z5OrXFDJEZA3QEUGpZYsoOLOTwwNgaa mP3w== X-Gm-Message-State: APf1xPCvMfT31sIO1QzwlFJHPtWNWR4mOEgALWbCQe5OjZm6rlGggUyL D82N1whRH3DuECV9YRpEyToq5w== X-Google-Smtp-Source: AH8x225+kr907pE3pqrWm25cT0ubNPC5G1U4/XLZWXvYVbkEu22QFf/LnN1L++haqdGYLT6PPYWFRg== X-Received: by 10.223.138.251 with SMTP id z56mr2041100wrz.196.1519400555788; Fri, 23 Feb 2018 07:42:35 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-arm@nongnu.org Date: Fri, 23 Feb 2018 15:36:33 +0000 Message-Id: <20180223153636.29809-29-alex.bennee@linaro.org> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180223153636.29809-1-alex.bennee@linaro.org> References: <20180223153636.29809-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::242 Subject: [Qemu-devel] [PATCH v3 28/31] arm/translate-a64: add FP16 FMOV to simd_mod_imm X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , richard.henderson@linaro.org, qemu-devel@nongnu.org, Peter Maydell Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Only one half-precision instruction has been added to this group. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- v2 - checkpatch fixes v3 - use vfp_expand_imm --- target/arm/translate-a64.c | 35 +++++++++++++++++++++++++---------- 1 file changed, 25 insertions(+), 10 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index faec8084fa..806f2eb34a 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -6234,6 +6234,8 @@ static void disas_simd_copy(DisasContext *s, uint32_t= insn) * MVNI - move inverted (shifted) imm into register * ORR - bitwise OR of (shifted) imm with register * BIC - bitwise clear of (shifted) imm with register + * With ARMv8.2 we also have: + * FMOV half-precision */ static void disas_simd_mod_imm(DisasContext *s, uint32_t insn) { @@ -6248,8 +6250,11 @@ static void disas_simd_mod_imm(DisasContext *s, uint= 32_t insn) uint64_t imm =3D 0; =20 if (o2 !=3D 0 || ((cmode =3D=3D 0xf) && is_neg && !is_q)) { - unallocated_encoding(s); - return; + /* Check for FMOV (vector, immediate) - half-precision */ + if (!(arm_dc_feature(s, ARM_FEATURE_V8_FP16) && o2 && cmode =3D=3D= 0xf)) { + unallocated_encoding(s); + return; + } } =20 if (!fp_access_check(s)) { @@ -6307,19 +6312,29 @@ static void disas_simd_mod_imm(DisasContext *s, uin= t32_t insn) imm |=3D 0x4000000000000000ULL; } } else { - imm =3D (abcdefgh & 0x3f) << 19; - if (abcdefgh & 0x80) { - imm |=3D 0x80000000; - } - if (abcdefgh & 0x40) { - imm |=3D 0x3e000000; + if (o2) { + /* FMOV (vector, immediate) - half-precision */ + imm =3D vfp_expand_imm(MO_16, abcdefgh); + /* now duplicate across the lanes */ + imm =3D bitfield_replicate(imm, 16); } else { - imm |=3D 0x40000000; + imm =3D (abcdefgh & 0x3f) << 19; + if (abcdefgh & 0x80) { + imm |=3D 0x80000000; + } + if (abcdefgh & 0x40) { + imm |=3D 0x3e000000; + } else { + imm |=3D 0x40000000; + } + imm |=3D (imm << 32); } - imm |=3D (imm << 32); } } break; + default: + fprintf(stderr, "%s: cmode_3_1: %x\n", __func__, cmode_3_1); + g_assert_not_reached(); } =20 if (cmode_3_1 !=3D 7 && is_neg) { --=20 2.15.1