From nobody Fri Oct 24 09:43:23 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1519401467715851.2889248239408; Fri, 23 Feb 2018 07:57:47 -0800 (PST) Received: from localhost ([::1]:45378 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1epFjG-0005LN-0m for importer@patchew.org; Fri, 23 Feb 2018 10:57:46 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46162) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1epFUp-0000Af-TP for qemu-devel@nongnu.org; Fri, 23 Feb 2018 10:42:53 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1epFUo-00061Q-Ov for qemu-devel@nongnu.org; Fri, 23 Feb 2018 10:42:51 -0500 Received: from mail-wr0-x243.google.com ([2a00:1450:400c:c0c::243]:44724) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1epFUo-0005zP-Ez for qemu-devel@nongnu.org; Fri, 23 Feb 2018 10:42:50 -0500 Received: by mail-wr0-x243.google.com with SMTP id v65so14511241wrc.11 for ; Fri, 23 Feb 2018 07:42:50 -0800 (PST) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id 59sm2515666wro.6.2018.02.23.07.42.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Feb 2018 07:42:40 -0800 (PST) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 90A353E0B56; Fri, 23 Feb 2018 15:36:37 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MVcA0CLYZrUGcMmACLz9WCZeG9JO/fx0toAB+aqDvno=; b=AfpvSQQecYGG9NU6qgZYaFk9K8FLkU7x2fJDVyBP1CJhEkQqhEIWj1Ayq0W5lgl7YG T/6YYyekZ4Jg4wEKs9NEjzHwnDVaPiuW2hSezixoa6VxtsH6NZT91KhJo2K4r6tGcxba Cwn/QsPSt3Z7lAXLQLXzQmUS6gYht/z7ZVQO8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MVcA0CLYZrUGcMmACLz9WCZeG9JO/fx0toAB+aqDvno=; b=g7ZGZFZvEiD0NadjKJtYvlfuPQWUQ1E7kRu1YTD1ppRmKYxf3c0z0kAtlRhc4F50EC 6YPOwmWZ3zLO0rdfxef8UGMwm9lQk5UF6CHVYrwMeQzfFQsnJjR15Nu/iZ5R1SntFdJF MIdfGdYOc9kmgofHzduhoQ52ICqmrbVtgRD49suFihB8XOWHYbIIgX8LFxT872XkM+Lt VSuU+LxcwNuM5nu3NlkaD7FmaObLm1F08VgL7WZKAX/QTuacgn8fD0Lx+SQkH5sfPifp BjgkEvZSKeFXc5ZbjPs+iTRCRBOyw1JcVHrGCKfcq1P93w/b/aOu1UquQ0+DYDu+/yRu T3SA== X-Gm-Message-State: APf1xPBn9qFCnt1GggqF8OFeXrnuPWieuoDPrv2cxlLGW1qDBdbHFtvk woD3pkE6SutWT7CngWg8rbOGFQ== X-Google-Smtp-Source: AH8x226X8oHfc9d2BzcBXs3+5lZ6jo7DikMKEol2vSTOidnzWKB8RFxl6WYViarJCKVxJsJdBkWs7g== X-Received: by 10.223.145.226 with SMTP id 89mr1962874wri.262.1519400569324; Fri, 23 Feb 2018 07:42:49 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-arm@nongnu.org Date: Fri, 23 Feb 2018 15:36:19 +0000 Message-Id: <20180223153636.29809-15-alex.bennee@linaro.org> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180223153636.29809-1-alex.bennee@linaro.org> References: <20180223153636.29809-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::243 Subject: [Qemu-devel] [PATCH v3 14/31] arm/translate-a64: add FP16 FMULX/MLS/FMLA to simd_indexed X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , richard.henderson@linaro.org, qemu-devel@nongnu.org, Peter Maydell Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 The helpers use the new re-factored muladd support in SoftFloat for the float16 work. Signed-off-by: Alex Benn=C3=A9e --- v3 - re-jigged switch statement to fall-through for unalloc - added is_fp16 bool for fpst - fixed up some long lines --- target/arm/translate-a64.c | 83 +++++++++++++++++++++++++++++++++++++-----= ---- 1 file changed, 67 insertions(+), 16 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index e96e6cdd15..43bff5cd09 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -11198,6 +11198,7 @@ static void disas_simd_indexed(DisasContext *s, uin= t32_t insn) int rd =3D extract32(insn, 0, 5); bool is_long =3D false; bool is_fp =3D false; + bool is_fp16 =3D false; int index; TCGv_ptr fpst; =20 @@ -11244,7 +11245,8 @@ static void disas_simd_indexed(DisasContext *s, uin= t32_t insn) } /* fall through */ case 0x9: /* FMUL, FMULX */ - if (!extract32(size, 1, 1)) { + if (size =3D=3D 1 || + (size < 2 && !arm_dc_feature(s, ARM_FEATURE_V8_FP16))) { unallocated_encoding(s); return; } @@ -11256,18 +11258,34 @@ static void disas_simd_indexed(DisasContext *s, u= int32_t insn) } =20 if (is_fp) { - /* low bit of size indicates single/double */ - size =3D extract32(size, 0, 1) ? 3 : 2; - if (size =3D=3D 2) { + /* convert insn encoded size to TCGMemOp size */ + switch (size) { + case 2: /* single precision */ + size =3D MO_32; index =3D h << 1 | l; - } else { + rm |=3D (m << 4); + break; + case 3: /* double precision */ + size =3D MO_64; if (l || !is_q) { unallocated_encoding(s); return; } index =3D h; + rm |=3D (m << 4); + break; + case 0: /* half precision */ + size =3D MO_16; + index =3D h << 2 | l << 1 | m; + is_fp16 =3D true; + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: /* unallocated */ + unallocated_encoding(s); + return; } - rm |=3D (m << 4); } else { switch (size) { case 1: @@ -11288,7 +11306,7 @@ static void disas_simd_indexed(DisasContext *s, uin= t32_t insn) } =20 if (is_fp) { - fpst =3D get_fpstatus_ptr(false); + fpst =3D get_fpstatus_ptr(is_fp16); } else { fpst =3D NULL; } @@ -11390,18 +11408,51 @@ static void disas_simd_indexed(DisasContext *s, u= int32_t insn) break; } case 0x5: /* FMLS */ - /* As usual for ARM, separate negation for fused multiply-= add */ - gen_helper_vfp_negs(tcg_op, tcg_op); - /* fall through */ case 0x1: /* FMLA */ - read_vec_element_i32(s, tcg_res, rd, pass, MO_32); - gen_helper_vfp_muladds(tcg_res, tcg_op, tcg_idx, tcg_res, = fpst); + read_vec_element_i32(s, tcg_res, rd, pass, + is_scalar ? size : MO_32); + switch (size) { + case 1: + if (opcode =3D=3D 0x5) { + /* As usual for ARM, separate negation for fused + * multiply-add */ + tcg_gen_xori_i32(tcg_op, tcg_op, 0x80008000); + } + gen_helper_advsimd_muladdh(tcg_res, tcg_op, tcg_idx, + tcg_res, fpst); + break; + case 2: + if (opcode =3D=3D 0x5) { + /* As usual for ARM, separate negation for + * fused multiply-add */ + tcg_gen_xori_i32(tcg_op, tcg_op, 0x80000000); + } + gen_helper_vfp_muladds(tcg_res, tcg_op, tcg_idx, + tcg_res, fpst); + break; + default: + g_assert_not_reached(); + } break; case 0x9: /* FMUL, FMULX */ - if (u) { - gen_helper_vfp_mulxs(tcg_res, tcg_op, tcg_idx, fpst); - } else { - gen_helper_vfp_muls(tcg_res, tcg_op, tcg_idx, fpst); + switch (size) { + case 1: + if (u) { + gen_helper_advsimd_mulxh(tcg_res, tcg_op, tcg_idx, + fpst); + } else { + g_assert_not_reached(); + } + break; + case 2: + if (u) { + gen_helper_vfp_mulxs(tcg_res, tcg_op, tcg_idx, fps= t); + } else { + gen_helper_vfp_muls(tcg_res, tcg_op, tcg_idx, fpst= ); + } + break; + default: + g_assert_not_reached(); } break; case 0xc: /* SQDMULH */ --=20 2.15.1