From nobody Fri Oct 24 09:38:24 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1519400864228613.2838461795609; Fri, 23 Feb 2018 07:47:44 -0800 (PST) Received: from localhost ([::1]:45305 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1epFZX-0004QO-Bw for importer@patchew.org; Fri, 23 Feb 2018 10:47:43 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44487) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1epFP3-0002t1-4u for qemu-devel@nongnu.org; Fri, 23 Feb 2018 10:36:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1epFP1-0007Jb-8I for qemu-devel@nongnu.org; Fri, 23 Feb 2018 10:36:53 -0500 Received: from mail-wm0-x241.google.com ([2a00:1450:400c:c09::241]:54568) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1epFP1-0007GW-2i for qemu-devel@nongnu.org; Fri, 23 Feb 2018 10:36:51 -0500 Received: by mail-wm0-x241.google.com with SMTP id z81so5393491wmb.4 for ; Fri, 23 Feb 2018 07:36:50 -0800 (PST) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id b136sm1924060wme.34.2018.02.23.07.36.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Feb 2018 07:36:42 -0800 (PST) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 310043E06B0; Fri, 23 Feb 2018 15:36:37 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=o5+6wz+aEOUl6k83db9fdFtzMNltkGU6ZiUGBUHl+ho=; b=A/1Toq+u5bk82t6Li7mI8XHYnMBy4J5UudL8kFh48UMsgiwGHVT9cfBsCZlNlwXgSa gxXQ5GXeaxdIwDNRsgLQzYTBkKB3FBtEVbbW9ZMrhX+8FFyditmEXHpfznaBLoY1MEz+ GfjpEuFFhlFm5058DZFUpxjObeQbmH7kG2fGE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=o5+6wz+aEOUl6k83db9fdFtzMNltkGU6ZiUGBUHl+ho=; b=MWFVnHVBbYz8HApQDCvsV2A39tpbn/nusyClOmlRdDI1I8vJJXojkvCGNYY5NfVedw HAObxA73ziWtw4CjaXfOgooFOGbKgMUgzuXcwDkzoKM+YMUyYb/TsSpDY8y8aVM2tdhp +yZEA64mIF/jNDNPb/UBiqNa+DwpYhDzbv4lHLAbrHxUmg4bS3DVFBRLNikB+JmTrkyW 5CNOSYb9PHlMJ+EcHdgz/NBklmCXZp9HZozTrnRf4N0hY6rXut9T9btpiRuzBhIfV6tx 8gv5gtwcLSrGxTQcg/pOSS7WXb5uEZK3pJddI7vearHQcSltP4G2qzA9ZUUoyXoEX5rI 3SyQ== X-Gm-Message-State: APf1xPCiAgyrctx7mUjxt1B+SlvzQ2pIvLB8RNS5/9NGkztzZZUIK1wt 76wwpgY5sJuVNOWaU9gVTpAqYQ== X-Google-Smtp-Source: AG47ELu2CKGzsODWFZJBtvPj33MQsmt4lST1Z+vG9rPXiaFrMsw0VWBsYKakVl9PZ8qTsqmwQKzZxQ== X-Received: by 10.28.238.132 with SMTP id j4mr2178784wmi.73.1519400209881; Fri, 23 Feb 2018 07:36:49 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-arm@nongnu.org Date: Fri, 23 Feb 2018 15:36:14 +0000 Message-Id: <20180223153636.29809-10-alex.bennee@linaro.org> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180223153636.29809-1-alex.bennee@linaro.org> References: <20180223153636.29809-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c09::241 Subject: [Qemu-devel] [PATCH v3 09/31] arm/translate-a64: add FP16 FADD/FABD/FSUB/FMUL/FDIV to simd_three_reg_same_fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , richard.henderson@linaro.org, qemu-devel@nongnu.org, Peter Maydell Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 The fprintf is only there for debugging as the skeleton is added to, it will be removed once the skeleton is complete. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- v2 - add absh helper - fix checkpatch violation - make abs a bitwise operation --- target/arm/helper-a64.c | 4 ++++ target/arm/helper-a64.h | 4 ++++ target/arm/translate-a64.c | 28 ++++++++++++++++++++++++++++ 3 files changed, 36 insertions(+) diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index fddd5d242b..931a6d3c34 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -586,6 +586,10 @@ float16 ADVSIMD_HELPER(name, h)(float16 a, float16 b, = void *fpstp) \ return float16_ ## name(a, b, fpst); \ } =20 +ADVSIMD_HALFOP(add) +ADVSIMD_HALFOP(sub) +ADVSIMD_HALFOP(mul) +ADVSIMD_HALFOP(div) ADVSIMD_HALFOP(min) ADVSIMD_HALFOP(max) ADVSIMD_HALFOP(minnum) diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h index cb2a73124d..bac9469426 100644 --- a/target/arm/helper-a64.h +++ b/target/arm/helper-a64.h @@ -52,3 +52,7 @@ DEF_HELPER_FLAGS_3(advsimd_maxh, TCG_CALL_NO_RWG, f16, f1= 6, f16, ptr) DEF_HELPER_FLAGS_3(advsimd_minh, TCG_CALL_NO_RWG, f16, f16, f16, ptr) DEF_HELPER_FLAGS_3(advsimd_maxnumh, TCG_CALL_NO_RWG, f16, f16, f16, ptr) DEF_HELPER_FLAGS_3(advsimd_minnumh, TCG_CALL_NO_RWG, f16, f16, f16, ptr) +DEF_HELPER_3(advsimd_addh, f16, f16, f16, ptr) +DEF_HELPER_3(advsimd_subh, f16, f16, f16, ptr) +DEF_HELPER_3(advsimd_mulh, f16, f16, f16, ptr) +DEF_HELPER_3(advsimd_divh, f16, f16, f16, ptr) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 4828457b5b..f8770ee1e9 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -10283,6 +10283,34 @@ static void disas_simd_three_reg_same_fp16(DisasCo= ntext *s, uint32_t insn) read_vec_element_i32(s, tcg_op2, rm, pass, MO_16); =20 switch (fpopcode) { + case 0x0: /* FMAXNM */ + gen_helper_advsimd_maxnumh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x2: /* FADD */ + gen_helper_advsimd_addh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x6: /* FMAX */ + gen_helper_advsimd_maxh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x8: /* FMINNM */ + gen_helper_advsimd_minnumh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0xa: /* FSUB */ + gen_helper_advsimd_subh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0xe: /* FMIN */ + gen_helper_advsimd_minh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x13: /* FMUL */ + gen_helper_advsimd_mulh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x17: /* FDIV */ + gen_helper_advsimd_divh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x1a: /* FABD */ + gen_helper_advsimd_subh(tcg_res, tcg_op1, tcg_op2, fpst); + tcg_gen_andi_i32(tcg_res, tcg_res, 0x7fff); + break; default: fprintf(stderr, "%s: insn %#04x, fpop %#2x @ %#" PRIx64 "\n", __func__, insn, fpopcode, s->pc); --=20 2.15.1