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Mon, 19 Feb 2018 01:19:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1enenf-0007Qf-1Y for qemu-devel@nongnu.org; Mon, 19 Feb 2018 01:19:46 -0500 Received: from mout.kundenserver.de ([212.227.17.10]:51453) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1enene-0007QI-Nf for qemu-devel@nongnu.org; Mon, 19 Feb 2018 01:19:42 -0500 Received: from localhost.localdomain ([178.239.76.114]) by mrelayeu.kundenserver.de (mreue103 [212.227.15.183]) with ESMTPSA (Nemesis) id 0LeS5t-1eQwUA01iH-00qEfi; Mon, 19 Feb 2018 07:19:39 +0100 From: David Brenken To: qemu-devel@nongnu.org Date: Mon, 19 Feb 2018 07:18:23 +0100 Message-Id: <20180219061827.2112-2-david.brenken@efs-auto.org> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20180219061827.2112-1-david.brenken@efs-auto.org> References: <20180219061827.2112-1-david.brenken@efs-auto.org> X-Provags-ID: V03:K0:FNmhLE3VfIkxeQJSo8AEy2dYj9EYSzojdPs5tNtda9lIyLyB3Gi 8K+B7cfiuj6Uv7iKpuxehoUUV9YsWjMaOu4EGI+MkHAnOG/8/TA6tGmDWz7V/yJPd9iJ/NX ae0JDxu/llbPII+7n/o0jCV6bKzLtupEX6OXCxxHjA1tzClHbaM07gYk567fnQuWx/iguVh LpgremG6r7/zvkIVsSHIQ== X-UI-Out-Filterresults: notjunk:1;V01:K0:tKo9bRsr7DE=:J7zSYDjYiotwJNfgmK/dqo 9+0UAU5yPqG9l0IS0cCv8uZJ5kmtKu0NVYjME2Ixfoo3Yae0Zk1jWT4EyEIrvMCsgaggHrg7k vI5vlJjdrBwNVF73roP3lel7lThy+n6VIBAFpgNyGZpc6dHqq5WWIaCz++nJlKYJLln2eF+vI PtXmjfHaS9+3RzsyhtyoPEwjeCEf3G4hIeyMCgti8+C7nxsX+d1zHisyWBQq61jGyzje04Mjx HXXpbs5ZyiHsOm3PedcXVOxU2MpfdVcAu/PDeArgnv7bYgrM9ix78u+mgALUHGPRr5skwYEzA A7I8evAYFkp8zUuwhKjyMd77HmLU6yX2kTlrUBDLw0EqX1wA5KDQCRyXFVcdT3mHtAAW/Z03u D0mMCYFPUAjiSCSpIndfLlVpWRDm/MD+ef+gIZX6pK1r6IStdDgu1kUWymiFJiZ7Fj6I0ub0s 64ete/wLVRTS79o1y7TEqruMcAaL3WSx0zdJL1VAa0rcLZNqWS1Wxjt5g6tPj9ntUDuMJ1cYG e636PKcFEDtL85b/ZoQOEM+7zcX2y4zMZRxAMmnu0j1Fuf6jRpYAlY0lJ8v6f9a+mGkNR0Vxd u+/2qOjLjopYdbSTYbJeKLp2duy8wk6WMU3CV3iHtG1rDDJMy0MKZF2PNyZCvwPAE/n6kv4Kh eCfAUxBjUVQCIjfgFEQCHLwumBh+9cmLckZjh3YfHBzx79PTtGLrZbBvh5+jPhKw4AnvyL+at FHh0O5/be0Dj6OnPAkyIsf3gYgJf8RWO5vzPOg== X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.17.10 X-Mailman-Approved-At: Mon, 19 Feb 2018 08:23:07 -0500 Subject: [Qemu-devel] [PATCH 1/5] tricore: added some missing cpu instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kbastian@mail.uni-paderborn.de, Florian Artmeier , David Brenken , Georg Hofstetter Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: David Brenken Signed-off-by: David Brenken Signed-off-by: Georg Hofstetter Signed-off-by: Florian Artmeier --- target/tricore/translate.c | 22 ++++++++++++++++++++++ target/tricore/tricore-opcodes.h | 4 ++++ 2 files changed, 26 insertions(+) diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 4e5b083..959697f 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -3389,10 +3389,18 @@ static void gen_compute_branch(DisasContext *ctx, u= int32_t opc, int r1, gen_branch_cond(ctx, TCG_COND_EQ, cpu_gpr_d[r1], cpu_gpr_d[15], offset); break; + case OPC1_16_SBR_JEQ2: + gen_branch_cond(ctx, TCG_COND_EQ, cpu_gpr_d[r1], cpu_gpr_d[15], + offset + 16); + break; case OPC1_16_SBR_JNE: gen_branch_cond(ctx, TCG_COND_NE, cpu_gpr_d[r1], cpu_gpr_d[15], offset); break; + case OPC1_16_SBR_JNE2: + gen_branch_cond(ctx, TCG_COND_NE, cpu_gpr_d[r1], cpu_gpr_d[15], + offset + 16); + break; case OPC1_16_SBR_JNZ: gen_branch_condi(ctx, TCG_COND_NE, cpu_gpr_d[r1], 0, offset); break; @@ -4089,6 +4097,10 @@ static void decode_16Bit_opc(CPUTriCoreState *env, D= isasContext *ctx) gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[15], const16 * 4, MO_L= ESL); break; /* SB-format */ + case OPC1_16_SB_JNE: + address =3D MASK_OP_SBC_DISP4(ctx->opcode); + gen_compute_branch(ctx, op1, 0, 0, 0, address); + break; case OPC1_16_SB_CALL: case OPC1_16_SB_J: case OPC1_16_SB_JNZ: @@ -4122,6 +4134,7 @@ static void decode_16Bit_opc(CPUTriCoreState *env, Di= sasContext *ctx) break; /* SBR-format */ case OPC1_16_SBR_JEQ: + case OPC1_16_SBR_JEQ2: case OPC1_16_SBR_JGEZ: case OPC1_16_SBR_JGTZ: case OPC1_16_SBR_JLEZ: @@ -6256,6 +6269,15 @@ static void decode_rr_accumulator(CPUTriCoreState *e= nv, DisasContext *ctx) generate_trap(ctx, TRAPC_INSN_ERR, TIN2_IOPC); } break; + case OPC2_32_RR_MOVS_64: + if (tricore_feature(env, TRICORE_FEATURE_16)) { + CHECK_REG_PAIR(r3); + tcg_gen_mov_tl(cpu_gpr_d[r3], cpu_gpr_d[r2]); + tcg_gen_sari_tl(cpu_gpr_d[r3 + 1], cpu_gpr_d[r2], 31); + } else { + generate_trap(ctx, TRAPC_INSN_ERR, TIN2_IOPC); + } + break; case OPC2_32_RR_NE: tcg_gen_setcond_tl(TCG_COND_NE, cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); diff --git a/target/tricore/tricore-opcodes.h b/target/tricore/tricore-opco= des.h index 08394b8..600785e 100644 --- a/target/tricore/tricore-opcodes.h +++ b/target/tricore/tricore-opcodes.h @@ -313,6 +313,7 @@ enum { OPC1_16_SBC_JEQ =3D 0x1e, OPC1_16_SBC_JEQ2 =3D 0x9e, OPC1_16_SBR_JEQ =3D 0x3e, + OPC1_16_SBR_JEQ2 =3D 0xbe, OPC1_16_SBR_JGEZ =3D 0xce, OPC1_16_SBR_JGTZ =3D 0x4e, OPC1_16_SR_JI =3D 0xdc, @@ -321,11 +322,13 @@ enum { OPC1_16_SBC_JNE =3D 0x5e, OPC1_16_SBC_JNE2 =3D 0xde, OPC1_16_SBR_JNE =3D 0x7e, + OPC1_16_SBR_JNE2 =3D 0xfe, OPC1_16_SB_JNZ =3D 0xee, OPC1_16_SBR_JNZ =3D 0xf6, OPC1_16_SBR_JNZ_A =3D 0x7c, OPC1_16_SBRN_JNZ_T =3D 0xae, OPC1_16_SB_JZ =3D 0x6e, + OPC1_16_SB_JNE =3D 0xfe, OPC1_16_SBR_JZ =3D 0x76, OPC1_16_SBR_JZ_A =3D 0xbc, OPC1_16_SBRN_JZ_T =3D 0x2e, @@ -1064,6 +1067,7 @@ enum { OPC2_32_RR_MIN_H =3D 0x78, OPC2_32_RR_MIN_HU =3D 0x79, OPC2_32_RR_MOV =3D 0x1f, + OPC2_32_RR_MOVS_64 =3D 0x80, OPC2_32_RR_MOV_64 =3D 0x81, OPC2_32_RR_NE =3D 0x11, OPC2_32_RR_OR_EQ =3D 0x27, --=20 2.7.4