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X-Received-From: 2607:f8b0:400e:c05::242 Subject: [Qemu-devel] [PATCH 15/19] target/hppa: Convert fp indexed memory insns X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- target/hppa/translate.c | 93 --------------------------------------------= ---- target/hppa/insns.decode | 21 +++++++++++ 2 files changed, 21 insertions(+), 93 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 6f97f7330e..1973923a18 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -861,15 +861,6 @@ static void gen_goto_tb(DisasContext *ctx, int which, } } =20 -/* PA has a habit of taking the LSB of a field and using that as the sign, - with the rest of the field becoming the least significant bits. */ -static target_sreg low_sextract(uint32_t val, int pos, int len) -{ - target_ureg x =3D -(target_ureg)extract32(val, pos, 1); - x =3D (x << (len - 1)) | extract32(val, pos + 1, len - 1); - return x; -} - static unsigned assemble_rt64(uint32_t insn) { unsigned r1 =3D extract32(insn, 6, 1); @@ -2982,84 +2973,6 @@ static void trans_ldo(DisasContext *ctx, arg_ldo *a,= uint32_t insn) cond_free(&ctx->null_cond); } =20 -static void trans_copr_w(DisasContext *ctx, uint32_t insn) -{ - unsigned t0 =3D extract32(insn, 0, 5); - unsigned m =3D extract32(insn, 5, 1); - unsigned t1 =3D extract32(insn, 6, 1); - unsigned ext3 =3D extract32(insn, 7, 3); - /* unsigned cc =3D extract32(insn, 10, 2); */ - unsigned i =3D extract32(insn, 12, 1); - unsigned ua =3D extract32(insn, 13, 1); - unsigned sp =3D extract32(insn, 14, 2); - unsigned rx =3D extract32(insn, 16, 5); - unsigned rb =3D extract32(insn, 21, 5); - unsigned rt =3D t1 * 32 + t0; - int modify =3D (m ? (ua ? -1 : 1) : 0); - int disp, scale; - - if (i =3D=3D 0) { - scale =3D (ua ? 2 : 0); - disp =3D 0; - modify =3D m; - } else { - disp =3D low_sextract(rx, 0, 5); - scale =3D 0; - rx =3D 0; - modify =3D (m ? (ua ? -1 : 1) : 0); - } - - switch (ext3) { - case 0: /* FLDW */ - do_floadw(ctx, rt, rb, rx, scale, disp, sp, modify); - break; - case 4: /* FSTW */ - do_fstorew(ctx, rt, rb, rx, scale, disp, sp, modify); - break; - default: - gen_illegal(ctx); - break; - } -} - -static void trans_copr_dw(DisasContext *ctx, uint32_t insn) -{ - unsigned rt =3D extract32(insn, 0, 5); - unsigned m =3D extract32(insn, 5, 1); - unsigned ext4 =3D extract32(insn, 6, 4); - /* unsigned cc =3D extract32(insn, 10, 2); */ - unsigned i =3D extract32(insn, 12, 1); - unsigned ua =3D extract32(insn, 13, 1); - unsigned sp =3D extract32(insn, 14, 2); - unsigned rx =3D extract32(insn, 16, 5); - unsigned rb =3D extract32(insn, 21, 5); - int modify =3D (m ? (ua ? -1 : 1) : 0); - int disp, scale; - - if (i =3D=3D 0) { - scale =3D (ua ? 3 : 0); - disp =3D 0; - modify =3D m; - } else { - disp =3D low_sextract(rx, 0, 5); - scale =3D 0; - rx =3D 0; - modify =3D (m ? (ua ? -1 : 1) : 0); - } - - switch (ext4) { - case 0: /* FLDD */ - do_floadd(ctx, rt, rb, rx, scale, disp, sp, modify); - break; - case 8: /* FSTD */ - do_fstored(ctx, rt, rb, rx, scale, disp, sp, modify); - break; - default: - gen_illegal(ctx); - break; - } -} - static void do_cmpb(DisasContext *ctx, unsigned r, TCGv_reg in1, unsigned c, unsigned f, unsigned n, int disp) { @@ -4203,12 +4116,6 @@ static void translate_one(DisasContext *ctx, uint32_= t insn) =20 opc =3D extract32(insn, 26, 6); switch (opc) { - case 0x09: - trans_copr_w(ctx, insn); - return; - case 0x0B: - trans_copr_dw(ctx, insn); - return; case 0x0C: translate_table(ctx, insn, table_float_0c); return; diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode index 9a51e59de0..1e4579e080 100644 --- a/target/hppa/insns.decode +++ b/target/hppa/insns.decode @@ -38,6 +38,7 @@ %sm_imm 16:10 !function=3Dexpand_sm_imm =20 %rm64 1:1 16:5 +%rt64 6:1 0:5 =20 %im5_0 0:s1 1:4 %im5_16 16:s1 17:4 @@ -193,6 +194,26 @@ lda 000011 ..... ..... .. . 0 -- 0110 ...... @ld= stx size=3D2 sta 000011 ..... ..... .. . 1 -- 1110 ...... @stim5 size=3D2 stby 000011 b:5 r:5 sp:2 a:1 1 -- 1100 m:1 ..... disp=3D%im5_0 =20 +@fldstwx ...... b:5 x:5 sp:2 scale:1 ....... m:1 ..... \ + &ldst t=3D%rt64 disp=3D0 size=3D2 +@fldstwi ...... b:5 ..... sp:2 . ....... . ..... \ + &ldst t=3D%rt64 disp=3D%im5_16 m=3D%ma_to_m x=3D0 scale=3D0 size=3D2 + +fldw 001001 ..... ..... .. . 0 -- 000 . . ..... @fldstwx +fldw 001001 ..... ..... .. . 1 -- 000 . . ..... @fldstwi +fstw 001001 ..... ..... .. . 0 -- 100 . . ..... @fldstwx +fstw 001001 ..... ..... .. . 1 -- 100 . . ..... @fldstwi + +@fldstdx ...... b:5 x:5 sp:2 scale:1 ....... m:1 t:5 \ + &ldst disp=3D0 size=3D3 +@fldstdi ...... b:5 ..... sp:2 . ....... . t:5 \ + &ldst disp=3D%im5_16 m=3D%ma_to_m x=3D0 scale=3D0 size=3D3 + +fldd 001011 ..... ..... .. . 0 -- 000 0 . ..... @fldstdx +fldd 001011 ..... ..... .. . 1 -- 000 0 . ..... @fldstdi +fstd 001011 ..... ..... .. . 0 -- 100 0 . ..... @fldstdx +fstd 001011 ..... ..... .. . 1 -- 100 0 . ..... @fldstdi + #### # Offset Mem #### --=20 2.14.3