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X-Received-From: 2607:f8b0:400e:c01::241 Subject: [Qemu-devel] [PATCH 09/19] target/hppa: Convert fp multiply-add X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- target/hppa/translate.c | 69 ++++++++++++++++++++++++++++----------------= ---- target/hppa/insns.decode | 12 +++++++++ 2 files changed, 52 insertions(+), 29 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 792e838849..1cfdbf6296 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -4234,37 +4234,54 @@ static inline int fmpyadd_s_reg(unsigned r) return (r & 16) * 2 + 16 + (r & 15); } =20 -static void trans_fmpyadd(DisasContext *ctx, uint32_t insn, bool is_sub) +static void do_fmpyadd_s(DisasContext *ctx, arg_mpyadd *a, bool is_sub) { - unsigned tm =3D extract32(insn, 0, 5); - unsigned f =3D extract32(insn, 5, 1); - unsigned ra =3D extract32(insn, 6, 5); - unsigned ta =3D extract32(insn, 11, 5); - unsigned rm2 =3D extract32(insn, 16, 5); - unsigned rm1 =3D extract32(insn, 21, 5); + int tm =3D fmpyadd_s_reg(a->tm); + int ra =3D fmpyadd_s_reg(a->ra); + int ta =3D fmpyadd_s_reg(a->ta); + int rm2 =3D fmpyadd_s_reg(a->rm2); + int rm1 =3D fmpyadd_s_reg(a->rm1); =20 nullify_over(ctx); =20 - /* Independent multiply & add/sub, with undefined behaviour - if outputs overlap inputs. */ - if (f =3D=3D 0) { - tm =3D fmpyadd_s_reg(tm); - ra =3D fmpyadd_s_reg(ra); - ta =3D fmpyadd_s_reg(ta); - rm2 =3D fmpyadd_s_reg(rm2); - rm1 =3D fmpyadd_s_reg(rm1); - do_fop_weww(ctx, tm, rm1, rm2, gen_helper_fmpy_s); - do_fop_weww(ctx, ta, ta, ra, - is_sub ? gen_helper_fsub_s : gen_helper_fadd_s); - } else { - do_fop_dedd(ctx, tm, rm1, rm2, gen_helper_fmpy_d); - do_fop_dedd(ctx, ta, ta, ra, - is_sub ? gen_helper_fsub_d : gen_helper_fadd_d); - } + do_fop_weww(ctx, tm, rm1, rm2, gen_helper_fmpy_s); + do_fop_weww(ctx, ta, ta, ra, + is_sub ? gen_helper_fsub_s : gen_helper_fadd_s); =20 nullify_end(ctx); } =20 +static void trans_fmpyadd_f(DisasContext *ctx, arg_mpyadd *a, uint32_t ins= n) +{ + do_fmpyadd_s(ctx, a, false); +} + +static void trans_fmpysub_f(DisasContext *ctx, arg_mpyadd *a, uint32_t ins= n) +{ + do_fmpyadd_s(ctx, a, true); +} + +static void do_fmpyadd_d(DisasContext *ctx, arg_mpyadd *a, bool is_sub) +{ + nullify_over(ctx); + + do_fop_dedd(ctx, a->tm, a->rm1, a->rm2, gen_helper_fmpy_d); + do_fop_dedd(ctx, a->ta, a->ta, a->ra, + is_sub ? gen_helper_fsub_d : gen_helper_fadd_d); + + nullify_end(ctx); +} + +static void trans_fmpyadd_d(DisasContext *ctx, arg_mpyadd *a, uint32_t ins= n) +{ + do_fmpyadd_d(ctx, a, false); +} + +static void trans_fmpysub_d(DisasContext *ctx, arg_mpyadd *a, uint32_t ins= n) +{ + do_fmpyadd_d(ctx, a, true); +} + static void trans_fmpyfadd_s(DisasContext *ctx, uint32_t insn, const DisasInsn *di) { @@ -4355,9 +4372,6 @@ static void translate_one(DisasContext *ctx, uint32_t= insn) =20 opc =3D extract32(insn, 26, 6); switch (opc) { - case 0x06: - trans_fmpyadd(ctx, insn, false); - return; case 0x08: trans_ldil(ctx, insn); return; @@ -4435,9 +4449,6 @@ static void translate_one(DisasContext *ctx, uint32_t= insn) case 0x25: trans_subi(ctx, insn); return; - case 0x26: - trans_fmpyadd(ctx, insn, true); - return; case 0x27: trans_cmpb(ctx, insn, true, false, true); return; diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode index 212d12a9c9..5393d30f43 100644 --- a/target/hppa/insns.decode +++ b/target/hppa/insns.decode @@ -151,3 +151,15 @@ lda 000011 ..... ..... .. . 1 -- 0110 ...... @ld= im5 size=3D2 lda 000011 ..... ..... .. . 0 -- 0110 ...... @ldstx size=3D2 sta 000011 ..... ..... .. . 1 -- 1110 ...... @stim5 size=3D2 stby 000011 b:5 r:5 sp:2 a:1 1 -- 1100 m:1 ..... disp=3D%im5_0 + +#### +# Floating-point Multiply Add +#### + +&mpyadd rm1 rm2 ta ra tm +@mpyadd ...... rm1:5 rm2:5 ta:5 ra:5 . tm:5 + +fmpyadd_f 000110 ..... ..... ..... ..... 0 ..... @mpyadd +fmpyadd_d 000110 ..... ..... ..... ..... 1 ..... @mpyadd +fmpysub_f 100110 ..... ..... ..... ..... 0 ..... @mpyadd +fmpysub_d 100110 ..... ..... ..... ..... 1 ..... @mpyadd --=20 2.14.3