From nobody Fri Oct 24 21:45:52 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1518893787306577.9055505528875; Sat, 17 Feb 2018 10:56:27 -0800 (PST) Received: from localhost ([::1]:48326 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1en7es-0001us-Hf for importer@patchew.org; Sat, 17 Feb 2018 13:56:26 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40068) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1en79b-0000hM-OU for qemu-devel@nongnu.org; Sat, 17 Feb 2018 13:24:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1en79a-0001lB-MY for qemu-devel@nongnu.org; Sat, 17 Feb 2018 13:24:07 -0500 Received: from mail-pg0-x243.google.com ([2607:f8b0:400e:c05::243]:43777) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1en79a-0001ks-Gz for qemu-devel@nongnu.org; Sat, 17 Feb 2018 13:24:06 -0500 Received: by mail-pg0-x243.google.com with SMTP id f6so4342993pgs.10 for ; Sat, 17 Feb 2018 10:24:06 -0800 (PST) Received: from cloudburst.twiddle.net ([50.0.192.64]) by smtp.gmail.com with ESMTPSA id h15sm13466712pfi.56.2018.02.17.10.24.03 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 17 Feb 2018 10:24:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=nSNLVT4lf1W1WDzUmj9fhH5V3ch8xkv1gwPhXGeJ6r0=; b=XMEvR+3c4GAUicBd+RM9a/qV1xj0SccDnRWRLh972nZAg6gYVuzi+wWl3Tu3cC8TwB fg63rVue9xMigQqDJBiS76/0vabjcdEQMdtlJ71BjC/JN9ru/dhUUC4Phz8pujpesuUF aseGu2/VROm3JvmJ5H5lAf3gKFBTmE8H2PZWM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=nSNLVT4lf1W1WDzUmj9fhH5V3ch8xkv1gwPhXGeJ6r0=; b=HloNR/NPi1fKJwpoIc34aglffPUt651ymjvia15rIc2zhEql2WxruSqCnMRmvUZ7eZ eoQYnJaRKk+SM5aUsREwjk/ziq3HZb9Csbb5fJArF8IzYMk+EmKycl88STpQsf68KW3/ qObkec7+eRPgIjYfkvAbKRrisJxlHSA6ukZMOY2cgWpmvbmd6T2X/UUQNTu51qoAnrqG eQFwaTg/Q7gaDJ8Iv+jRZC4GKoE23NYOeS37ujoMB1K9Wm81+hCda+oJIPSEXrIeSSPI vw2IhheqxJewoGItHMsNQmObOx+0wIonjhbLONvj7N+vLZJOVmcG6VOc+RlhPjKoEa45 ve3A== X-Gm-Message-State: APf1xPAEqPs2tbADJeaiI9vvjYjxFsCPK5DbHmWmmcOGrolvz6pNeOHz eQ6VZCN8ocgwseDnjBKm2vYYkEIQrUI= X-Google-Smtp-Source: AH8x227IRDdwB84xJH9Oj92FGhPz2iDvmbTQ0wTbP1GIrhsGCOeDYEHg/IM4Kfo69vMoSZlhXiNWgQ== X-Received: by 10.98.200.80 with SMTP id z77mr787317pff.85.1518891845282; Sat, 17 Feb 2018 10:24:05 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sat, 17 Feb 2018 10:22:40 -0800 Message-Id: <20180217182323.25885-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180217182323.25885-1-richard.henderson@linaro.org> References: <20180217182323.25885-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::243 Subject: [Qemu-devel] [PATCH v2 24/67] target/arm: Implement SVE Bitwise Immediate Group X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/translate-sve.c | 50 ++++++++++++++++++++++++++++++++++++++++++= ++++ target/arm/sve.decode | 17 ++++++++++++++++ 2 files changed, 67 insertions(+) diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index 702f20e97b..21b1e4df85 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -34,6 +34,8 @@ #include "translate-a64.h" =20 typedef void GVecGen2Fn(unsigned, uint32_t, uint32_t, uint32_t, uint32_t); +typedef void GVecGen2iFn(unsigned, uint32_t, uint32_t, + int64_t, uint32_t, uint32_t); typedef void GVecGen3Fn(unsigned, uint32_t, uint32_t, uint32_t, uint32_t, uint32_t); =20 @@ -1648,6 +1650,54 @@ static void trans_SINCDEC_v(DisasContext *s, arg_inc= dec2_cnt *a, } } =20 +/* + *** SVE Bitwise Immediate Group + */ + +static void do_zz_dbm(DisasContext *s, arg_rr_dbm *a, GVecGen2iFn *gvec_fn) +{ + unsigned vsz; + uint64_t imm; + + if (!logic_imm_decode_wmask(&imm, extract32(a->dbm, 12, 1), + extract32(a->dbm, 0, 6), + extract32(a->dbm, 6, 6))) { + unallocated_encoding(s); + return; + } + + vsz =3D vec_full_reg_size(s); + gvec_fn(MO_64, vec_full_reg_offset(s, a->rd), + vec_full_reg_offset(s, a->rn), imm, vsz, vsz); +} + +static void trans_AND_zzi(DisasContext *s, arg_rr_dbm *a, uint32_t insn) +{ + do_zz_dbm(s, a, tcg_gen_gvec_andi); +} + +static void trans_ORR_zzi(DisasContext *s, arg_rr_dbm *a, uint32_t insn) +{ + do_zz_dbm(s, a, tcg_gen_gvec_ori); +} + +static void trans_EOR_zzi(DisasContext *s, arg_rr_dbm *a, uint32_t insn) +{ + do_zz_dbm(s, a, tcg_gen_gvec_xori); +} + +static void trans_DUPM(DisasContext *s, arg_DUPM *a, uint32_t insn) +{ + uint64_t imm; + if (!logic_imm_decode_wmask(&imm, extract32(a->dbm, 12, 1), + extract32(a->dbm, 0, 6), + extract32(a->dbm, 6, 6))) { + unallocated_encoding(s); + return; + } + do_dupi_z(s, a->rd, imm); +} + /* *** SVE Memory - 32-bit Gather and Unsized Contiguous Group */ diff --git a/target/arm/sve.decode b/target/arm/sve.decode index 5690b5fcb9..0990d135f4 100644 --- a/target/arm/sve.decode +++ b/target/arm/sve.decode @@ -50,6 +50,7 @@ =20 &rr_esz rd rn esz &rri rd rn imm +&rr_dbm rd rn dbm &rrri rd rn rm imm &rri_esz rd rn imm esz &rrr_esz rd rn rm esz @@ -112,6 +113,10 @@ @rd_rn_tszimm ........ .. ... ... ...... rn:5 rd:5 \ &rri_esz esz=3D%tszimm16_esz =20 +# Two register operand, one encoded bitmask. +@rdn_dbm ........ .. .... dbm:13 rd:5 \ + &rr_dbm rn=3D%reg_movprfx + # Basic Load/Store with 9-bit immediate offset @pd_rn_i9 ........ ........ ...... rn:5 . rd:4 \ &rri imm=3D%imm9_16_10 @@ -331,6 +336,18 @@ INCDEC_v 00000100 .. 1 1 .... 1100 0 d:1 ..... ..... = @incdec2_cnt u=3D1 # Note these require esz !=3D 0. SINCDEC_v 00000100 .. 1 0 .... 1100 d:1 u:1 ..... ..... @incdec2_cnt =20 +### SVE Bitwise Immediate Group + +# SVE bitwise logical with immediate (unpredicated) +ORR_zzi 00000101 00 0000 ............. ..... @rdn_dbm +EOR_zzi 00000101 01 0000 ............. ..... @rdn_dbm +AND_zzi 00000101 10 0000 ............. ..... @rdn_dbm + +# SVE broadcast bitmask immediate +DUPM 00000101 11 0000 dbm:13 rd:5 + +### SVE Predicate Logical Operations Group + # SVE predicate logical operations AND_pppp 00100101 0. 00 .... 01 .... 0 .... 0 .... @pd_pg_pn_pm_s BIC_pppp 00100101 0. 00 .... 01 .... 0 .... 1 .... @pd_pg_pn_pm_s --=20 2.14.3