From nobody Mon Feb 9 23:03:16 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of _spf.google.com designates 209.85.216.195 as permitted sender) client-ip=209.85.216.195; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-qt0-f195.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of _spf.google.com designates 209.85.216.195 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-qt0-f195.google.com (mail-qt0-f195.google.com [209.85.216.195]) by mx.zohomail.com with SMTPS id 1518494924743863.1834223018304; Mon, 12 Feb 2018 20:08:44 -0800 (PST) Received: by mail-qt0-f195.google.com with SMTP id d26so652992qtj.4 for ; Mon, 12 Feb 2018 20:08:44 -0800 (PST) Return-Path: Return-Path: Received: from x1.local ([138.117.48.219]) by smtp.gmail.com with ESMTPSA id q2sm7350435qki.10.2018.02.12.20.08.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 12 Feb 2018 20:08:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=XTZmfXOY6fAvPyNEon7H7ucW/EQvs+p2LBUOUBtkWk8=; b=R6qwbtKf63NA+wran+f4fFiC8BlQE0BtGIxZzTm+t3wcBivE+Bk8fFwSU0y91Gu54e iBC7uos3UZ0hNMEsGbDPbhFYSbIMyDtG29eywcHLh3oVIoLCKcGW7ACbqOYeiDMpMYF3 aOssQCiWkcIKRuvkmSiAdRnY6VYddaO3anwzeH2dnNxkAkmgc8GNWKEj48pw84Idbh3n 3TB9VY7kX076IRwxivkDHJubt4nfpq0GgAEQv4uS/Z2cYFews4QljYjs0iDmvmUm0g3F ebGaTlBsyg2lcHtng7FxTnsw92Nj2Tkqlijp+iy9SbHDW46UOfNTsPZ33FsJWnd63FEP xK0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=XTZmfXOY6fAvPyNEon7H7ucW/EQvs+p2LBUOUBtkWk8=; b=MYoXkC81jQJlQCyMZG13+2jsZrn5cPaVwTkQ6M43MojpakYSugiWv58wsNPSNthLdP vk/zBHplMN4YgkXya6LmcSaZeazAusS+Oob9rZxK53QcpFZdCYPzYoBPrGNfxidMgrgG y0gDldRTHmThYt/i+l3wHnQK2HNilMsvao3tVHLCdoNwYT0j4NllX1pKtWwDDeHcXcEB Y56Ta0y3c+u8U8eVE0iyRGNlep/TP8mDbhc3iaKcoh8MG/Gv7axZuCuU4BZq5ZjpD8e9 GERK/WXnr9G6AS+DcKRBYN3vt75lMPJTTxRufB7oWSFqik3MjraubC5EyKqskeJc5/Ss ECeg== X-Gm-Message-State: APf1xPDACg27o4NzYCxXGD/8HMW3+g3XkK/YC3V6QaY5hXcrUy5ShyAe jOL/Ad2iRQS4SOBhfdSpvlM= X-Google-Smtp-Source: AH8x224pjs1ZluYa0/TkPiT5ZVe19ZAKwy9bUEFwpekqvmaiiFpkZrnbmTKWuxddRztOuiu5mzajMg== X-Received: by 10.200.70.10 with SMTP id p10mr21928584qtn.5.1518494923778; Mon, 12 Feb 2018 20:08:43 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: Paolo Bonzini Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org, Peter Maydell , Alistair Francis , "Edgar E . Iglesias" , Fam Zheng Subject: [PATCH v13 08/30] sdhci: use a numeric value for the default CAPAB register Date: Tue, 13 Feb 2018 01:07:47 -0300 Message-Id: <20180213040809.26021-9-f4bug@amsat.org> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180213040809.26021-1-f4bug@amsat.org> References: <20180213040809.26021-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZohoMail: RDKM_0 RSF_0 Z_629925259 SPT_0 using many #defines is not portable when scaling to different HCI. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis --- hw/sd/sdhci.c | 74 +++++++++++++------------------------------------------= ---- 1 file changed, 16 insertions(+), 58 deletions(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 17a1348f0f..491e624262 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -38,67 +38,25 @@ #define TYPE_SDHCI_BUS "sdhci-bus" #define SDHCI_BUS(obj) OBJECT_CHECK(SDBus, (obj), TYPE_SDHCI_BUS) =20 +#define MASKED_WRITE(reg, mask, val) (reg =3D (reg & (mask)) | (val)) + /* Default SD/MMC host controller features information, which will be * presented in CAPABILITIES register of generic SD host controller at res= et. - * If not stated otherwise: - * 0 - not supported, 1 - supported, other - prohibited. + * + * support: + * - 3.3v and 1.8v voltages + * - SDMA/ADMA1/ADMA2 + * - high-speed + * max host controller R/W buffers size: 512B + * max clock frequency for SDclock: 52 MHz + * timeout clock frequency: 52 MHz + * + * does not support: + * - 3.0v voltage + * - 64-bit system bus + * - suspend/resume */ -#define SDHC_CAPAB_64BITBUS 0ul /* 64-bit System Bus Support = */ -#define SDHC_CAPAB_18V 1ul /* Voltage support 1.8v */ -#define SDHC_CAPAB_30V 0ul /* Voltage support 3.0v */ -#define SDHC_CAPAB_33V 1ul /* Voltage support 3.3v */ -#define SDHC_CAPAB_SUSPRESUME 0ul /* Suspend/resume support */ -#define SDHC_CAPAB_SDMA 1ul /* SDMA support */ -#define SDHC_CAPAB_HIGHSPEED 1ul /* High speed support */ -#define SDHC_CAPAB_ADMA1 1ul /* ADMA1 support */ -#define SDHC_CAPAB_ADMA2 1ul /* ADMA2 support */ -/* Maximum host controller R/W buffers size - * Possible values: 512, 1024, 2048 bytes */ -#define SDHC_CAPAB_MAXBLOCKLENGTH 512ul -/* Maximum clock frequency for SDclock in MHz - * value in range 10-63 MHz, 0 - not defined */ -#define SDHC_CAPAB_BASECLKFREQ 52ul -#define SDHC_CAPAB_TOUNIT 1ul /* Timeout clock unit 0 - kHz, 1 - = MHz */ -/* Timeout clock frequency 1-63, 0 - not defined */ -#define SDHC_CAPAB_TOCLKFREQ 52ul - -/* Now check all parameters and calculate CAPABILITIES REGISTER value */ -#if SDHC_CAPAB_64BITBUS > 1 || SDHC_CAPAB_18V > 1 || SDHC_CAPAB_30V > 1 ||= \ - SDHC_CAPAB_33V > 1 || SDHC_CAPAB_SUSPRESUME > 1 || SDHC_CAPAB_SDMA > 1= || \ - SDHC_CAPAB_HIGHSPEED > 1 || SDHC_CAPAB_ADMA2 > 1 || SDHC_CAPAB_ADMA1 >= 1 ||\ - SDHC_CAPAB_TOUNIT > 1 -#error Capabilities features can have value 0 or 1 only! -#endif - -#if SDHC_CAPAB_MAXBLOCKLENGTH =3D=3D 512 -#define MAX_BLOCK_LENGTH 0ul -#elif SDHC_CAPAB_MAXBLOCKLENGTH =3D=3D 1024 -#define MAX_BLOCK_LENGTH 1ul -#elif SDHC_CAPAB_MAXBLOCKLENGTH =3D=3D 2048 -#define MAX_BLOCK_LENGTH 2ul -#else -#error Max host controller block size can have value 512, 1024 or 2048 onl= y! -#endif - -#if (SDHC_CAPAB_BASECLKFREQ > 0 && SDHC_CAPAB_BASECLKFREQ < 10) || \ - SDHC_CAPAB_BASECLKFREQ > 63 -#error SDclock frequency can have value in range 0, 10-63 only! -#endif - -#if SDHC_CAPAB_TOCLKFREQ > 63 -#error Timeout clock frequency can have value in range 0-63 only! -#endif - -#define SDHC_CAPAB_REG_DEFAULT \ - ((SDHC_CAPAB_64BITBUS << 28) | (SDHC_CAPAB_18V << 26) | \ - (SDHC_CAPAB_30V << 25) | (SDHC_CAPAB_33V << 24) | \ - (SDHC_CAPAB_SUSPRESUME << 23) | (SDHC_CAPAB_SDMA << 22) | \ - (SDHC_CAPAB_HIGHSPEED << 21) | (SDHC_CAPAB_ADMA1 << 20) | \ - (SDHC_CAPAB_ADMA2 << 19) | (MAX_BLOCK_LENGTH << 16) | \ - (SDHC_CAPAB_BASECLKFREQ << 8) | (SDHC_CAPAB_TOUNIT << 7) | \ - (SDHC_CAPAB_TOCLKFREQ)) - -#define MASKED_WRITE(reg, mask, val) (reg =3D (reg & (mask)) | (val)) +#define SDHC_CAPAB_REG_DEFAULT 0x057834b4 =20 static uint8_t sdhci_slotint(SDHCIState *s) { --=20 2.16.1