From nobody Tue Feb 10 09:57:27 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of _spf.google.com designates 209.85.216.195 as permitted sender) client-ip=209.85.216.195; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-qt0-f195.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of _spf.google.com designates 209.85.216.195 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-qt0-f195.google.com (mail-qt0-f195.google.com [209.85.216.195]) by mx.zohomail.com with SMTPS id 1518494922071536.9671792769745; Mon, 12 Feb 2018 20:08:42 -0800 (PST) Received: by mail-qt0-f195.google.com with SMTP id f18so2210936qth.11 for ; Mon, 12 Feb 2018 20:08:41 -0800 (PST) Return-Path: Return-Path: Received: from x1.local ([138.117.48.219]) by smtp.gmail.com with ESMTPSA id q2sm7350435qki.10.2018.02.12.20.08.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 12 Feb 2018 20:08:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fIxg5fEdAV5AYm4UaAC8xvRG6zbVJk07FMpliAZ8/n0=; b=tUvCWWADN0Zmy8B+ZQ5K4sdU6Oa5z9tXzOvERdPPNMeWw+0Nj2iegThxS3lHJf8Izp t+kmYhkFRRzrP1ZEeksGDvFnbKQ5YagiaP4QFfq5AQ38jVPhRaCVs1KIngx18SAk8ekY l4/doRnUG2aEAPv9P2q5cB7lmoqD8eo1qDVL90jl6+bowk/JwFb8roCn5ieM3Boykj4M 8MYHcBL76zPYZmzX1VRbbEey0gEV+CKKJ5/9WPDfxy+X8E+YjDhzKR9Y8+Iq99UYDVUj QuAM4ZRP1Y5uVYL96MGCtCYa5XpNqZu2ClzH6Wca2lZaSwUflzUgd9WojWxa3c+gf8rW dcNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=fIxg5fEdAV5AYm4UaAC8xvRG6zbVJk07FMpliAZ8/n0=; b=WD33C4OPl9JUItGMHTNVGLHsY4u1zmUT0fHXAOlAoZ7wMYThbRDDr2E+D62OiIORM7 AFV/awEckjGIWPg6ninwjIeF8iT9zmGDKb61SaPGUADK6s7WchUkS7yncps8/WkIccc2 dVgY+j47Y3/c68A3vZh62i9dO1tOjpHWcUQwRHWh+uILLIJzzBtIZ50dcaPxa6HNVX2k tsjQEtVThzdIvliIU5FMDm7W10p9isN3oj/Sdj7w4LURVkR2rwzvYEvkWS/uDulKefBA DIo9+ef3v19weu+8nHqCORHiHDFC3B8dL146qnmz1j6/p/SXHmgdpk7bRm+PFPRftRd8 QaDQ== X-Gm-Message-State: APf1xPDFlnW1dYiblKbs6cT+fMOSBSTOlLRMwqfBW5lC5hSFGvxEcwxk gUJRmXVKaaahA6tqrk8wBCM= X-Google-Smtp-Source: AH8x226K2H/XWtz+enImnEueBlj9nXINL80jghFlB3T0gUA8o4FpIlOXQ/PwR1B9/Tc7O1D3TLFUng== X-Received: by 10.237.53.195 with SMTP id d3mr2768370qte.276.1518494921056; Mon, 12 Feb 2018 20:08:41 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: Paolo Bonzini Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org, Peter Maydell , Alistair Francis , "Edgar E . Iglesias" , Fam Zheng Subject: [PATCH v13 07/30] sdhci: add a 'spec_version property' (default to v2) Date: Tue, 13 Feb 2018 01:07:46 -0300 Message-Id: <20180213040809.26021-8-f4bug@amsat.org> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180213040809.26021-1-f4bug@amsat.org> References: <20180213040809.26021-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZohoMail: RDKM_0 RSF_0 Z_629925259 SPT_0 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis --- hw/sd/sdhci-internal.h | 4 ++-- include/hw/sd/sdhci.h | 2 ++ hw/sd/sdhci.c | 27 +++++++++++++++++++++++---- 3 files changed, 27 insertions(+), 6 deletions(-) diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h index 0991acd724..64556480a9 100644 --- a/hw/sd/sdhci-internal.h +++ b/hw/sd/sdhci-internal.h @@ -216,9 +216,9 @@ /* Slot interrupt status */ #define SDHC_SLOT_INT_STATUS 0xFC =20 -/* HWInit Host Controller Version Register 0x0401 */ +/* HWInit Host Controller Version Register */ #define SDHC_HCVER 0xFE -#define SD_HOST_SPECv2_VERS 0x2401 +#define SDHC_HCVER_VENDOR 0x24 =20 #define SDHC_REGISTERS_MAP_SIZE 0x100 #define SDHC_INSERTION_DELAY (NANOSECONDS_PER_SECOND) diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index f8d1ba3538..2a26b46f05 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -78,6 +78,7 @@ typedef struct SDHCIState { /* Read-only registers */ uint64_t capareg; /* Capabilities Register */ uint64_t maxcurr; /* Maximum Current Capabilities Register */ + uint16_t version; /* Host Controller Version Register */ =20 uint8_t *fifo_buffer; /* SD host i/o FIFO buffer */ uint32_t buf_maxsz; @@ -93,6 +94,7 @@ typedef struct SDHCIState { /* Configurable properties */ bool pending_insert_quirk; /* Quirk for Raspberry Pi card insert int */ uint32_t quirks; + uint8_t sd_spec_version; } SDHCIState; =20 /* diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 3602286f46..17a1348f0f 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -173,7 +173,8 @@ static void sdhci_reset(SDHCIState *s) =20 timer_del(s->insert_timer); timer_del(s->transfer_timer); - /* Set all registers to 0. Capabilities registers are not cleared + + /* Set all registers to 0. Capabilities/Version registers are not clea= red * and assumed to always preserve their value, given to them during * initialization */ memset(&s->sdmasysad, 0, (uintptr_t)&s->capareg - (uintptr_t)&s->sdmas= ysad); @@ -918,7 +919,7 @@ static uint64_t sdhci_read(void *opaque, hwaddr offset,= unsigned size) ret =3D (uint32_t)(s->admasysaddr >> 32); break; case SDHC_SLOT_INT_STATUS: - ret =3D (SD_HOST_SPECv2_VERS << 16) | sdhci_slotint(s); + ret =3D (s->version << 16) | sdhci_slotint(s); break; default: qemu_log_mask(LOG_UNIMP, "SDHC rd_%ub @0x%02" HWADDR_PRIx " " @@ -1174,11 +1175,22 @@ static inline unsigned int sdhci_get_fifolen(SDHCIS= tate *s) } } =20 +static void sdhci_init_readonly_registers(SDHCIState *s, Error **errp) +{ + if (s->sd_spec_version !=3D 2) { + error_setg(errp, "Only Spec v2 is supported"); + return; + } + s->version =3D (SDHC_HCVER_VENDOR << 8) | (s->sd_spec_version - 1); +} + /* --- qdev common --- */ =20 #define DEFINE_SDHCI_COMMON_PROPERTIES(_state) \ - /* Capabilities registers provide information on supported features - * of this specific host controller implementation */ \ + DEFINE_PROP_UINT8("sd-spec-version", _state, sd_spec_version, 2), \ + \ + /* Capabilities registers provide information on supported + * features of this specific host controller implementation */ \ DEFINE_PROP_UINT64("capareg", _state, capareg, SDHC_CAPAB_REG_DEFAULT)= , \ DEFINE_PROP_UINT64("maxcurr", _state, maxcurr, 0) =20 @@ -1206,6 +1218,13 @@ static void sdhci_uninitfn(SDHCIState *s) =20 static void sdhci_common_realize(SDHCIState *s, Error **errp) { + Error *local_err =3D NULL; + + sdhci_init_readonly_registers(s, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } s->buf_maxsz =3D sdhci_get_fifolen(s); s->fifo_buffer =3D g_malloc0(s->buf_maxsz); =20 --=20 2.16.1