From nobody Tue Feb 10 02:28:06 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of _spf.google.com designates 209.85.220.196 as permitted sender) client-ip=209.85.220.196; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-qk0-f196.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of _spf.google.com designates 209.85.220.196 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-qk0-f196.google.com (mail-qk0-f196.google.com [209.85.220.196]) by mx.zohomail.com with SMTPS id 151849495199635.9237858940312; Mon, 12 Feb 2018 20:09:11 -0800 (PST) Received: by mail-qk0-f196.google.com with SMTP id z197so4213399qkb.6 for ; Mon, 12 Feb 2018 20:09:11 -0800 (PST) Return-Path: Return-Path: Received: from x1.local ([138.117.48.219]) by smtp.gmail.com with ESMTPSA id q2sm7350435qki.10.2018.02.12.20.09.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 12 Feb 2018 20:09:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6I0eLeCnx4eW7xx/FEABgkNDEMBh/XvlA3Ez3K+OV/Q=; b=j9yA8RV7Ko/lrpTp31+xiCGBcv6NNSvB93jDgLiFaRcJmZt9uChe2llie4InDlrTBO 1oXCsPTA3oVSxcLj6BTPxRKfj59jg6UkKbTshZLc1TiydtL9gruCBbrzr590P8Z15Jwq wjrqIVFJpIRRJNwbymqsqX4I0w9fUou+NCdmeXZFouTxDNM3qI0kF7ozHthlgxE8FyOv RpwxQiyS8kMC1rVMu1Q0ala/TXCitISp4RsKlPkyOkGvOiqAqHpdtwkvFCNXXegCZqAA K/v8Y2cuL4KLVsbrDyZ9tiNiBXqZAY8nsxyxOXfe9jQk/rUP+Rv4dt3OdGcVRD3ebugw 5OYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=6I0eLeCnx4eW7xx/FEABgkNDEMBh/XvlA3Ez3K+OV/Q=; b=Gq8Z6jyBulL2IU2yjvfybukgMW32alzg+dWt+3Zo9lKPlITlusNewBbzwENJaiUdyX t11enPSdYkeOOn5CAm9OHq7iTSHBETw0z1cK2gafNxPfXj/0sTssaaz51i6uveVQDwzz 5njJyTzrNxf2qGSfcZCN9hS8YhS04yzpluzFlMXLNXQUmN6/CV82dz3SNWCzL88Cfmxu S8ocz1hRj2a3aUrMiekejc2jD6lejRE0trEQKUkyEe994/b+QiLWZsPJspjgglevaUzD fGySh3MwPZ8gxDmqFWAoldF0WnbB9TiVT7tojAlr6tggORmYKwScqmiwA5spad2e8mAB ODWQ== X-Gm-Message-State: APf1xPAnDGvOVJl8dsWpwv8qRWVPZFXRb6NL/U7TyhJxyg51VvgatYYZ K6V5nXaoj0cASlc06/BD9Uw= X-Google-Smtp-Source: AH8x226YPWcFKjrc/UfnCY21LH/tMUM5unn/SKDIRnxqsRtwD2HU6EESNe2AHRvrA4xcw/iRrRR93A== X-Received: by 10.55.24.34 with SMTP id j34mr17325123qkh.294.1518494950894; Mon, 12 Feb 2018 20:09:10 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: Paolo Bonzini Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org, Peter Maydell , Alistair Francis , "Edgar E . Iglesias" , Fam Zheng , "Edgar E. Iglesias" , qemu-arm@nongnu.org (open list:Xilinx Zynq) Subject: [PATCH v13 16/30] hw/arm/xilinx_zynq: fix the capabilities register to match the datasheet Date: Tue, 13 Feb 2018 01:07:55 -0300 Message-Id: <20180213040809.26021-17-f4bug@amsat.org> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180213040809.26021-1-f4bug@amsat.org> References: <20180213040809.26021-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZohoMail: RDKM_0 RSF_0 Z_629925259 SPT_0 checking Xilinx datasheet "UG585" (v1.12.1) Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis --- hw/arm/xilinx_zynq.c | 53 ++++++++++++++++++++++++++++--------------------= ---- tests/sdhci-test.c | 5 +++++ 2 files changed, 34 insertions(+), 24 deletions(-) diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 1836a4ed45..0f76333770 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -61,6 +61,8 @@ static const int dma_irqs[8] =3D { #define SLCR_XILINX_UNLOCK_KEY 0xdf0d #define SLCR_XILINX_LOCK_KEY 0x767b =20 +#define ZYNQ_SDHCI_CAPABILITIES 0x69ec0080 /* Datasheet: UG585 (v1.12.1) = */ + #define ARMV7_IMM16(x) (extract32((x), 0, 12) | \ extract32((x), 12, 4) << 16) =20 @@ -165,10 +167,8 @@ static void zynq_init(MachineState *machine) MemoryRegion *address_space_mem =3D get_system_memory(); MemoryRegion *ext_ram =3D g_new(MemoryRegion, 1); MemoryRegion *ocm_ram =3D g_new(MemoryRegion, 1); - DeviceState *dev, *carddev; + DeviceState *dev; SysBusDevice *busdev; - DriveInfo *di; - BlockBackend *blk; qemu_irq pic[64]; int n; =20 @@ -247,27 +247,32 @@ static void zynq_init(MachineState *machine) gem_init(&nd_table[0], 0xE000B000, pic[54-IRQ_OFFSET]); gem_init(&nd_table[1], 0xE000C000, pic[77-IRQ_OFFSET]); =20 - dev =3D qdev_create(NULL, TYPE_SYSBUS_SDHCI); - qdev_init_nofail(dev); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xE0100000); - sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[56-IRQ_OFFSET]); - - di =3D drive_get_next(IF_SD); - blk =3D di ? blk_by_legacy_dinfo(di) : NULL; - carddev =3D qdev_create(qdev_get_child_bus(dev, "sd-bus"), TYPE_SD_CAR= D); - qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(carddev), true, "realized", &error_fat= al); - - dev =3D qdev_create(NULL, TYPE_SYSBUS_SDHCI); - qdev_init_nofail(dev); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xE0101000); - sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[79-IRQ_OFFSET]); - - di =3D drive_get_next(IF_SD); - blk =3D di ? blk_by_legacy_dinfo(di) : NULL; - carddev =3D qdev_create(qdev_get_child_bus(dev, "sd-bus"), TYPE_SD_CAR= D); - qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(carddev), true, "realized", &error_fat= al); + for (n =3D 0; n < 2; n++) { + int hci_irq =3D n ? 79 : 56; + hwaddr hci_addr =3D n ? 0xE0101000 : 0xE0100000; + DriveInfo *di; + BlockBackend *blk; + DeviceState *carddev; + + /* Compatible with: + * - SD Host Controller Specification Version 2.0 Part A2 + * - SDIO Specification Version 2.0 + * - MMC Specification Version 3.31 + */ + dev =3D qdev_create(NULL, TYPE_SYSBUS_SDHCI); + qdev_prop_set_uint8(dev, "sd-spec-version", 2); + qdev_prop_set_uint64(dev, "capareg", ZYNQ_SDHCI_CAPABILITIES); + qdev_init_nofail(dev); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, hci_addr); + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[hci_irq - IRQ_OFFSE= T]); + + di =3D drive_get_next(IF_SD); + blk =3D di ? blk_by_legacy_dinfo(di) : NULL; + carddev =3D qdev_create(qdev_get_child_bus(dev, "sd-bus"), TYPE_SD= _CARD); + qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); + object_property_set_bool(OBJECT(carddev), true, "realized", + &error_fatal); + } =20 dev =3D qdev_create(NULL, TYPE_ZYNQ_XADC); qdev_init_nofail(dev); diff --git a/tests/sdhci-test.c b/tests/sdhci-test.c index 24feea744a..898c43ff4f 100644 --- a/tests/sdhci-test.c +++ b/tests/sdhci-test.c @@ -41,6 +41,11 @@ static const struct sdhci_t { /* Exynos4210 */ { "arm", "smdkc210", {0x12510000, 2, 0, {1, 0x5e80080} } }, + + /* Zynq-7000 */ + { "arm", "xilinx-zynq-a9", /* Datasheet: UG585 (v1.12.1) */ + {0xe0100000, 2, 0, {1, 0x69ec0080} } }, + }; =20 typedef struct QSDHCI { --=20 2.16.1