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[174.21.6.47]) by smtp.gmail.com with ESMTPSA id w10sm14122374pgr.57.2018.02.10.15.05.33 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 10 Feb 2018 15:05:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=g3DEJfoYnA4ZEKPBUJIKJiCt3e/U1XrQnB4yUIPoJVs=; b=f9/SLfeLlcQnt6SOD/c5sH6VcE8OeLdHWazaEEKneO1VuE+CBB08f+KW2CTKl8dH9E MT/jZuU+5scYueJjHij5l1lcAWp7j3ASl3+0baNdKA410kzaHDMA8wDL72XTZGPLBtY3 bDET9WIjjAINhqFz/5oE2yVUtCtJN4bnSfBIU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=g3DEJfoYnA4ZEKPBUJIKJiCt3e/U1XrQnB4yUIPoJVs=; b=BjGdKGA8sgaSGteLnlIsERIjjh5IRSwwzNGVWRoIp6j5yDgatKcehGSHaMSOka/6Wc AL2mFX6usoBYhofwKYgqdiS64wiTc3TtQ/pgUBekn6n9cpEfglucrInrWsXpJOPhWVmv TDmpbh6Wm6ErJmW5x7c3UuJ0w9AhtQR90Rf331vtGu1JUMremDp9vkCyAP/uxh0gogMZ KLDh49sA7GTgreZjADlAEXbQiTlBjCVpHgv2ZvAKkJH+XYIxUAGMrtQf3R7n1aX1xUcM 33wQx/pw4H70J8iI/gW83viQqSpaOz6uTvfM/kx9ZjWxqmZJt0pf/d+ZzPDIqXjEuoNV W21w== X-Gm-Message-State: APf1xPCyQVHjpTX+lN4jfPozbP1LoIV3GGGzGnDzfeTfPcbJB4kic8Zt lfQ198CFo+tWenEy52aS90UL5bjnBro= X-Google-Smtp-Source: AH8x224D578MuHgl+oPR+Qxyxk9GHwKC3jzvHkmuzTucUxm55wlL/enDRl5Hue0mhf4L6vYtQvNVvA== X-Received: by 10.99.186.73 with SMTP id l9mr3060866pgu.83.1518303934793; Sat, 10 Feb 2018 15:05:34 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sat, 10 Feb 2018 15:05:26 -0800 Message-Id: <20180210230530.8421-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180210230530.8421-1-richard.henderson@linaro.org> References: <20180210230530.8421-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::243 Subject: [Qemu-devel] [PATCH 1/5] target/arm: Remove ARM_CP_64BIT from ZCR_EL registers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Because they are ARM_CP_STATE_AA64, ARM_CP_64BIT is implied. Signed-off-by: Richard Henderson --- target/arm/helper.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 180ab75458..4b102ec356 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -4357,7 +4357,7 @@ static void zcr_write(CPUARMState *env, const ARMCPRe= gInfo *ri, static const ARMCPRegInfo zcr_el1_reginfo =3D { .name =3D "ZCR_EL1", .state =3D ARM_CP_STATE_AA64, .opc0 =3D 3, .opc1 =3D 0, .crn =3D 1, .crm =3D 2, .opc2 =3D 0, - .access =3D PL1_RW, .accessfn =3D zcr_access, .type =3D ARM_CP_64BIT, + .access =3D PL1_RW, .accessfn =3D zcr_access, .fieldoffset =3D offsetof(CPUARMState, vfp.zcr_el[1]), .writefn =3D zcr_write, .raw_writefn =3D raw_write }; @@ -4365,7 +4365,7 @@ static const ARMCPRegInfo zcr_el1_reginfo =3D { static const ARMCPRegInfo zcr_el2_reginfo =3D { .name =3D "ZCR_EL2", .state =3D ARM_CP_STATE_AA64, .opc0 =3D 3, .opc1 =3D 4, .crn =3D 1, .crm =3D 2, .opc2 =3D 0, - .access =3D PL2_RW, .accessfn =3D zcr_access, .type =3D ARM_CP_64BIT, + .access =3D PL2_RW, .accessfn =3D zcr_access, .fieldoffset =3D offsetof(CPUARMState, vfp.zcr_el[2]), .writefn =3D zcr_write, .raw_writefn =3D raw_write }; @@ -4373,14 +4373,14 @@ static const ARMCPRegInfo zcr_el2_reginfo =3D { static const ARMCPRegInfo zcr_no_el2_reginfo =3D { .name =3D "ZCR_EL2", .state =3D ARM_CP_STATE_AA64, .opc0 =3D 3, .opc1 =3D 4, .crn =3D 1, .crm =3D 2, .opc2 =3D 0, - .access =3D PL2_RW, .type =3D ARM_CP_64BIT, + .access =3D PL2_RW, .readfn =3D arm_cp_read_zero, .writefn =3D arm_cp_write_ignore }; =20 static const ARMCPRegInfo zcr_el3_reginfo =3D { .name =3D "ZCR_EL3", .state =3D ARM_CP_STATE_AA64, .opc0 =3D 3, .opc1 =3D 6, .crn =3D 1, .crm =3D 2, .opc2 =3D 0, - .access =3D PL3_RW, .accessfn =3D zcr_access, .type =3D ARM_CP_64BIT, + .access =3D PL3_RW, .accessfn =3D zcr_access, .fieldoffset =3D offsetof(CPUARMState, vfp.zcr_el[3]), .writefn =3D zcr_write, .raw_writefn =3D raw_write }; --=20 2.14.3