From nobody Mon Feb 9 22:38:47 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1518109211005949.7140005955939; Thu, 8 Feb 2018 09:00:11 -0800 (PST) Received: from localhost ([::1]:52938 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ejpYQ-0000KU-2d for importer@patchew.org; Thu, 08 Feb 2018 12:00:10 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41910) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ejpNg-0007w3-TH for qemu-devel@nongnu.org; Thu, 08 Feb 2018 11:49:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ejpNd-0003i6-Jv for qemu-devel@nongnu.org; Thu, 08 Feb 2018 11:49:04 -0500 Received: from mail-qt0-x241.google.com ([2607:f8b0:400d:c0d::241]:36769) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ejpNd-0003hi-Eo for qemu-devel@nongnu.org; Thu, 08 Feb 2018 11:49:01 -0500 Received: by mail-qt0-x241.google.com with SMTP id q18so228762qtl.3 for ; Thu, 08 Feb 2018 08:49:01 -0800 (PST) Received: from x1.local ([138.117.48.219]) by smtp.gmail.com with ESMTPSA id z66sm240905qkc.9.2018.02.08.08.48.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Feb 2018 08:48:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vPITX2oYC0q9EseKGELh7RVsGlJQHH80NROxdINBdIk=; b=LweYOB0dnCOW3c2Al1/G7DFQ3HZL3S6CCEqrPOsAkLC0hsvZNJD1e0m4+npL/Hvuiz BYKrjXKNblHispwTRTUAJ8LpGShpABpfqYwy62yRfSyTlr+1ErJx6tnmBgs1JUOYOmji 4KqKX0B5Rf1y5StSuwbIZwu+U3N589lZ+znojCLTq9NlOrqBk4/mW+VnTl5bjjp0I+Nk 9Wu2gMENwXNEaXZg5M7Opu2cFhQCRsRGL00mnEPlI2mHD+yxM7XHar5KHBCA0xp4vvl0 pqwpILhh8Xp7gLdmiHMsStcniA1LnBqG6JtveOR6t3XarEcyt0ODmJI09WVUMuzkc6eN AwqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=vPITX2oYC0q9EseKGELh7RVsGlJQHH80NROxdINBdIk=; b=Vbw80xuhcd1Zz9yfPKrMvyfU118HsRG9pab0E01gj4IMzbXSOBfb/rGx5ppOSDVPz+ P9ommePs3dW3tqq0rTdL1YE3PXLUUFVcPfmW6jVCV6tf60KgJ6PeyRhSQwJh+72Xuqqp nPXwk3us2rIoozhafWn4sG4VPYGjJDXm7Q932iX4y3WNIwGiD6EFooiVskMqNZbqAcV3 wW3Fs2UIRK78kluqrQJih72uJuwho3fQiGZjZ2tI6tQZS54guW4293vQXLyPnYO81egA I9erRwcGsWjLDsCgRxymAewzTcBoohN49NLJBX6LVkyqYWoriLMUV8LbLNOc404igLO1 /n0A== X-Gm-Message-State: APf1xPCN4IGbvsYiI0NNXLO/k55tDe8addVUqOo03JaKGL5tyZYCl/dj yEHES7S2EsKyIGx+UfgjUBY= X-Google-Smtp-Source: AH8x227U7BggbWuejhySd1ucp+HevyQyDyjJtyvF7RnlOpKnMFqQsbIFqm2kJ+qiTiFA1eblIcKRcw== X-Received: by 10.200.34.237 with SMTP id g42mr1905224qta.93.1518108535899; Thu, 08 Feb 2018 08:48:55 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: Paolo Bonzini , Peter Maydell Date: Thu, 8 Feb 2018 13:47:56 -0300 Message-Id: <20180208164818.7961-9-f4bug@amsat.org> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180208164818.7961-1-f4bug@amsat.org> References: <20180208164818.7961-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::241 Subject: [Qemu-devel] [PATCH v11 08/30] sdhci: use a numeric value for the default CAPAB register X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E . Iglesias" , Alistair Francis , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 using many #defines is not portable when scaling to different HCI. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis --- hw/sd/sdhci.c | 74 +++++++++++++------------------------------------------= ---- 1 file changed, 16 insertions(+), 58 deletions(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 2bcc5ff58a..da30b58723 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -39,67 +39,25 @@ #define TYPE_SDHCI_BUS "sdhci-bus" #define SDHCI_BUS(obj) OBJECT_CHECK(SDBus, (obj), TYPE_SDHCI_BUS) =20 +#define MASKED_WRITE(reg, mask, val) (reg =3D (reg & (mask)) | (val)) + /* Default SD/MMC host controller features information, which will be * presented in CAPABILITIES register of generic SD host controller at res= et. - * If not stated otherwise: - * 0 - not supported, 1 - supported, other - prohibited. + * + * support: + * - 3.3v and 1.8v voltages + * - SDMA/ADMA1/ADMA2 + * - high-speed + * max host controller R/W buffers size: 512B + * max clock frequency for SDclock: 52 MHz + * timeout clock frequency: 52 MHz + * + * does not support: + * - 3.0v voltage + * - 64-bit system bus + * - suspend/resume */ -#define SDHC_CAPAB_64BITBUS 0ul /* 64-bit System Bus Support = */ -#define SDHC_CAPAB_18V 1ul /* Voltage support 1.8v */ -#define SDHC_CAPAB_30V 0ul /* Voltage support 3.0v */ -#define SDHC_CAPAB_33V 1ul /* Voltage support 3.3v */ -#define SDHC_CAPAB_SUSPRESUME 0ul /* Suspend/resume support */ -#define SDHC_CAPAB_SDMA 1ul /* SDMA support */ -#define SDHC_CAPAB_HIGHSPEED 1ul /* High speed support */ -#define SDHC_CAPAB_ADMA1 1ul /* ADMA1 support */ -#define SDHC_CAPAB_ADMA2 1ul /* ADMA2 support */ -/* Maximum host controller R/W buffers size - * Possible values: 512, 1024, 2048 bytes */ -#define SDHC_CAPAB_MAXBLOCKLENGTH 512ul -/* Maximum clock frequency for SDclock in MHz - * value in range 10-63 MHz, 0 - not defined */ -#define SDHC_CAPAB_BASECLKFREQ 52ul -#define SDHC_CAPAB_TOUNIT 1ul /* Timeout clock unit 0 - kHz, 1 - = MHz */ -/* Timeout clock frequency 1-63, 0 - not defined */ -#define SDHC_CAPAB_TOCLKFREQ 52ul - -/* Now check all parameters and calculate CAPABILITIES REGISTER value */ -#if SDHC_CAPAB_64BITBUS > 1 || SDHC_CAPAB_18V > 1 || SDHC_CAPAB_30V > 1 ||= \ - SDHC_CAPAB_33V > 1 || SDHC_CAPAB_SUSPRESUME > 1 || SDHC_CAPAB_SDMA > 1= || \ - SDHC_CAPAB_HIGHSPEED > 1 || SDHC_CAPAB_ADMA2 > 1 || SDHC_CAPAB_ADMA1 >= 1 ||\ - SDHC_CAPAB_TOUNIT > 1 -#error Capabilities features can have value 0 or 1 only! -#endif - -#if SDHC_CAPAB_MAXBLOCKLENGTH =3D=3D 512 -#define MAX_BLOCK_LENGTH 0ul -#elif SDHC_CAPAB_MAXBLOCKLENGTH =3D=3D 1024 -#define MAX_BLOCK_LENGTH 1ul -#elif SDHC_CAPAB_MAXBLOCKLENGTH =3D=3D 2048 -#define MAX_BLOCK_LENGTH 2ul -#else -#error Max host controller block size can have value 512, 1024 or 2048 onl= y! -#endif - -#if (SDHC_CAPAB_BASECLKFREQ > 0 && SDHC_CAPAB_BASECLKFREQ < 10) || \ - SDHC_CAPAB_BASECLKFREQ > 63 -#error SDclock frequency can have value in range 0, 10-63 only! -#endif - -#if SDHC_CAPAB_TOCLKFREQ > 63 -#error Timeout clock frequency can have value in range 0-63 only! -#endif - -#define SDHC_CAPAB_REG_DEFAULT \ - ((SDHC_CAPAB_64BITBUS << 28) | (SDHC_CAPAB_18V << 26) | \ - (SDHC_CAPAB_30V << 25) | (SDHC_CAPAB_33V << 24) | \ - (SDHC_CAPAB_SUSPRESUME << 23) | (SDHC_CAPAB_SDMA << 22) | \ - (SDHC_CAPAB_HIGHSPEED << 21) | (SDHC_CAPAB_ADMA1 << 20) | \ - (SDHC_CAPAB_ADMA2 << 19) | (MAX_BLOCK_LENGTH << 16) | \ - (SDHC_CAPAB_BASECLKFREQ << 8) | (SDHC_CAPAB_TOUNIT << 7) | \ - (SDHC_CAPAB_TOCLKFREQ)) - -#define MASKED_WRITE(reg, mask, val) (reg =3D (reg & (mask)) | (val)) +#define SDHC_CAPAB_REG_DEFAULT 0x057834b4 =20 static uint8_t sdhci_slotint(SDHCIState *s) { --=20 2.16.1