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[174.21.6.47]) by smtp.gmail.com with ESMTPSA id r27sm26949344pfj.75.2018.01.28.15.16.24 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 28 Jan 2018 15:16:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=8Kg5OMBfw7BaLTAtWZSwfZCWdsar5dGHF70bimc73J4=; b=kZvaPXIRXoqhuTqsiohdSedbUjT11ETEzVdaWlsSCevXu58vdZvhf6iV0CEMu1+1CS Ahc8xJ1qAJiotMtpsy30tJRyAQ+e36MV0K/E99fhBu4eqoss5mpaT5seWidu4Nd7Sn1A WqR7MH6t3X9/7Cc7I28dY9oxM4UNjs0lkaRZI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=8Kg5OMBfw7BaLTAtWZSwfZCWdsar5dGHF70bimc73J4=; b=p2kklry1CH8yv84ojGT5r0u5iavKelVY9a8gkf02G3M3hU5xF6SpmdokJRgFKrz5dY s6rr3IdKbAVzAGYqGiZmadANzDMIqZilEiwCos25SoPIOAgMvGkzHNQ8G4t9Z7M2P71l j+O4SWVAZysNDztB0VZZnbVaAOV3521yzLe6mDCtHBnL+SXr3g7yrrjO3f8+MYQeuROM ynZfve72a2gUCETeMlOWp/yBfaW/uQTchBEbffL08NnnX3weCPSWXcwJAEsLJdL03LH5 dNrVbC+nxwP7Ynjvl22BNwvkkXRGh7Y2NYEXHmtYpAxb/k+m+o6MjbKEWkdmNJ4QUfnC VU4Q== X-Gm-Message-State: AKwxyte83f2jyokU1sN5USNwkgdiYBtMteWbsZ0iT4Gq3XyggEYFA6EF DLhiybS1253YHHGrYZOwgQdz2+arcPI= X-Google-Smtp-Source: AH8x226n80O5OVLzFu4l39cgsVKSJD3cWFIXw2H7+pPcmJJPpSJg/w0lQ9l7yWsFXfszHCIkYOiRYQ== X-Received: by 10.98.58.5 with SMTP id h5mr24780213pfa.169.1517181385862; Sun, 28 Jan 2018 15:16:25 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 28 Jan 2018 15:15:21 -0800 Message-Id: <20180128231528.22719-37-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180128231528.22719-1-richard.henderson@linaro.org> References: <20180128231528.22719-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::243 Subject: [Qemu-devel] [PULL v4 36/43] target/hppa: Implement a pause instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This is an extension to the base ISA, but we can use this in the kernel idle loop to reduce the host cpu time consumed. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index cf67ca026e..d84090d479 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2826,9 +2826,45 @@ static DisasJumpType trans_ds(DisasContext *ctx, uin= t32_t insn, return nullify_end(ctx, DISAS_NEXT); } =20 +#ifndef CONFIG_USER_ONLY +/* These are QEMU extensions and are nops in the real architecture: + * + * or %r10,%r10,%r10 -- idle loop; wait for interrupt + * or %r31,%r31,%r31 -- death loop; offline cpu + * currently implemented as idle. + */ +static DisasJumpType trans_pause(DisasContext *ctx, uint32_t insn, + const DisasInsn *di) +{ + TCGv_i32 tmp; + + /* No need to check for supervisor, as userland can only pause + until the next timer interrupt. */ + nullify_over(ctx); + + /* Advance the instruction queue. */ + copy_iaoq_entry(cpu_iaoq_f, ctx->iaoq_b, cpu_iaoq_b); + copy_iaoq_entry(cpu_iaoq_b, ctx->iaoq_n, ctx->iaoq_n_var); + nullify_set(ctx, 0); + + /* Tell the qemu main loop to halt until this cpu has work. */ + tmp =3D tcg_const_i32(1); + tcg_gen_st_i32(tmp, cpu_env, -offsetof(HPPACPU, env) + + offsetof(CPUState, halted)); + tcg_temp_free_i32(tmp); + gen_excp_1(EXCP_HALTED); + + return nullify_end(ctx, DISAS_NORETURN); +} +#endif + static const DisasInsn table_arith_log[] =3D { { 0x08000240u, 0xfc00ffffu, trans_nop }, /* or x,y,0 */ { 0x08000240u, 0xffe0ffe0u, trans_copy }, /* or x,0,t */ +#ifndef CONFIG_USER_ONLY + { 0x094a024au, 0xffffffffu, trans_pause }, /* or r10,r10,r10 */ + { 0x0bff025fu, 0xffffffffu, trans_pause }, /* or r31,r31,r31 */ +#endif { 0x08000000u, 0xfc000fe0u, trans_log, .f.ttt =3D tcg_gen_andc_reg }, { 0x08000200u, 0xfc000fe0u, trans_log, .f.ttt =3D tcg_gen_and_reg }, { 0x08000240u, 0xfc000fe0u, trans_log, .f.ttt =3D tcg_gen_or_reg }, --=20 2.14.3