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[174.21.6.47]) by smtp.gmail.com with ESMTPSA id z19sm9760028pfh.185.2018.01.24.15.26.49 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 24 Jan 2018 15:26:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=R7Enyxbsmc64EfsW5JScMt9UKiAW8/F8PsYnC3AJCUE=; b=K1oZ4V/kJgvKM3arUoY8YawsoC8lo9rU7/lj+OZicc+Pc/o3b9xhU4uDnGD9X9f7Wj n7MtB4VPjsaUyXddnukAzk3dvEwvD6YMDMzhF25QV6SFyHov2AnZk0e357Xp3Q1tl3I7 rj13zKTb0duXtPk9xfctJHn2EGd9lPLI/pqmE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=R7Enyxbsmc64EfsW5JScMt9UKiAW8/F8PsYnC3AJCUE=; b=hHDMLyiSWTVc5fVByq1eXYa/b69fSe4lzxHevlzti0KEumLKqTUMLuBL43hOTjRFow RIJ3uXp+TFKBIfmS7/vsuXZJMgNoxYpGhO26ZDjNbyW54H5c0stm3Slfo/wFqpTOnnVK EckyKnNWNZGg01yiANR5/7w3yjvKUJsX16oxRqbu5mDWHp0gCvWUmOkIAOmnJBmtN/dB C9wuVr/nSRXloXkcg0LgcaOsV536xbkmKt96NHsLUXmbOMNxNgP6qiBI+rOkLsXWTmcT g/OsShxlpeTaq/cybiXpiwFBq4q25d35rES9Gci51Wrb5lXJwpe9xQWLplems94zADM2 tSBg== X-Gm-Message-State: AKwxytcHoAk+mnjJt22P/HO1LZh2kW2UuGJX+ZB8jpD9sXVPe/E94E9G 4kDTgqQsxgCSTYY/ib/B+YHEpb90wc8= X-Google-Smtp-Source: AH8x2257O8PwY0M3VXgQXchIFszdpjNj9l1SRhmdZp2PEeud+l4m/spvBLZykVPsDb7gZ3OroFOc5A== X-Received: by 2002:a17:902:229:: with SMTP id 38-v6mr7694467plc.429.1516836410514; Wed, 24 Jan 2018 15:26:50 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 24 Jan 2018 15:25:55 -0800 Message-Id: <20180124232625.30105-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180124232625.30105-1-richard.henderson@linaro.org> References: <20180124232625.30105-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::244 Subject: [Qemu-devel] [PATCH v3 15/45] target/hppa: Avoid privilege level decrease during branches X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 These instructions force the destination privilege level of the branch destination to be no higher than current. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 52 ++++++++++++++++++++++++++++++++++++++++++++-= ---- 1 file changed, 47 insertions(+), 5 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 6be9e0c3ff..4a69f05a91 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -1862,6 +1862,40 @@ static DisasJumpType do_ibranch(DisasContext *ctx, T= CGv_reg dest, return DISAS_NEXT; } =20 +/* Implement + * if (IAOQ_Front{30..31} < GR[b]{30..31}) + * IAOQ_Next{30..31} =E2=86=90 GR[b]{30..31}; + * else + * IAOQ_Next{30..31} =E2=86=90 IAOQ_Front{30..31}; + * which keeps the privilege level from being increased. + */ +static TCGv_reg do_ibranch_priv(DisasContext *ctx, TCGv_reg offset) +{ +#ifdef CONFIG_USER_ONLY + return offset; +#else + TCGv_reg dest; + switch (ctx->privilege) { + case 0: + /* Privilege 0 is maximum and is allowed to decrease. */ + return offset; + case 3: + /* Privilege 3 is minimum and is never allowed increase. */ + dest =3D get_temp(ctx); + tcg_gen_ori_reg(dest, offset, 3); + break; + default: + dest =3D tcg_temp_new(); + tcg_gen_andi_reg(dest, offset, -4); + tcg_gen_ori_reg(dest, dest, ctx->privilege); + tcg_gen_movcond_reg(TCG_COND_GTU, dest, dest, offset, dest, offset= ); + tcg_temp_free(dest); + break; + } + return dest; +#endif +} + #ifdef CONFIG_USER_ONLY /* On Linux, page zero is normally marked execute only + gateway. Therefore normal read or write is supposed to fail, but specific @@ -3441,6 +3475,7 @@ static DisasJumpType trans_be(DisasContext *ctx, uint= 32_t insn, bool is_l) unsigned n =3D extract32(insn, 1, 1); unsigned b =3D extract32(insn, 21, 5); target_sreg disp =3D assemble_17(insn); + TCGv_reg tmp; =20 /* unsigned s =3D low_uextract(insn, 13, 3); */ /* ??? It seems like there should be a good way of using @@ -3449,16 +3484,19 @@ static DisasJumpType trans_be(DisasContext *ctx, ui= nt32_t insn, bool is_l) manage along side branch delay slots. Therefore we handle entry into the gateway page via absolute address. */ =20 +#ifdef CONFIG_USER_ONLY /* Since we don't implement spaces, just branch. Do notice the special case of "be disp(*,r0)" using a direct branch to disp, so that we c= an goto_tb to the TB containing the syscall. */ if (b =3D=3D 0) { return do_dbranch(ctx, disp, is_l ? 31 : 0, n); - } else { - TCGv_reg tmp =3D get_temp(ctx); - tcg_gen_addi_reg(tmp, load_gpr(ctx, b), disp); - return do_ibranch(ctx, tmp, is_l ? 31 : 0, n); } +#endif + + tmp =3D get_temp(ctx); + tcg_gen_addi_reg(tmp, load_gpr(ctx, b), disp); + tmp =3D do_ibranch_priv(ctx, tmp); + return do_ibranch(ctx, tmp, is_l ? 31 : 0, n); } =20 static DisasJumpType trans_bl(DisasContext *ctx, uint32_t insn, @@ -3490,6 +3528,7 @@ static DisasJumpType trans_blr(DisasContext *ctx, uin= t32_t insn, =20 tcg_gen_shli_reg(tmp, load_gpr(ctx, rx), 3); tcg_gen_addi_reg(tmp, tmp, ctx->iaoq_f + 8); + /* The computation here never changes privilege level. */ return do_ibranch(ctx, tmp, link, n); } =20 @@ -3508,6 +3547,7 @@ static DisasJumpType trans_bv(DisasContext *ctx, uint= 32_t insn, tcg_gen_shli_reg(dest, load_gpr(ctx, rx), 3); tcg_gen_add_reg(dest, dest, load_gpr(ctx, rb)); } + dest =3D do_ibranch_priv(ctx, dest); return do_ibranch(ctx, dest, 0, n); } =20 @@ -3517,8 +3557,10 @@ static DisasJumpType trans_bve(DisasContext *ctx, ui= nt32_t insn, unsigned n =3D extract32(insn, 1, 1); unsigned rb =3D extract32(insn, 21, 5); unsigned link =3D extract32(insn, 13, 1) ? 2 : 0; + TCGv_reg dest; =20 - return do_ibranch(ctx, load_gpr(ctx, rb), link, n); + dest =3D do_ibranch_priv(ctx, load_gpr(ctx, rb)); + return do_ibranch(ctx, dest, link, n); } =20 static const DisasInsn table_branch[] =3D { --=20 2.14.3