From nobody Wed Feb 11 02:33:26 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516673910779826.7946102040182; Mon, 22 Jan 2018 18:18:30 -0800 (PST) Received: from localhost ([::1]:55277 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1edoAP-00049c-Vt for importer@patchew.org; Mon, 22 Jan 2018 21:18:30 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48751) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1edo1K-0005X9-Ge for qemu-devel@nongnu.org; Mon, 22 Jan 2018 21:09:07 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1edo1H-0003Vd-Ap for qemu-devel@nongnu.org; Mon, 22 Jan 2018 21:09:06 -0500 Received: from mail-qt0-x241.google.com ([2607:f8b0:400d:c0d::241]:39009) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1edo1H-0003VL-5C for qemu-devel@nongnu.org; Mon, 22 Jan 2018 21:09:03 -0500 Received: by mail-qt0-x241.google.com with SMTP id f4so26132370qtj.6 for ; Mon, 22 Jan 2018 18:09:03 -0800 (PST) Received: from x1.lan ([138.117.48.219]) by smtp.gmail.com with ESMTPSA id j19sm6514120qtc.1.2018.01.22.18.08.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 22 Jan 2018 18:09:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=c9YWIl6tXhNfTGOl08oSz/EeepIffg+Vm7Hcb1D6L/8=; b=jm/u2FWsq42xjFJQ8Df9aKIW2KXzHUMyv1qVjRXByYiEHkcDIpfDTRSZVTEEOjzQpm G3OL1C0cNqq2WA6L3pWuIVOrBEzmdNmRZq3pZlTjE7S9sSNVQBsKoreMICXE8oWEXH4f rPRgmrANh7GUst9+xY/nBr4QL1mE5of90xvFes2+RDhjlb00vUZsSYJ6aiVpGVDGCGSf gBG3U1n8Pn8FGqBqjSW0q//hCSq56GajUGyctNrQOruBoILSPunFzJJUOPujujcHlD3g awxhRnRNiHb27bb0KdLqO6t8s8IV/m84RP4yncPV6XhO1IjBVWWxPsv6NxLEdNnxAN/B 72Kg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=c9YWIl6tXhNfTGOl08oSz/EeepIffg+Vm7Hcb1D6L/8=; b=sffBPFacnYEsEauE8LImILSQFpN3DYT09gi8ZfdhM5Uxvamjk0zcF/yJFrX1+/69kb b9qyCtXHH5MO/PJWR+N0smtXjJ/sNAsGPgzhUKKBQdpKGJFesue5oPsksXOTyusXBK2T bU41exY4g9yrMkl3mTGh4qoGxzHD/DFt5ivK2whcVNx+qqnlYvoOMF5xRwr1EscltOWd +ZuVHE8mNmmGvjK/j1b5ONsOU+zPdoG0Hpvb1YUOMkynAiAoDMSLp+P+Wp0pHD5ZIfWu oQs13gNAefR/LC5pV2Gg9/21o0QuF7vKDpcSHAHhb3Ft1yyzYB1scVIFIp3D0SXOg3/9 yRkQ== X-Gm-Message-State: AKwxytdOsAdusPbfFWDipwFCp9zokdKWnBZ+pW8oX94iiVONTSjlWbmA caNuDlxa5AzgX/3sjznWQ8c= X-Google-Smtp-Source: AH8x225JneBXn1p4iCzFMER4xTtbdG2YTfRyxZ4on+sWQ6Bga3mcB0NIL7bAamDl8iCp4k/JgHKzag== X-Received: by 10.55.187.135 with SMTP id l129mr1418019qkf.322.1516673342735; Mon, 22 Jan 2018 18:09:02 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: Paolo Bonzini , Alistair Francis , Peter Maydell , Stefan Hajnoczi Date: Mon, 22 Jan 2018 23:08:12 -0300 Message-Id: <20180123020820.1288-9-f4bug@amsat.org> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180123020820.1288-1-f4bug@amsat.org> References: <20180123020820.1288-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::241 Subject: [Qemu-devel] [PATCH v9 08/16] sdhci: use a numeric value for the default CAPAB register X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E . Iglesias" , Andrey Smirnov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org, Kevin O'Connor , Marcel Apfelbaum Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 using many #defines is not portable when scaling to different HCI. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis --- hw/sd/sdhci.c | 74 +++++++++++++------------------------------------------= ---- 1 file changed, 16 insertions(+), 58 deletions(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 1331062306..1c781c4ba5 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -39,67 +39,25 @@ #define TYPE_SDHCI_BUS "sdhci-bus" #define SDHCI_BUS(obj) OBJECT_CHECK(SDBus, (obj), TYPE_SDHCI_BUS) =20 +#define MASKED_WRITE(reg, mask, val) (reg =3D (reg & (mask)) | (val)) + /* Default SD/MMC host controller features information, which will be * presented in CAPABILITIES register of generic SD host controller at res= et. - * If not stated otherwise: - * 0 - not supported, 1 - supported, other - prohibited. + * + * support: + * - 3.3v and 1.8v voltages + * - SDMA/ADMA1/ADMA2 + * - high-speed + * max host controller R/W buffers size: 512B + * max clock frequency for SDclock: 52 MHz + * timeout clock frequency: 52 MHz + * + * does not support: + * - 3.0v voltage + * - 64-bit system bus + * - suspend/resume */ -#define SDHC_CAPAB_64BITBUS 0ul /* 64-bit System Bus Support = */ -#define SDHC_CAPAB_18V 1ul /* Voltage support 1.8v */ -#define SDHC_CAPAB_30V 0ul /* Voltage support 3.0v */ -#define SDHC_CAPAB_33V 1ul /* Voltage support 3.3v */ -#define SDHC_CAPAB_SUSPRESUME 0ul /* Suspend/resume support */ -#define SDHC_CAPAB_SDMA 1ul /* SDMA support */ -#define SDHC_CAPAB_HIGHSPEED 1ul /* High speed support */ -#define SDHC_CAPAB_ADMA1 1ul /* ADMA1 support */ -#define SDHC_CAPAB_ADMA2 1ul /* ADMA2 support */ -/* Maximum host controller R/W buffers size - * Possible values: 512, 1024, 2048 bytes */ -#define SDHC_CAPAB_MAXBLOCKLENGTH 512ul -/* Maximum clock frequency for SDclock in MHz - * value in range 10-63 MHz, 0 - not defined */ -#define SDHC_CAPAB_BASECLKFREQ 52ul -#define SDHC_CAPAB_TOUNIT 1ul /* Timeout clock unit 0 - kHz, 1 - = MHz */ -/* Timeout clock frequency 1-63, 0 - not defined */ -#define SDHC_CAPAB_TOCLKFREQ 52ul - -/* Now check all parameters and calculate CAPABILITIES REGISTER value */ -#if SDHC_CAPAB_64BITBUS > 1 || SDHC_CAPAB_18V > 1 || SDHC_CAPAB_30V > 1 ||= \ - SDHC_CAPAB_33V > 1 || SDHC_CAPAB_SUSPRESUME > 1 || SDHC_CAPAB_SDMA > 1= || \ - SDHC_CAPAB_HIGHSPEED > 1 || SDHC_CAPAB_ADMA2 > 1 || SDHC_CAPAB_ADMA1 >= 1 ||\ - SDHC_CAPAB_TOUNIT > 1 -#error Capabilities features can have value 0 or 1 only! -#endif - -#if SDHC_CAPAB_MAXBLOCKLENGTH =3D=3D 512 -#define MAX_BLOCK_LENGTH 0ul -#elif SDHC_CAPAB_MAXBLOCKLENGTH =3D=3D 1024 -#define MAX_BLOCK_LENGTH 1ul -#elif SDHC_CAPAB_MAXBLOCKLENGTH =3D=3D 2048 -#define MAX_BLOCK_LENGTH 2ul -#else -#error Max host controller block size can have value 512, 1024 or 2048 onl= y! -#endif - -#if (SDHC_CAPAB_BASECLKFREQ > 0 && SDHC_CAPAB_BASECLKFREQ < 10) || \ - SDHC_CAPAB_BASECLKFREQ > 63 -#error SDclock frequency can have value in range 0, 10-63 only! -#endif - -#if SDHC_CAPAB_TOCLKFREQ > 63 -#error Timeout clock frequency can have value in range 0-63 only! -#endif - -#define SDHC_CAPAB_REG_DEFAULT \ - ((SDHC_CAPAB_64BITBUS << 28) | (SDHC_CAPAB_18V << 26) | \ - (SDHC_CAPAB_30V << 25) | (SDHC_CAPAB_33V << 24) | \ - (SDHC_CAPAB_SUSPRESUME << 23) | (SDHC_CAPAB_SDMA << 22) | \ - (SDHC_CAPAB_HIGHSPEED << 21) | (SDHC_CAPAB_ADMA1 << 20) | \ - (SDHC_CAPAB_ADMA2 << 19) | (MAX_BLOCK_LENGTH << 16) | \ - (SDHC_CAPAB_BASECLKFREQ << 8) | (SDHC_CAPAB_TOUNIT << 7) | \ - (SDHC_CAPAB_TOCLKFREQ)) - -#define MASKED_WRITE(reg, mask, val) (reg =3D (reg & (mask)) | (val)) +#define SDHC_CAPAB_REG_DEFAULT 0x057834b4 =20 static uint8_t sdhci_slotint(SDHCIState *s) { --=20 2.15.1