[Qemu-devel] [PATCH v2 00/16] target/arm: Prepatory work for SVE

Richard Henderson posted 16 patches 6 years, 2 months ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20180119045438.28582-1-richard.henderson@linaro.org
Test checkpatch failed
Test docker-build@min-glib passed
Test docker-mingw@fedora passed
Test docker-quick@centos6 passed
Test ppc passed
Test s390x passed
include/migration/vmstate.h |   9 +-
target/arm/cpu.h            | 227 +++++++++++++++-----------------------
target/arm/helper.h         |  46 ++++----
target/arm/translate.h      |   2 +-
linux-user/signal.c         |  22 ++--
target/arm/arch_dump.c      |   8 +-
target/arm/crypto_helper.c  | 184 ++++++++++++-------------------
target/arm/helper-a64.c     |   5 +-
target/arm/helper.c         | 263 ++++++++++++++++++++++++++++++++++++++++++--
target/arm/kvm32.c          |   4 +-
target/arm/kvm64.c          |  31 ++----
target/arm/machine.c        |  88 ++++++++++++++-
target/arm/neon_helper.c    | 162 ++++++++++++++-------------
target/arm/op_helper.c      |  17 ++-
target/arm/translate-a64.c  | 106 +++++++++---------
target/arm/translate.c      | 139 ++++++++++++-----------
16 files changed, 781 insertions(+), 532 deletions(-)
[Qemu-devel] [PATCH v2 00/16] target/arm: Prepatory work for SVE
Posted by Richard Henderson 6 years, 2 months ago
I believe that this addresses all of the comments Peter had with
respect to v1.  I did go ahead and add the system registers, so that
I could figure out how they're supposed to work.

This has been rebased to master so that it has no dependencies.


r~


Richard Henderson (16):
  target/arm: Mark disas_set_insn_syndrome inline
  target/arm: Use pointers in crypto helpers
  target/arm: Use pointers in neon zip/uzp helpers
  target/arm: Use pointers in neon tbl helper
  target/arm: Change the type of vfp.regs
  target/arm: Add aa{32,64}_vfp_{dreg,qreg} helpers
  vmstate: Add VMSTATE_UINT64_SUB_ARRAY
  target/arm: Expand vector registers for SVE
  target/arm: Add predicate registers for SVE
  target/arm: Add ARM_FEATURE_SVE
  target/arm: Add SVE to migration state
  target/arm: Add ZCR_ELx
  target/arm: Move cpu_get_tb_cpu_state out of line
  target/arm: Hoist store to flags output in cpu_get_tb_cpu_state
  target/arm: Simplify fp_exception_el for user-only
  target/arm: Add SVE state to TB->FLAGS

 include/migration/vmstate.h |   9 +-
 target/arm/cpu.h            | 227 +++++++++++++++-----------------------
 target/arm/helper.h         |  46 ++++----
 target/arm/translate.h      |   2 +-
 linux-user/signal.c         |  22 ++--
 target/arm/arch_dump.c      |   8 +-
 target/arm/crypto_helper.c  | 184 ++++++++++++-------------------
 target/arm/helper-a64.c     |   5 +-
 target/arm/helper.c         | 263 ++++++++++++++++++++++++++++++++++++++++++--
 target/arm/kvm32.c          |   4 +-
 target/arm/kvm64.c          |  31 ++----
 target/arm/machine.c        |  88 ++++++++++++++-
 target/arm/neon_helper.c    | 162 ++++++++++++++-------------
 target/arm/op_helper.c      |  17 ++-
 target/arm/translate-a64.c  | 106 +++++++++---------
 target/arm/translate.c      | 139 ++++++++++++-----------
 16 files changed, 781 insertions(+), 532 deletions(-)

-- 
2.14.3


Re: [Qemu-devel] [PATCH v2 00/16] target/arm: Prepatory work for SVE
Posted by no-reply@patchew.org 6 years, 2 months ago
Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 20180119045438.28582-1-richard.henderson@linaro.org
Subject: [Qemu-devel] [PATCH v2 00/16] target/arm: Prepatory work for SVE

=== TEST SCRIPT BEGIN ===
#!/bin/bash

BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0

git config --local diff.renamelimit 0
git config --local diff.renames True

commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
    echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
    if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
        failed=1
        echo
    fi
    n=$((n+1))
done

exit $failed
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]               patchew/20180119045438.28582-1-richard.henderson@linaro.org -> patchew/20180119045438.28582-1-richard.henderson@linaro.org
 * [new tag]               patchew/20180119050005.29392-1-sjitindarsingh@gmail.com -> patchew/20180119050005.29392-1-sjitindarsingh@gmail.com
Switched to a new branch 'test'
6308b3eb42 target/arm: Add SVE state to TB->FLAGS
bc0bf3ebae target/arm: Simplify fp_exception_el for user-only
9cdaf60c2f target/arm: Hoist store to flags output in cpu_get_tb_cpu_state
1547b70c1e target/arm: Move cpu_get_tb_cpu_state out of line
b01bb5ca6b target/arm: Add ZCR_ELx
a42658d26a target/arm: Add SVE to migration state
03a80b68c0 target/arm: Add ARM_FEATURE_SVE
a396b26009 target/arm: Add predicate registers for SVE
0ccce9b3c9 target/arm: Expand vector registers for SVE
aea9739609 vmstate: Add VMSTATE_UINT64_SUB_ARRAY
119ea30dc0 target/arm: Add aa{32, 64}_vfp_{dreg, qreg} helpers
2acd7c7cec target/arm: Change the type of vfp.regs
ae2da084a4 target/arm: Use pointers in neon tbl helper
af4b1905c4 target/arm: Use pointers in neon zip/uzp helpers
9228c6c201 target/arm: Use pointers in crypto helpers
164bf2cd53 target/arm: Mark disas_set_insn_syndrome inline

=== OUTPUT BEGIN ===
Checking PATCH 1/16: target/arm: Mark disas_set_insn_syndrome inline...
Checking PATCH 2/16: target/arm: Use pointers in crypto helpers...
Checking PATCH 3/16: target/arm: Use pointers in neon zip/uzp helpers...
ERROR: trailing whitespace
#315: FILE: target/arm/translate.c:4691:
+    $

total: 1 errors, 0 warnings, 373 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 4/16: target/arm: Use pointers in neon tbl helper...
Checking PATCH 5/16: target/arm: Change the type of vfp.regs...
Checking PATCH 6/16: target/arm: Add aa{32, 64}_vfp_{dreg, qreg} helpers...
ERROR: spaces required around that '*' (ctx:VxV)
#82: FILE: target/arm/arch_dump.c:104:
+        note.vfp.vregs[2*i + 0] = cpu_to_dump64(s, q[0]);
                         ^

ERROR: spaces required around that '*' (ctx:VxV)
#83: FILE: target/arm/arch_dump.c:105:
+        note.vfp.vregs[2*i + 1] = cpu_to_dump64(s, q[1]);
                         ^

total: 2 errors, 0 warnings, 327 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 7/16: vmstate: Add VMSTATE_UINT64_SUB_ARRAY...
Checking PATCH 8/16: target/arm: Expand vector registers for SVE...
Checking PATCH 9/16: target/arm: Add predicate registers for SVE...
Checking PATCH 10/16: target/arm: Add ARM_FEATURE_SVE...
Checking PATCH 11/16: target/arm: Add SVE to migration state...
Checking PATCH 12/16: target/arm: Add ZCR_ELx...
Checking PATCH 13/16: target/arm: Move cpu_get_tb_cpu_state out of line...
Checking PATCH 14/16: target/arm: Hoist store to flags output in cpu_get_tb_cpu_state...
Checking PATCH 15/16: target/arm: Simplify fp_exception_el for user-only...
Checking PATCH 16/16: target/arm: Add SVE state to TB->FLAGS...
=== OUTPUT END ===

Test command exited with code: 1


---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@freelists.org
Re: [Qemu-devel] [PATCH v2 00/16] target/arm: Prepatory work for SVE
Posted by Alex Bennée 6 years, 2 months ago
Richard Henderson <richard.henderson@linaro.org> writes:

> I believe that this addresses all of the comments Peter had with
> respect to v1.  I did go ahead and add the system registers, so that
> I could figure out how they're supposed to work.
>
> This has been rebased to master so that it has no dependencies.

I've completed my review pass for this series now, looking pretty good.

--
Alex Bennée

Re: [Qemu-devel] [PATCH v2 00/16] target/arm: Prepatory work for SVE
Posted by Peter Maydell 6 years, 2 months ago
On 19 January 2018 at 04:54, Richard Henderson
<richard.henderson@linaro.org> wrote:
> I believe that this addresses all of the comments Peter had with
> respect to v1.  I did go ahead and add the system registers, so that
> I could figure out how they're supposed to work.
>
> This has been rebased to master so that it has no dependencies.
>
>
> r~
>
>
> Richard Henderson (16):
> 1  target/arm: Mark disas_set_insn_syndrome inline
> 2  target/arm: Use pointers in crypto helpers
> 3  target/arm: Use pointers in neon zip/uzp helpers
> 4  target/arm: Use pointers in neon tbl helper
> 5  target/arm: Change the type of vfp.regs
> 6  target/arm: Add aa{32,64}_vfp_{dreg,qreg} helpers
> 7  vmstate: Add VMSTATE_UINT64_SUB_ARRAY
> 8  target/arm: Expand vector registers for SVE
> 9  target/arm: Add predicate registers for SVE
> 10 target/arm: Add ARM_FEATURE_SVE
> 11 target/arm: Add SVE to migration state
> 12 target/arm: Add ZCR_ELx
> 13 target/arm: Move cpu_get_tb_cpu_state out of line
> 14 target/arm: Hoist store to flags output in cpu_get_tb_cpu_state
> 15 target/arm: Simplify fp_exception_el for user-only
> 16 target/arm: Add SVE state to TB->FLAGS

In the interests of reducing the size of this patch set, I'm going to
take patches 1..7, 10, 13..15 into target-arm.next. (Alex, I know
you had a nit about changing the type of a variable in patch 4 but
I think I'd rather just take the patchset rather than do another
round with it for that.)

The target-arm.next branch (which rebases!) with those patches is at:

https://git.linaro.org/people/peter.maydell/qemu-arm.git target-arm.next

I expect I'll make a pullreq either tomorrow or more likely Thursday.

thanks
-- PMM

Re: [Qemu-devel] [PATCH v2 00/16] target/arm: Prepatory work for SVE
Posted by Alex Bennée 6 years, 2 months ago
Peter Maydell <peter.maydell@linaro.org> writes:

> On 19 January 2018 at 04:54, Richard Henderson
> <richard.henderson@linaro.org> wrote:
>> I believe that this addresses all of the comments Peter had with
>> respect to v1.  I did go ahead and add the system registers, so that
>> I could figure out how they're supposed to work.
>>
>> This has been rebased to master so that it has no dependencies.
>>
>>
>> r~
>>
>>
>> Richard Henderson (16):
>> 1  target/arm: Mark disas_set_insn_syndrome inline
>> 2  target/arm: Use pointers in crypto helpers
>> 3  target/arm: Use pointers in neon zip/uzp helpers
>> 4  target/arm: Use pointers in neon tbl helper
>> 5  target/arm: Change the type of vfp.regs
>> 6  target/arm: Add aa{32,64}_vfp_{dreg,qreg} helpers
>> 7  vmstate: Add VMSTATE_UINT64_SUB_ARRAY
>> 8  target/arm: Expand vector registers for SVE
>> 9  target/arm: Add predicate registers for SVE
>> 10 target/arm: Add ARM_FEATURE_SVE
>> 11 target/arm: Add SVE to migration state
>> 12 target/arm: Add ZCR_ELx
>> 13 target/arm: Move cpu_get_tb_cpu_state out of line
>> 14 target/arm: Hoist store to flags output in cpu_get_tb_cpu_state
>> 15 target/arm: Simplify fp_exception_el for user-only
>> 16 target/arm: Add SVE state to TB->FLAGS
>
> In the interests of reducing the size of this patch set, I'm going to
> take patches 1..7, 10, 13..15 into target-arm.next. (Alex, I know
> you had a nit about changing the type of a variable in patch 4 but
> I think I'd rather just take the patchset rather than do another
> round with it for that.)

Sure - it was only a nit ;-)

>
> The target-arm.next branch (which rebases!) with those patches is at:
>
> https://git.linaro.org/people/peter.maydell/qemu-arm.git target-arm.next
>
> I expect I'll make a pullreq either tomorrow or more likely Thursday.
>
> thanks
> -- PMM


--
Alex Bennée