From nobody Tue Oct 28 01:56:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516156106449898.9443454196781; Tue, 16 Jan 2018 18:28:26 -0800 (PST) Received: from localhost ([::1]:55864 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebdSj-000135-H2 for importer@patchew.org; Tue, 16 Jan 2018 21:28:25 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45607) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebdQK-0007re-Ic for qemu-devel@nongnu.org; Tue, 16 Jan 2018 21:25:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebdQI-0001JP-7t for qemu-devel@nongnu.org; Tue, 16 Jan 2018 21:25:56 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:33707) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebdQH-0001H0-S5; Tue, 16 Jan 2018 21:25:54 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3zLrY53F1jz9sRV; Wed, 17 Jan 2018 13:25:44 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1516155945; bh=ckUCiLdLt+u2fvu3HMOGRCSjiqw8BkZz5M4/Ji4mQQQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hf4yd0zO/3WqNOndUL/3LM/RYW9wXCoogfuEPAIj/h3pshe9OpK3n0jJXzbwLOqDS ImpWhQqTYG/VML3rAM1FXOvBrKJcZEo002LS07F+zvXVD8ts3Nm5vLutyce+s+7PmN FI1mSBhH9G9nXIhRsG2cxGkliq2Lrxi18g6NwlGE= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 17 Jan 2018 13:25:09 +1100 Message-Id: <20180117022525.31767-7-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180117022525.31767-1-david@gibson.dropbear.id.au> References: <20180117022525.31767-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 06/22] spapr: Handle VMX/VSX presence as an spapr capability flag X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, surajjs@au1.ibm.com, joserz@linux.vnet.ibm.com, qemu-devel@nongnu.org, groug@kaod.org, qemu-ppc@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" We currently have some conditionals in the spapr device tree code to decide whether or not to advertise the availability of the VMX (aka Altivec) and VSX vector extensions to the guest, based on whether the guest cpu has those features. This can lead to confusion and subtle failures on migration, since it makes a guest visible change based only on host capabilities. We now have a better mechanism for this, in spapr capabilities flags, which explicitly depend on user options rather than host capabilities. Rework the advertisement of VSX and VMX based on a new VSX capability. We no longer bother with a conditional for VMX support, because every CPU that's ever been supported by the pseries machine type supports VMX. NOTE: Some userspace distributions (e.g. RHEL7.4) already rely on availability of VSX in libc, so using cap-vsx=3Doff may lead to a fatal SIGILL in init. Signed-off-by: David Gibson Reviewed-by: Greg Kurz --- hw/ppc/spapr.c | 20 +++++++++++--------- hw/ppc/spapr_caps.c | 25 +++++++++++++++++++++++++ include/hw/ppc/spapr.h | 3 +++ 3 files changed, 39 insertions(+), 9 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 3451d0806d..eca9f11c91 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -557,14 +557,16 @@ static void spapr_populate_cpu_dt(CPUState *cs, void = *fdt, int offset, segs, sizeof(segs)))); } =20 - /* Advertise VMX/VSX (vector extensions) if available - * 0 / no property =3D=3D no vector extensions + /* Advertise VSX (vector extensions) if available * 1 =3D=3D VMX / Altivec available - * 2 =3D=3D VSX available */ - if (env->insns_flags & PPC_ALTIVEC) { - uint32_t vmx =3D (env->insns_flags2 & PPC2_VSX) ? 2 : 1; - - _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", vmx))); + * 2 =3D=3D VSX available + * + * Only CPUs for which we create core types in spapr_cpu_core.c + * are possible, and all of those have VMX */ + if (spapr_has_cap(spapr, SPAPR_CAP_VSX)) { + _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", 2))); + } else { + _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", 1))); } =20 /* Advertise DFP (Decimal Floating Point) if available @@ -3832,7 +3834,7 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) */ mc->numa_mem_align_shift =3D 28; =20 - smc->default_caps =3D spapr_caps(0); + smc->default_caps =3D spapr_caps(SPAPR_CAP_VSX); spapr_caps_add_properties(smc, &error_abort); } =20 @@ -3914,7 +3916,7 @@ static void spapr_machine_2_11_class_options(MachineC= lass *mc) sPAPRMachineClass *smc =3D SPAPR_MACHINE_CLASS(mc); =20 spapr_machine_2_12_class_options(mc); - smc->default_caps =3D spapr_caps(SPAPR_CAP_HTM); + smc->default_caps =3D spapr_caps(SPAPR_CAP_HTM | SPAPR_CAP_VSX); SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_11); } =20 diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index cad40fe49a..7c855c67ad 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -57,6 +57,19 @@ static void cap_htm_allow(sPAPRMachineState *spapr, Erro= r **errp) } } =20 +static void cap_vsx_allow(sPAPRMachineState *spapr, Error **errp) +{ + PowerPCCPU *cpu =3D POWERPC_CPU(first_cpu); + CPUPPCState *env =3D &cpu->env; + + /* Allowable CPUs in spapr_cpu_core.c should already have gotten + * rid of anything that doesn't do VMX */ + g_assert(env->insns_flags & PPC_ALTIVEC); + if (!(env->insns_flags2 & PPC2_VSX)) { + error_setg(errp, "VSX support not available, try cap-vsx=3Doff"); + } +} + static sPAPRCapabilityInfo capability_table[] =3D { { .name =3D "htm", @@ -65,6 +78,13 @@ static sPAPRCapabilityInfo capability_table[] =3D { .allow =3D cap_htm_allow, /* TODO: add cap_htm_disallow */ }, + { + .name =3D "vsx", + .description =3D "Allow Vector Scalar Extensions (VSX)", + .flag =3D SPAPR_CAP_VSX, + .allow =3D cap_vsx_allow, + /* TODO: add cap_vsx_disallow */ + }, }; =20 static sPAPRCapabilities default_caps_with_cpu(sPAPRMachineState *spapr, @@ -81,6 +101,11 @@ static sPAPRCapabilities default_caps_with_cpu(sPAPRMac= hineState *spapr, caps.mask &=3D ~SPAPR_CAP_HTM; } =20 + if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_2_06, + 0, spapr->max_compat_pvr)) { + caps.mask &=3D ~SPAPR_CAP_VSX; + } + return caps; } =20 diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 5c85f39c3b..148a03d189 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -59,6 +59,9 @@ typedef enum { /* Hardware Transactional Memory */ #define SPAPR_CAP_HTM 0x0000000000000001ULL =20 +/* Vector Scalar Extensions */ +#define SPAPR_CAP_VSX 0x0000000000000002ULL + typedef struct sPAPRCapabilities sPAPRCapabilities; struct sPAPRCapabilities { uint64_t mask; --=20 2.14.3