From nobody Tue Oct 28 01:58:02 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516156749743774.4411352358203; Tue, 16 Jan 2018 18:39:09 -0800 (PST) Received: from localhost ([::1]:55921 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebdd6-0001Ja-Uq for importer@patchew.org; Tue, 16 Jan 2018 21:39:08 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45843) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebdQQ-0007wN-D0 for qemu-devel@nongnu.org; Tue, 16 Jan 2018 21:26:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebdQN-0001PX-Kz for qemu-devel@nongnu.org; Tue, 16 Jan 2018 21:26:02 -0500 Received: from ozlabs.org ([103.22.144.67]:38441) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebdQN-0001Ma-6K; Tue, 16 Jan 2018 21:25:59 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3zLrY93Wfzz9t3J; Wed, 17 Jan 2018 13:25:48 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1516155949; bh=a/PP/5wiXFElD2UD1V85QkpJLjyK9IgjZxDZ5dIfljE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NBH51DYej9wCkziGKaIp1/XxaniZJ8yFHjXTJ5FbnCjVI9Uvke27jUxq7YeywQ62l s21aVB4IihPWZWOeldoJC21GWV5Tr8WwtSMO1ECCpD5pTahTPwX/CDYBMLISbB/20J FUj1u5xrVeeAidQKxxZQwA0qQ57tZRo8d7O+N+fc= From: David Gibson To: peter.maydell@linaro.org Date: Wed, 17 Jan 2018 13:25:25 +1100 Message-Id: <20180117022525.31767-23-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180117022525.31767-1-david@gibson.dropbear.id.au> References: <20180117022525.31767-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 22/22] target-ppc: Fix booke206 tlbwe TLB instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, surajjs@au1.ibm.com, Luc MICHEL , joserz@linux.vnet.ibm.com, qemu-devel@nongnu.org, groug@kaod.org, qemu-ppc@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Luc MICHEL When overwritting a valid TLB entry with a new one, the previous page were not flushed in QEMU TLB, leading to incoherent mapping. This commit fixes this. Signed-off-by: Luc MICHEL Signed-off-by: David Gibson --- target/ppc/mmu_helper.c | 32 +++++++++++++++++++++++++++----- 1 file changed, 27 insertions(+), 5 deletions(-) diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 2a1f9902c9..298c15e961 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -2570,6 +2570,17 @@ void helper_booke_setpid(CPUPPCState *env, uint32_t = pidn, target_ulong pid) tlb_flush(CPU(cpu)); } =20 +static inline void flush_page(CPUPPCState *env, ppcmas_tlb_t *tlb) +{ + PowerPCCPU *cpu =3D ppc_env_get_cpu(env); + + if (booke206_tlb_to_page_size(env, tlb) =3D=3D TARGET_PAGE_SIZE) { + tlb_flush_page(CPU(cpu), tlb->mas2 & MAS2_EPN_MASK); + } else { + tlb_flush(CPU(cpu)); + } +} + void helper_booke206_tlbwe(CPUPPCState *env) { PowerPCCPU *cpu =3D ppc_env_get_cpu(env); @@ -2628,6 +2639,21 @@ void helper_booke206_tlbwe(CPUPPCState *env) if (msr_gs) { cpu_abort(CPU(cpu), "missing HV implementation\n"); } + + if (tlb->mas1 & MAS1_VALID) { + /* Invalidate the page in QEMU TLB if it was a valid entry. + * + * In "PowerPC e500 Core Family Reference Manual, Rev. 1", + * Section "12.4.2 TLB Write Entry (tlbwe) Instruction": + * (https://www.nxp.com/docs/en/reference-manual/E500CORERM.pdf) + * + * "Note that when an L2 TLB entry is written, it may be displacin= g an + * already valid entry in the same L2 TLB location (a victim). If a + * valid L1 TLB entry corresponds to the L2 MMU victim entry, that= L1 + * TLB entry is automatically invalidated." */ + flush_page(env, tlb); + } + tlb->mas7_3 =3D ((uint64_t)env->spr[SPR_BOOKE_MAS7] << 32) | env->spr[SPR_BOOKE_MAS3]; tlb->mas1 =3D env->spr[SPR_BOOKE_MAS1]; @@ -2663,11 +2689,7 @@ void helper_booke206_tlbwe(CPUPPCState *env) tlb->mas1 &=3D ~MAS1_IPROT; } =20 - if (booke206_tlb_to_page_size(env, tlb) =3D=3D TARGET_PAGE_SIZE) { - tlb_flush_page(CPU(cpu), tlb->mas2 & MAS2_EPN_MASK); - } else { - tlb_flush(CPU(cpu)); - } + flush_page(env, tlb); } =20 static inline void booke206_tlb_to_mas(CPUPPCState *env, ppcmas_tlb_t *tlb) --=20 2.14.3