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[24.181.135.57]) by smtp.gmail.com with ESMTPSA id y7sm3875780pfe.48.2018.01.16.08.46.07 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 16 Jan 2018 08:46:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=FUUWRYtwa278VZrUKwI2J5+6Tu8CghM2hw9X/xV8zwA=; b=QG6ttO9JU1DNfAmlIpgrCexIAQNBb/Su2KM4PYX6IAnN6/CrAHq5oXkAyhyO7AsxpG 3ef5so/sdcK84qVIwH2av0te20mZioWwzZqTWh3SDTolZ64U6dxVa0M5H5FeUfRq+l+o wMvlH7RFyiYciz41S7GHv/jNtJv1K4PevQuo4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=FUUWRYtwa278VZrUKwI2J5+6Tu8CghM2hw9X/xV8zwA=; b=iBgdrQsj80NO4HKWKYtpIGC/6acLG+ml80GULOVy5OnZpNkJFc6Zfhy0hykeHkyg6Y yDDExm0pRDPIXOUjyW93j8SD5p2HtCwrcFLLfT54BOmJ3vETIFTNFB9VOB7J7v3KoWJJ inLS6aOsJNwsGIChCmLo7yutAOHs6XTEcBHjvzVrRJzu4BGCmiRKk4rKg+uHt+oWUdsa GxXTFtEdzaC7w/yMXhDXi8ymiTFD3BeOQV9ow2TkCCT3wjZkzkO5SgGOIn64iFS0EtXS 412m4xN5i1OuLhnAlqOhWUCbkYvs7BqGr8g+z6WS9VVcRWc/ov41u9iypC0pdNLoHKCo 4RUQ== X-Gm-Message-State: AKGB3mLC6JHNXW+un4liBeTavmxRBCQebukhKgT1jAD+patVmenj8DK1 ibsKDIY3K8BiQcmggmZDu+rJ10f3w6k= X-Google-Smtp-Source: ACJfBovhsQyK2tW/seEUFEfZ6lu2fQLL8/hzWMslBg5qwpu30jprZx2Ux98OW5U7QoWUx15+/w29rA== X-Received: by 10.84.151.70 with SMTP id i64mr40148525pli.337.1516121169671; Tue, 16 Jan 2018 08:46:09 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 08:46:00 -0800 Message-Id: <20180116164600.7480-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180116164600.7480-1-richard.henderson@linaro.org> References: <20180116164600.7480-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::242 Subject: [Qemu-devel] [PULL v2 4/4] tcg/ppc: Allow a 32-bit offset to the constant pool X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" We recently relaxed the limit of the number of opcodes that can appear in a TranslationBlock. In certain cases this has resulted in relocation overflow. Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.inc.c | 67 ++++++++++++++++++++++++++++----------------= ---- 1 file changed, 39 insertions(+), 28 deletions(-) diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c index 74f9b4aa34..86f7de5f7e 100644 --- a/tcg/ppc/tcg-target.inc.c +++ b/tcg/ppc/tcg-target.inc.c @@ -222,33 +222,6 @@ static inline void tcg_out_bc_noaddr(TCGContext *s, in= t insn) tcg_out32(s, insn | retrans); } =20 -static void patch_reloc(tcg_insn_unit *code_ptr, int type, - intptr_t value, intptr_t addend) -{ - tcg_insn_unit *target; - tcg_insn_unit old; - - value +=3D addend; - target =3D (tcg_insn_unit *)value; - - switch (type) { - case R_PPC_REL14: - reloc_pc14(code_ptr, target); - break; - case R_PPC_REL24: - reloc_pc24(code_ptr, target); - break; - case R_PPC_ADDR16: - assert(value =3D=3D (int16_t)value); - old =3D *code_ptr; - old =3D deposit32(old, 0, 16, value); - *code_ptr =3D old; - break; - default: - tcg_abort(); - } -} - /* parse target specific constraints */ static const char *target_parse_constraint(TCGArgConstraint *ct, const char *ct_str, TCGType typ= e) @@ -552,6 +525,43 @@ static const uint32_t tcg_to_isel[] =3D { [TCG_COND_GTU] =3D ISEL | BC_(7, CR_GT), }; =20 +static void patch_reloc(tcg_insn_unit *code_ptr, int type, + intptr_t value, intptr_t addend) +{ + tcg_insn_unit *target; + tcg_insn_unit old; + + value +=3D addend; + target =3D (tcg_insn_unit *)value; + + switch (type) { + case R_PPC_REL14: + reloc_pc14(code_ptr, target); + break; + case R_PPC_REL24: + reloc_pc24(code_ptr, target); + break; + case R_PPC_ADDR16: + /* We are abusing this relocation type. This points to a pair + of insns, addis + load. If the displacement is small, we + can nop out the addis. */ + if (value =3D=3D (int16_t)value) { + code_ptr[0] =3D NOP; + old =3D deposit32(code_ptr[1], 0, 16, value); + code_ptr[1] =3D deposit32(old, 16, 5, TCG_REG_TB); + } else { + int16_t lo =3D value; + int hi =3D value - lo; + assert(hi + lo =3D=3D value); + code_ptr[0] =3D deposit32(code_ptr[0], 0, 16, hi >> 16); + code_ptr[1] =3D deposit32(code_ptr[1], 0, 16, lo); + } + break; + default: + g_assert_not_reached(); + } +} + static void tcg_out_mem_long(TCGContext *s, int opi, int opx, TCGReg rt, TCGReg base, tcg_target_long offset); =20 @@ -690,7 +700,8 @@ static void tcg_out_movi_int(TCGContext *s, TCGType typ= e, TCGReg ret, if (!in_prologue && USE_REG_TB) { new_pool_label(s, arg, R_PPC_ADDR16, s->code_ptr, -(intptr_t)s->code_gen_ptr); - tcg_out32(s, LD | TAI(ret, TCG_REG_TB, 0)); + tcg_out32(s, ADDIS | TAI(ret, TCG_REG_TB, 0)); + tcg_out32(s, LD | TAI(ret, ret, 0)); return; } =20 --=20 2.14.3