From nobody Tue Feb 10 04:16:55 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15158205158541016.260292394086; Fri, 12 Jan 2018 21:15:15 -0800 (PST) Received: from localhost ([::1]:38949 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eaE9y-0005ZH-Px for importer@patchew.org; Sat, 13 Jan 2018 00:15:14 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47263) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eaE3I-0000uo-ON for qemu-devel@nongnu.org; Sat, 13 Jan 2018 00:08:22 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eaE3E-0004Zc-PS for qemu-devel@nongnu.org; Sat, 13 Jan 2018 00:08:20 -0500 Received: from mail-qt0-x242.google.com ([2607:f8b0:400d:c0d::242]:42832) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eaE3E-0004ZE-Jx for qemu-devel@nongnu.org; Sat, 13 Jan 2018 00:08:16 -0500 Received: by mail-qt0-x242.google.com with SMTP id c2so8545984qtn.9 for ; Fri, 12 Jan 2018 21:08:16 -0800 (PST) Received: from x1.local ([138.117.48.219]) by smtp.gmail.com with ESMTPSA id d26sm5165209qtk.54.2018.01.12.21.08.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 12 Jan 2018 21:08:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=j8Xp8Ayv08t1/xE5LS43lsvcEHREQDX38HAij2rm1zo=; b=OxAJb90LJbaauZvz/6bo+smlLODMSGSmYkEQjDZUwa5OJ8tJWW3dJcsJPic9hJO/9O 6SZw1HAvaNTUm/LRu8kaGgMHtnzM453AIpAg5Np05mKABrxRctePVVi4w++eSVJa2PvO NP7LlHn1E2QEq8qS38Yz1BjvZZcMpdCnpTcpSscyHVlz+/y6YPDecK+jTR1IO859TYiM oKg4vywLoYsaGOnbjG3dQKet2VKyYKual5uZUezvggVBk2xu/PDP5JmvOW5KG8RyFrgK XZoVq32deVU8QTSibLWvEAIYhM8TnvFsdtVbNkfJ1vVuT08B9dD+fcHcI6LrEEGKPFgU 4TBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=j8Xp8Ayv08t1/xE5LS43lsvcEHREQDX38HAij2rm1zo=; b=Z6jBaSOp4xLswagbMnYGRjqqsc5t83HeBiNcKCjQAH6kQW8MEercz7NicWQ0Jr48aa 5fv8soJ41xr/P2SPoSiSX+zAS5448cs9BPQybgRmPpklbPY2Ip7PAazwnSMe5TMfqawl hB0yoAg+uBoJ2cM3vbuqdYp/kzzTASJlSRjZMoALtPKMLZiOZKFvX7d68pAjK6WDNvVA G9/DiBVe2KdipMo6zr5fi4svSPagqSdyARmYzrHkeRQmWCOgjEQCwSYnZxv+4CpsabvE +r9M6Jbf4uOwkAI+bYMbkxLye2WuoIQvRa3ss4EjgCaUCoU112Xn8ypv/FbjQEFX6W+M FKtA== X-Gm-Message-State: AKwxytckuHIXjkJOGXKyCoyMENB3EsY+v+83c3yjZhJi36IyaiemJUTU XZ7c3CflLjFEBve+95sSDbI= X-Google-Smtp-Source: ACJfBosLVswOw/iYYuljMGY0gruPSR9e5amRzKcZqycuR472wd4tDQeW8F8wgU17eaR86deUXB4lFw== X-Received: by 10.237.61.33 with SMTP id g30mr16938851qtf.82.1515820096211; Fri, 12 Jan 2018 21:08:16 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: Alistair Francis , Peter Maydell , Kevin O'Connor , Paolo Bonzini , Marcel Apfelbaum , Gerd Hoffmann , "Michael S . Tsirkin" Date: Sat, 13 Jan 2018 02:07:16 -0300 Message-Id: <20180113050717.22969-14-f4bug@amsat.org> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180113050717.22969-1-f4bug@amsat.org> References: <20180113050717.22969-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::242 Subject: [Qemu-devel] [PATCH v7 13/14] sdhci: fix the PCI device, using the PCI address space for DMA X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E . Iglesias" , Andrey Smirnov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 While SysBus devices can use the get_system_memory() address space, PCI devices should use the bus master address space for DMA. Suggested-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Peter Maydell --- Should we check for the PCI_COMMAND_MASTER bit before using pci_get_address_space()? include/hw/sd/sdhci.h | 1 + hw/sd/sdhci.c | 33 +++++++++++++++++++-------------- 2 files changed, 20 insertions(+), 14 deletions(-) diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index 442e30aff2..4a102b86ce 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -41,6 +41,7 @@ typedef struct SDHCIState { /*< public >*/ SDBus sdbus; MemoryRegion iomem; + AddressSpace *dma_as; =20 QEMUTimer *insert_timer; /* timer for 'changing' sd card. */ QEMUTimer *transfer_timer; diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 226a22c5fb..024b559f14 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -496,7 +496,7 @@ static void sdhci_sdma_transfer_multi_blocks(SDHCIState= *s) s->blkcnt--; } } - dma_memory_write(&address_space_memory, s->sdmasysad, + dma_memory_write(s->dma_as, s->sdmasysad, &s->fifo_buffer[begin], s->data_count - begin= ); s->sdmasysad +=3D s->data_count - begin; if (s->data_count =3D=3D block_size) { @@ -518,7 +518,7 @@ static void sdhci_sdma_transfer_multi_blocks(SDHCIState= *s) s->data_count =3D block_size; boundary_count -=3D block_size - begin; } - dma_memory_read(&address_space_memory, s->sdmasysad, + dma_memory_read(s->dma_as, s->sdmasysad, &s->fifo_buffer[begin], s->data_count - begin); s->sdmasysad +=3D s->data_count - begin; if (s->data_count =3D=3D block_size) { @@ -556,11 +556,9 @@ static void sdhci_sdma_transfer_single_block(SDHCIStat= e *s) for (n =3D 0; n < datacnt; n++) { s->fifo_buffer[n] =3D sdbus_read_data(&s->sdbus); } - dma_memory_write(&address_space_memory, s->sdmasysad, s->fifo_buff= er, - datacnt); + dma_memory_write(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt); } else { - dma_memory_read(&address_space_memory, s->sdmasysad, s->fifo_buffe= r, - datacnt); + dma_memory_read(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt); for (n =3D 0; n < datacnt; n++) { sdbus_write_data(&s->sdbus, s->fifo_buffer[n]); } @@ -584,7 +582,7 @@ static void get_adma_description(SDHCIState *s, ADMADes= cr *dscr) hwaddr entry_addr =3D (hwaddr)s->admasysaddr; switch (SDHC_DMA_TYPE(s->hostctl)) { case SDHC_CTRL_ADMA2_32: - dma_memory_read(&address_space_memory, entry_addr, (uint8_t *)&adm= a2, + dma_memory_read(s->dma_as, entry_addr, (uint8_t *)&adma2, sizeof(adma2)); adma2 =3D le64_to_cpu(adma2); /* The spec does not specify endianness of descriptor table. @@ -596,7 +594,7 @@ static void get_adma_description(SDHCIState *s, ADMADes= cr *dscr) dscr->incr =3D 8; break; case SDHC_CTRL_ADMA1_32: - dma_memory_read(&address_space_memory, entry_addr, (uint8_t *)&adm= a1, + dma_memory_read(s->dma_as, entry_addr, (uint8_t *)&adma1, sizeof(adma1)); adma1 =3D le32_to_cpu(adma1); dscr->addr =3D (hwaddr)(adma1 & 0xFFFFF000); @@ -609,12 +607,12 @@ static void get_adma_description(SDHCIState *s, ADMAD= escr *dscr) } break; case SDHC_CTRL_ADMA2_64: - dma_memory_read(&address_space_memory, entry_addr, + dma_memory_read(s->dma_as, entry_addr, (uint8_t *)(&dscr->attr), 1); - dma_memory_read(&address_space_memory, entry_addr + 2, + dma_memory_read(s->dma_as, entry_addr + 2, (uint8_t *)(&dscr->length), 2); dscr->length =3D le16_to_cpu(dscr->length); - dma_memory_read(&address_space_memory, entry_addr + 4, + dma_memory_read(s->dma_as, entry_addr + 4, (uint8_t *)(&dscr->addr), 8); dscr->attr =3D le64_to_cpu(dscr->attr); dscr->attr &=3D 0xfffffff8; @@ -673,7 +671,7 @@ static void sdhci_do_adma(SDHCIState *s) s->data_count =3D block_size; length -=3D block_size - begin; } - dma_memory_write(&address_space_memory, dscr.addr, + dma_memory_write(s->dma_as, dscr.addr, &s->fifo_buffer[begin], s->data_count - begin); dscr.addr +=3D s->data_count - begin; @@ -697,7 +695,7 @@ static void sdhci_do_adma(SDHCIState *s) s->data_count =3D block_size; length -=3D block_size - begin; } - dma_memory_read(&address_space_memory, dscr.addr, + dma_memory_read(s->dma_as, dscr.addr, &s->fifo_buffer[begin], s->data_count - begin); dscr.addr +=3D s->data_count - begin; @@ -1314,7 +1312,8 @@ static void sdhci_pci_realize(PCIDevice *dev, Error *= *errp) dev->config[PCI_CLASS_PROG] =3D 0x01; /* Standard Host supported DMA */ dev->config[PCI_INTERRUPT_PIN] =3D 0x01; /* interrupt pin A */ s->irq =3D pci_allocate_irq(dev); - pci_register_bar(dev, 0, 0, &s->iomem); + s->dma_as =3D pci_get_address_space(dev); + pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->iomem); } =20 static void sdhci_pci_exit(PCIDevice *dev) @@ -1382,6 +1381,9 @@ static void sdhci_sysbus_realize(DeviceState *dev, Er= ror ** errp) return; } =20 + s->dma_as =3D g_new0(AddressSpace, 1); + address_space_init(s->dma_as, get_system_memory(), "sdhci-dma"); + sysbus_init_irq(sbd, &s->irq); sysbus_init_mmio(sbd, &s->iomem); } @@ -1391,6 +1393,9 @@ static void sdhci_sysbus_unrealize(DeviceState *dev, = Error **errp) SDHCIState *s =3D SYSBUS_SDHCI(dev); =20 sdhci_common_unrealize(s, &error_abort); + + address_space_destroy(s->dma_as); + g_free(s->dma_as); } =20 static void sdhci_sysbus_class_init(ObjectClass *klass, void *data) --=20 2.15.1