From nobody Mon Feb 9 23:43:00 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1515735410702451.5451878140984; Thu, 11 Jan 2018 21:36:50 -0800 (PST) Received: from localhost ([::1]:44291 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eZs1G-0006bC-UJ for importer@patchew.org; Fri, 12 Jan 2018 00:36:46 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34397) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eZryh-0004jH-Ed for qemu-devel@nongnu.org; Fri, 12 Jan 2018 00:34:10 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eZrye-0007MV-K1 for qemu-devel@nongnu.org; Fri, 12 Jan 2018 00:34:07 -0500 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:33942) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eZryY-0007Eh-NI; Fri, 12 Jan 2018 00:33:58 -0500 Received: by mail-pf0-x242.google.com with SMTP id e76so3655260pfk.1; Thu, 11 Jan 2018 21:33:58 -0800 (PST) Received: from surajjs1.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id e79sm17253608pfl.61.2018.01.11.21.33.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 11 Jan 2018 21:33:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=KahBp+QBAS2nBwDHovoQdJq8gGkOTEjIs9xLhAbd9SY=; b=LWo/D5kP1M4bODNTcF/pUt9Wm1xdx5atLYgS96qW9WSHogL0NTuty44WxoR5Fg374k 1SegJPbMoclKKWVLejDJCFMNlM4nMOdgeooFU7Yc2XzqMMLRGurMw1inSmw4cYuUJNFS 6Yujef8C5/c+Oa/jww8wtJPSo7JCbjAhK8raA+qtrhYrgbaLZiO5C5Y69k4l5ed5NXXt dHa57yTq3iT+SEUAbtFIFgEsv2JIUmyTZQChlCS2FDvYtBC2B/23MsQPNMhNeRWQdjOe EzuQIRhz8m/bJCbbzbHr2xMrkVW64EOhq1+7UJ1S7aVxQU4pNGyztBqFJCq1MahvW8Id ToIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=KahBp+QBAS2nBwDHovoQdJq8gGkOTEjIs9xLhAbd9SY=; b=Gwho3iDS+DZJBa/IqA+vv6jHwP2AkNmwHZFBOWcmJ/DuxtDNArrFdN9DKxIaFhFovg wBMkOlEX5wFz+9NM/TqsO0FOybkgVOx9gODjVIzjxXH+Dz10hAMHUDvq39zc9933RPGJ wNnJ/9K60KMT+3nL35amC0Ku0MNZYzGF/iZ8A3Aehtzq0f+xB+ojSNMxMFIaes5/zlWS O5kUOaVktk0WJIILiGX9CAXe7PXto/Rd1IPWtPeuko75a3zcbSN4jZpf/FBEkkXwZOj9 tORyWKBuqRVUZODYGVLmQNXEnee6GLpRgNSukwHg2H7637QJalbJzLQd07Q1k9i5gwYg yawA== X-Gm-Message-State: AKwxytcu5bx2BxyHuiCl76TwfcyyW8h5XrPtH3hvNIur+yJ0xTq8EUyy Mj1nifmQG0FWrBWv5Sk28snOIsU9 X-Google-Smtp-Source: ACJfBovqdNaWbkn0C0FcOnqz0jifC3C3YOufTT2LK27YNL0hHpgIV1EqW8xpqJc3/lKDK3PgtNL4HA== X-Received: by 10.101.89.75 with SMTP id g11mr4405979pgu.28.1515735237346; Thu, 11 Jan 2018 21:33:57 -0800 (PST) From: Suraj Jitindar Singh To: qemu-ppc@nongnu.org Date: Fri, 12 Jan 2018 16:33:43 +1100 Message-Id: <20180112053345.13075-2-sjitindarsingh@gmail.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180112053345.13075-1-sjitindarsingh@gmail.com> References: <20180112053345.13075-1-sjitindarsingh@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [QEMU-PPC] [PATCH 1/3] hw/ppc/spapr_caps: Rework spapr_caps to use uint8 internal representation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: paulus@ozlabs.org, qemu-devel@nongnu.org, sjitindarsingh@gmail.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Currently spapr_caps are tied to boolean values (on or off). This patch reworks the caps so that they can have any uint8 value. This allows more capabilities with various values to be represented in the same way internally. Capabilities are numbered in ascending order. The internal representation of capability values is an array of uint8s in the sPAPRMachineState, indexed by capability number. Capabilities can have their own name, description, options, getter and setter functions, type and allow functions. They also each have their own section in the migration stream. Capabilities are only migrated if they were explictly set on the command line, with the assumption that otherwise the default will match. On migration we ensure that the capability value on the destination is greater than or equal to the capability value from the source. So long at this remains the case then the migration is considered compatible and allowed to continue. This patch implements generic getter and setter functions for boolean capabilities. It also converts the existings cap-htm, cap-vsx and cap-dfp capabilities to this new format. --- hw/ppc/spapr.c | 45 +++++-- hw/ppc/spapr_caps.c | 322 +++++++++++++++++++++++++--------------------= ---- include/hw/ppc/spapr.h | 45 +++---- 3 files changed, 225 insertions(+), 187 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index d1acfe8858..3e528fe91e 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -320,7 +320,7 @@ static void spapr_populate_pa_features(sPAPRMachineStat= e *spapr, */ pa_features[3] |=3D 0x20; } - if (spapr_has_cap(spapr, SPAPR_CAP_HTM) && pa_size > 24) { + if ((spapr_get_cap(spapr, SPAPR_CAP_HTM) !=3D 0) && pa_size > 24) { pa_features[24] |=3D 0x80; /* Transactional memory support */ } if (legacy_guest && pa_size > 40) { @@ -563,7 +563,7 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *f= dt, int offset, * * Only CPUs for which we create core types in spapr_cpu_core.c * are possible, and all of those have VMX */ - if (spapr_has_cap(spapr, SPAPR_CAP_VSX)) { + if (spapr_get_cap(spapr, SPAPR_CAP_VSX) !=3D 0) { _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", 2))); } else { _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", 1))); @@ -572,7 +572,7 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *f= dt, int offset, /* Advertise DFP (Decimal Floating Point) if available * 0 / no property =3D=3D no DFP * 1 =3D=3D DFP available */ - if (spapr_has_cap(spapr, SPAPR_CAP_DFP)) { + if (spapr_get_cap(spapr, SPAPR_CAP_DFP) !=3D 0) { _FDT((fdt_setprop_cell(fdt, offset, "ibm,dfp", 1))); } =20 @@ -1586,6 +1586,18 @@ static bool spapr_vga_init(PCIBus *pci_bus, Error **= errp) } } =20 +static int spapr_pre_load(void *opaque) +{ + int rc; + + rc =3D spapr_caps_pre_load(opaque); + if (rc) { + return rc; + } + + return 0; +} + static int spapr_post_load(void *opaque, int version_id) { sPAPRMachineState *spapr =3D (sPAPRMachineState *)opaque; @@ -1627,6 +1639,18 @@ static int spapr_post_load(void *opaque, int version= _id) return err; } =20 +static int spapr_pre_save(void *opaque) +{ + int rc; + + rc =3D spapr_caps_pre_save(opaque); + if (rc) { + return rc; + } + + return 0; +} + static bool version_before_3(void *opaque, int version_id) { return version_id < 3; @@ -1747,7 +1771,9 @@ static const VMStateDescription vmstate_spapr =3D { .name =3D "spapr", .version_id =3D 3, .minimum_version_id =3D 1, + .pre_load =3D spapr_pre_load, .post_load =3D spapr_post_load, + .pre_save =3D spapr_pre_save, .fields =3D (VMStateField[]) { /* used to be @next_irq */ VMSTATE_UNUSED_BUFFER(version_before_3, 0, 4), @@ -1762,7 +1788,9 @@ static const VMStateDescription vmstate_spapr =3D { &vmstate_spapr_ov5_cas, &vmstate_spapr_patb_entry, &vmstate_spapr_pending_events, - &vmstate_spapr_caps, + &vmstate_spapr_cap_htm, + &vmstate_spapr_cap_vsx, + &vmstate_spapr_cap_dfp, NULL } }; @@ -2323,8 +2351,6 @@ static void spapr_machine_init(MachineState *machine) char *filename; Error *resize_hpt_err =3D NULL; =20 - spapr_caps_validate(spapr, &error_fatal); - msi_nonbroken =3D true; =20 QLIST_INIT(&spapr->phbs); @@ -3834,7 +3860,9 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) */ mc->numa_mem_align_shift =3D 28; =20 - smc->default_caps =3D spapr_caps(SPAPR_CAP_VSX | SPAPR_CAP_DFP); + smc->default_caps.caps[SPAPR_CAP_HTM] =3D SPAPR_CAP_OFF; + smc->default_caps.caps[SPAPR_CAP_VSX] =3D SPAPR_CAP_ON; + smc->default_caps.caps[SPAPR_CAP_DFP] =3D SPAPR_CAP_ON; spapr_caps_add_properties(smc, &error_abort); } =20 @@ -3916,8 +3944,7 @@ static void spapr_machine_2_11_class_options(MachineC= lass *mc) sPAPRMachineClass *smc =3D SPAPR_MACHINE_CLASS(mc); =20 spapr_machine_2_12_class_options(mc); - smc->default_caps =3D spapr_caps(SPAPR_CAP_HTM | SPAPR_CAP_VSX - | SPAPR_CAP_DFP); + smc->default_caps.caps[SPAPR_CAP_HTM] =3D SPAPR_CAP_ON; SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_11); } =20 diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index 9d070a306c..f95a78547d 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -35,18 +35,51 @@ typedef struct sPAPRCapabilityInfo { const char *name; const char *description; - uint64_t flag; + const char *options; /* valid capability values= */ + int index; =20 + /* Getter and Setter Function Pointers */ + ObjectPropertyAccessor *get; + ObjectPropertyAccessor *set; + const char *type; /* Make sure the virtual hardware can support this capability */ - void (*allow)(sPAPRMachineState *spapr, Error **errp); - - /* If possible, tell the virtual hardware not to allow the cap to - * be used at all */ - void (*disallow)(sPAPRMachineState *spapr, Error **errp); + void (*apply)(sPAPRMachineState *spapr, uint8_t val, Error **errp); } sPAPRCapabilityInfo; =20 -static void cap_htm_allow(sPAPRMachineState *spapr, Error **errp) +static void spapr_cap_get_bool(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + sPAPRCapabilityInfo *cap =3D opaque; + sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); + bool value =3D spapr_get_cap(spapr, cap->index) =3D=3D SPAPR_CAP_ON; + + visit_type_bool(v, name, &value, errp); +} + +static void spapr_cap_set_bool(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) { + sPAPRCapabilityInfo *cap =3D opaque; + sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); + bool value; + Error *local_err =3D NULL; + + visit_type_bool(v, name, &value, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + spapr->cmd_line_caps[cap->index] =3D true; + spapr->eff.caps[cap->index] =3D value ? SPAPR_CAP_ON : SPAPR_CAP_OFF; +} + +static void cap_htm_apply(sPAPRMachineState *spapr, uint8_t val, Error **e= rrp) +{ + if (!val) { + /* TODO: We don't support disabling htm yet */ + return; + } if (tcg_enabled()) { error_setg(errp, "No Transactional Memory support in TCG, try cap-htm=3D= off"); @@ -57,11 +90,15 @@ static void cap_htm_allow(sPAPRMachineState *spapr, Err= or **errp) } } =20 -static void cap_vsx_allow(sPAPRMachineState *spapr, Error **errp) +static void cap_vsx_apply(sPAPRMachineState *spapr, uint8_t val, Error **e= rrp) { PowerPCCPU *cpu =3D POWERPC_CPU(first_cpu); CPUPPCState *env =3D &cpu->env; =20 + if (!val) { + /* TODO: We don't support disabling vsx yet */ + return; + } /* Allowable CPUs in spapr_cpu_core.c should already have gotten * rid of anything that doesn't do VMX */ g_assert(env->insns_flags & PPC_ALTIVEC); @@ -70,37 +107,51 @@ static void cap_vsx_allow(sPAPRMachineState *spapr, Er= ror **errp) } } =20 -static void cap_dfp_allow(sPAPRMachineState *spapr, Error **errp) +static void cap_dfp_apply(sPAPRMachineState *spapr, uint8_t val, Error **e= rrp) { PowerPCCPU *cpu =3D POWERPC_CPU(first_cpu); CPUPPCState *env =3D &cpu->env; =20 + if (!val) { + /* TODO: We don't support disabling dfp yet */ + return; + } if (!(env->insns_flags2 & PPC2_DFP)) { error_setg(errp, "DFP support not available, try cap-dfp=3Doff"); } } =20 -static sPAPRCapabilityInfo capability_table[] =3D { - { + +sPAPRCapabilityInfo capability_table[SPAPR_CAP_NUM] =3D { + [SPAPR_CAP_HTM] =3D { .name =3D "htm", .description =3D "Allow Hardware Transactional Memory (HTM)", - .flag =3D SPAPR_CAP_HTM, - .allow =3D cap_htm_allow, - /* TODO: add cap_htm_disallow */ + .options =3D "", + .index =3D SPAPR_CAP_HTM, + .get =3D spapr_cap_get_bool, + .set =3D spapr_cap_set_bool, + .type =3D "bool", + .apply =3D cap_htm_apply, }, - { + [SPAPR_CAP_VSX] =3D { .name =3D "vsx", .description =3D "Allow Vector Scalar Extensions (VSX)", - .flag =3D SPAPR_CAP_VSX, - .allow =3D cap_vsx_allow, - /* TODO: add cap_vsx_disallow */ + .options =3D "", + .index =3D SPAPR_CAP_VSX, + .get =3D spapr_cap_get_bool, + .set =3D spapr_cap_set_bool, + .type =3D "bool", + .apply =3D cap_vsx_apply, }, - { + [SPAPR_CAP_DFP] =3D { .name =3D "dfp", .description =3D "Allow Decimal Floating Point (DFP)", - .flag =3D SPAPR_CAP_DFP, - .allow =3D cap_dfp_allow, - /* TODO: add cap_dfp_disallow */ + .options =3D "", + .index =3D SPAPR_CAP_DFP, + .get =3D spapr_cap_get_bool, + .set =3D spapr_cap_set_bool, + .type =3D "bool", + .apply =3D cap_dfp_apply, }, }; =20 @@ -115,23 +166,33 @@ static sPAPRCapabilities default_caps_with_cpu(sPAPRM= achineState *spapr, =20 if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_2_07, 0, spapr->max_compat_pvr)) { - caps.mask &=3D ~SPAPR_CAP_HTM; + caps.caps[SPAPR_CAP_HTM] =3D SPAPR_CAP_OFF; } =20 if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_2_06, 0, spapr->max_compat_pvr)) { - caps.mask &=3D ~SPAPR_CAP_VSX; - caps.mask &=3D ~SPAPR_CAP_DFP; + caps.caps[SPAPR_CAP_VSX] =3D SPAPR_CAP_OFF; + caps.caps[SPAPR_CAP_DFP] =3D SPAPR_CAP_OFF; } =20 return caps; } =20 -static bool spapr_caps_needed(void *opaque) +int spapr_caps_pre_load(void *opaque) { sPAPRMachineState *spapr =3D opaque; =20 - return (spapr->forced_caps.mask !=3D 0) || (spapr->forbidden_caps.mask= !=3D 0); + /* Set to default so we can tell if this came in with the migration */ + spapr->mig =3D spapr->def; + return 0; +} + +int spapr_caps_pre_save(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + spapr->mig =3D spapr->eff; + return 0; } =20 /* This has to be called from the top-level spapr post_load, not the @@ -140,176 +201,121 @@ static bool spapr_caps_needed(void *opaque) * caps on the destination */ int spapr_caps_post_migration(sPAPRMachineState *spapr) { - uint64_t allcaps =3D 0; int i; bool ok =3D true; - sPAPRCapabilities dstcaps =3D spapr->effective_caps; + sPAPRCapabilities dstcaps =3D spapr->eff; sPAPRCapabilities srccaps; =20 srccaps =3D default_caps_with_cpu(spapr, first_cpu); - srccaps.mask |=3D spapr->mig_forced_caps.mask; - srccaps.mask &=3D ~spapr->mig_forbidden_caps.mask; + for (i =3D 0; i < SPAPR_CAP_NUM; i++) { + /* If not default value then assume came in with the migration */ + if (spapr->mig.caps[i] !=3D spapr->def.caps[i]) { + srccaps.caps[i] =3D spapr->mig.caps[i]; + } + } =20 - for (i =3D 0; i < ARRAY_SIZE(capability_table); i++) { + for (i =3D 0; i < SPAPR_CAP_NUM; i++) { sPAPRCapabilityInfo *info =3D &capability_table[i]; =20 - allcaps |=3D info->flag; - - if ((srccaps.mask & info->flag) && !(dstcaps.mask & info->flag)) { - error_report("cap-%s=3Don in incoming stream, but off in desti= nation", - info->name); + if (srccaps.caps[i] > dstcaps.caps[i]) { + error_report("cap-%s higher level (%d) in incoming stream than= on destination (%d)", + info->name, srccaps.caps[i], dstcaps.caps[i]); ok =3D false; } =20 - if (!(srccaps.mask & info->flag) && (dstcaps.mask & info->flag)) { - warn_report("cap-%s=3Doff in incoming stream, but on in destin= ation", - info->name); + if (srccaps.caps[i] < dstcaps.caps[i]) { + warn_report("cap-%s lower level (%d) in incoming stream than o= n destination (%d)", + info->name, srccaps.caps[i], dstcaps.caps[i]); } } =20 - if (spapr->mig_forced_caps.mask & ~allcaps) { - error_report( - "Unknown capabilities 0x%"PRIx64" enabled in incoming stream", - spapr->mig_forced_caps.mask & ~allcaps); - ok =3D false; - } - if (spapr->mig_forbidden_caps.mask & ~allcaps) { - warn_report( - "Unknown capabilities 0x%"PRIx64" disabled in incoming stream", - spapr->mig_forbidden_caps.mask & ~allcaps); - } - return ok ? 0 : -EINVAL; } =20 -static int spapr_caps_pre_save(void *opaque) +static bool spapr_cap_htm_needed(void *opaque) { sPAPRMachineState *spapr =3D opaque; =20 - spapr->mig_forced_caps =3D spapr->forced_caps; - spapr->mig_forbidden_caps =3D spapr->forbidden_caps; - return 0; + return spapr->cmd_line_caps[SPAPR_CAP_HTM] && + (spapr->eff.caps[SPAPR_CAP_HTM] !=3D spapr->def.caps[SPAPR_CAP_= HTM]); } =20 -static int spapr_caps_pre_load(void *opaque) +const VMStateDescription vmstate_spapr_cap_htm =3D { + .name =3D "spapr/cap/htm", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D spapr_cap_htm_needed, + .fields =3D (VMStateField[]) { + VMSTATE_UINT8(mig.caps[SPAPR_CAP_HTM], sPAPRMachineState), + VMSTATE_END_OF_LIST() + }, +}; + +static bool spapr_cap_vsx_needed(void *opaque) { sPAPRMachineState *spapr =3D opaque; =20 - spapr->mig_forced_caps =3D spapr_caps(0); - spapr->mig_forbidden_caps =3D spapr_caps(0); - return 0; + return spapr->cmd_line_caps[SPAPR_CAP_VSX] && + (spapr->eff.caps[SPAPR_CAP_VSX] !=3D spapr->def.caps[SPAPR_CAP_= VSX]); } =20 -const VMStateDescription vmstate_spapr_caps =3D { - .name =3D "spapr/caps", +const VMStateDescription vmstate_spapr_cap_vsx =3D { + .name =3D "spapr/cap/vsx", .version_id =3D 1, .minimum_version_id =3D 1, - .needed =3D spapr_caps_needed, - .pre_save =3D spapr_caps_pre_save, - .pre_load =3D spapr_caps_pre_load, + .needed =3D spapr_cap_vsx_needed, .fields =3D (VMStateField[]) { - VMSTATE_UINT64(mig_forced_caps.mask, sPAPRMachineState), - VMSTATE_UINT64(mig_forbidden_caps.mask, sPAPRMachineState), + VMSTATE_UINT8(mig.caps[SPAPR_CAP_VSX], sPAPRMachineState), VMSTATE_END_OF_LIST() }, }; =20 -void spapr_caps_reset(sPAPRMachineState *spapr) +static bool spapr_cap_dfp_needed(void *opaque) { - Error *local_err =3D NULL; - sPAPRCapabilities caps; - int i; - - /* First compute the actual set of caps we're running with.. */ - caps =3D default_caps_with_cpu(spapr, first_cpu); - - /* Remove unnecessary forced/forbidden bits (this will help us - * with migration) */ - spapr->forced_caps.mask &=3D ~caps.mask; - spapr->forbidden_caps.mask &=3D caps.mask; - - caps.mask |=3D spapr->forced_caps.mask; - caps.mask &=3D ~spapr->forbidden_caps.mask; - - spapr->effective_caps =3D caps; - - /* .. then apply those caps to the virtual hardware */ - - for (i =3D 0; i < ARRAY_SIZE(capability_table); i++) { - sPAPRCapabilityInfo *info =3D &capability_table[i]; - - if (spapr->effective_caps.mask & info->flag) { - /* Failure to allow a cap is fatal - if the guest doesn't - * have it, we'll be supplying an incorrect environment */ - if (info->allow) { - info->allow(spapr, &error_fatal); - } - } else { - /* Failure to enforce a cap is only a warning. The guest - * shouldn't be using it, since it's not advertised, so it - * doesn't get to complain about weird behaviour if it - * goes ahead anyway */ - if (info->disallow) { - info->disallow(spapr, &local_err); - } - if (local_err) { - warn_report_err(local_err); - local_err =3D NULL; - } - } - } -} - -static void spapr_cap_get(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) -{ - sPAPRCapabilityInfo *cap =3D opaque; - sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); - bool value =3D spapr_has_cap(spapr, cap->flag); - - /* TODO: Could this get called before effective_caps is finalized - * in spapr_caps_reset()? */ + sPAPRMachineState *spapr =3D opaque; =20 - visit_type_bool(v, name, &value, errp); + return spapr->cmd_line_caps[SPAPR_CAP_DFP] && + (spapr->eff.caps[SPAPR_CAP_DFP] !=3D spapr->def.caps[SPAPR_CAP_= DFP]); } =20 -static void spapr_cap_set(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) -{ - sPAPRCapabilityInfo *cap =3D opaque; - sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); - bool value; - Error *local_err =3D NULL; - - visit_type_bool(v, name, &value, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } - - if (value) { - spapr->forced_caps.mask |=3D cap->flag; - } else { - spapr->forbidden_caps.mask |=3D cap->flag; - } -} +const VMStateDescription vmstate_spapr_cap_dfp =3D { + .name =3D "spapr/cap/dfp", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D spapr_cap_dfp_needed, + .fields =3D (VMStateField[]) { + VMSTATE_UINT8(mig.caps[SPAPR_CAP_DFP], sPAPRMachineState), + VMSTATE_END_OF_LIST() + }, +}; =20 -void spapr_caps_validate(sPAPRMachineState *spapr, Error **errp) +void spapr_caps_reset(sPAPRMachineState *spapr) { - uint64_t allcaps =3D 0; + sPAPRCapabilities default_caps; int i; =20 - for (i =3D 0; i < ARRAY_SIZE(capability_table); i++) { - g_assert((allcaps & capability_table[i].flag) =3D=3D 0); - allcaps |=3D capability_table[i].flag; + /* First compute the actual set of caps we're running with.. */ + default_caps =3D default_caps_with_cpu(spapr, first_cpu); + + for (i =3D 0; i < SPAPR_CAP_NUM; i++) { + /* Store the defaults */ + spapr->def.caps[i] =3D default_caps.caps[i]; + /* If not set on the command line then apply the default value */ + if (!spapr->cmd_line_caps[i]) { + spapr->eff.caps[i] =3D default_caps.caps[i]; + } } =20 - g_assert((spapr->forced_caps.mask & ~allcaps) =3D=3D 0); - g_assert((spapr->forbidden_caps.mask & ~allcaps) =3D=3D 0); + /* .. then apply those caps to the virtual hardware */ + + for (i =3D 0; i < SPAPR_CAP_NUM; i++) { + sPAPRCapabilityInfo *info =3D &capability_table[i]; =20 - if (spapr->forced_caps.mask & spapr->forbidden_caps.mask) { - error_setg(errp, "Some sPAPR capabilities set both on and off"); - return; + /* + * If the apply function can't set the desired level and thinks it= 's + * fatal, it should cause that. + */ + info->apply(spapr, spapr->eff.caps[i], &error_fatal); } } =20 @@ -322,17 +328,19 @@ void spapr_caps_add_properties(sPAPRMachineClass *smc= , Error **errp) for (i =3D 0; i < ARRAY_SIZE(capability_table); i++) { sPAPRCapabilityInfo *cap =3D &capability_table[i]; const char *name =3D g_strdup_printf("cap-%s", cap->name); + char *desc; =20 - object_class_property_add(klass, name, "bool", - spapr_cap_get, spapr_cap_set, NULL, - cap, &local_err); + object_class_property_add(klass, name, cap->type, + cap->get, cap->set, + NULL, cap, &local_err); if (local_err) { error_propagate(errp, local_err); return; } =20 - object_class_property_set_description(klass, name, cap->descriptio= n, - &local_err); + desc =3D g_strdup_printf("%s%s", cap->description, cap->options); + object_class_property_set_description(klass, name, desc, &local_er= r); + g_free(desc); if (local_err) { error_propagate(errp, local_err); return; diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 26ac17e641..0f5628f22e 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -54,20 +54,25 @@ typedef enum { * Capabilities */ =20 -/* These bits go in the migration stream, so they can't be reassigned */ - /* Hardware Transactional Memory */ -#define SPAPR_CAP_HTM 0x0000000000000001ULL - +#define SPAPR_CAP_HTM 0x00 /* Vector Scalar Extensions */ -#define SPAPR_CAP_VSX 0x0000000000000002ULL - +#define SPAPR_CAP_VSX 0x01 /* Decimal Floating Point */ -#define SPAPR_CAP_DFP 0x0000000000000004ULL +#define SPAPR_CAP_DFP 0x02 +/* Num Caps */ +#define SPAPR_CAP_NUM (SPAPR_CAP_DFP + 1) + +/* + * Capability Values + */ +/* Bool Caps */ +#define SPAPR_CAP_OFF 0x00 +#define SPAPR_CAP_ON 0x01 =20 typedef struct sPAPRCapabilities sPAPRCapabilities; struct sPAPRCapabilities { - uint64_t mask; + uint8_t caps[SPAPR_CAP_NUM]; }; =20 /** @@ -149,9 +154,8 @@ struct sPAPRMachineState { =20 const char *icp_type; =20 - sPAPRCapabilities forced_caps, forbidden_caps; - sPAPRCapabilities mig_forced_caps, mig_forbidden_caps; - sPAPRCapabilities effective_caps; + bool cmd_line_caps[SPAPR_CAP_NUM]; + sPAPRCapabilities def, eff, mig; }; =20 #define H_SUCCESS 0 @@ -749,24 +753,23 @@ int spapr_irq_alloc_block(sPAPRMachineState *spapr, i= nt num, bool lsi, void spapr_irq_free(sPAPRMachineState *spapr, int irq, int num); qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq); =20 + +int spapr_caps_pre_load(void *opaque); +int spapr_caps_pre_save(void *opaque); + /* * Handling of optional capabilities */ -extern const VMStateDescription vmstate_spapr_caps; - -static inline sPAPRCapabilities spapr_caps(uint64_t mask) -{ - sPAPRCapabilities caps =3D { mask }; - return caps; -} +extern const VMStateDescription vmstate_spapr_cap_htm; +extern const VMStateDescription vmstate_spapr_cap_vsx; +extern const VMStateDescription vmstate_spapr_cap_dfp; =20 -static inline bool spapr_has_cap(sPAPRMachineState *spapr, uint64_t cap) +static inline uint8_t spapr_get_cap(sPAPRMachineState *spapr, int cap) { - return !!(spapr->effective_caps.mask & cap); + return spapr->eff.caps[cap]; } =20 void spapr_caps_reset(sPAPRMachineState *spapr); -void spapr_caps_validate(sPAPRMachineState *spapr, Error **errp); void spapr_caps_add_properties(sPAPRMachineClass *smc, Error **errp); int spapr_caps_post_migration(sPAPRMachineState *spapr); =20 --=20 2.13.6 From nobody Mon Feb 9 23:43:00 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1515735391510687.8218927105657; Thu, 11 Jan 2018 21:36:31 -0800 (PST) Received: from localhost ([::1]:44290 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eZs0y-0006JQ-59 for importer@patchew.org; Fri, 12 Jan 2018 00:36:28 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34414) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eZryj-0004oN-M0 for qemu-devel@nongnu.org; Fri, 12 Jan 2018 00:34:11 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eZryh-0007Oy-TL for qemu-devel@nongnu.org; Fri, 12 Jan 2018 00:34:09 -0500 Received: from mail-pg0-x243.google.com ([2607:f8b0:400e:c05::243]:41128) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eZryb-0007IU-8O; Fri, 12 Jan 2018 00:34:01 -0500 Received: by mail-pg0-x243.google.com with SMTP id 136so3367231pgd.8; Thu, 11 Jan 2018 21:34:01 -0800 (PST) Received: from surajjs1.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id e79sm17253608pfl.61.2018.01.11.21.33.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 11 Jan 2018 21:33:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=DqMj5QW+o6RM3QKR9IynuWQzPHzbGk0ziAA1gRu8/Po=; b=YEj6+DzxeVGiZcvZN78cDgPLDVLr14yRN8RoR7XuJ8IcNHoGoJ4G2dYyjQs2SCpxiw dh82WKUsPKOSYjZtMgM33UKQn6Ssq9g755cwn099ZNYGELo9pg7no0vppa4FBr3RoWny CR8DyPm+u1Gse8s2uFgxucHvoFEDOzi7oFpWMGfZqo4+6EaYi7XbqguWEZkxjptrddO/ 8hsDV80vwmFMgeTEjnvwHGJpBW+V1kbdsFqjP93WH30cO5/YWeAjea3tsPd7smILZnsb Z2IYXczMbfTSDDT3clJCG8nBBsUq/7Ta4u2FZxjVKbXsGyJLn6pIdGdAn+AKsO3eJXsI OxMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=DqMj5QW+o6RM3QKR9IynuWQzPHzbGk0ziAA1gRu8/Po=; b=ec7DKy+nN1otY+6tBt3GA133gtEWXn/J8jhQ4GzG7kMnrpQ01nJg+5ZcmKguyxNF0r r8jbJl10uwrZnyr+rP0oLqKkpIckHfV3HTtdSecfXJf3FMnJ1KORTK+S00iJMfly4AEl JHmodP6pZvxpTdcxfThr8166yYz1U8qXw2fcC3biYReeuaJhVdE8B9/YzbLJQByJarS5 oiWgqJ+WVbyke7ZEbsZqwpt2iPV0tWVUXV/ch+7Xn/Lj1aIyPHwEZmfZLDJVnlHDRtrK JEdQXCavruQek7AL3In6zO3DEjFGIz8iufNnfxcs3C+5JghACQz4vKer38W3NL2R6hEH yyGA== X-Gm-Message-State: AKGB3mLTY3JnXB+zvetLVVgRRTP7uYNuVIPfA4Yz+zOu7Je32IMrHRVW PUVksH6K4oRAXAecmV3GKpW2VwUa X-Google-Smtp-Source: ACJfBou3EjPQXKw29Q7/4zWceB5f0mCNB4sZ2ml6OdOsOpYt/2jHiJVtTu8vjFuwml5MWSdWYU7XDg== X-Received: by 10.101.81.5 with SMTP id f5mr18990730pgq.78.1515735240148; Thu, 11 Jan 2018 21:34:00 -0800 (PST) From: Suraj Jitindar Singh To: qemu-ppc@nongnu.org Date: Fri, 12 Jan 2018 16:33:44 +1100 Message-Id: <20180112053345.13075-3-sjitindarsingh@gmail.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180112053345.13075-1-sjitindarsingh@gmail.com> References: <20180112053345.13075-1-sjitindarsingh@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::243 Subject: [Qemu-devel] [QEMU-PPC] [PATCH 2/3] hw/spapr/spapr_caps: Add new caps safe_[cache/bounds_check/indirect_branch] X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: paulus@ozlabs.org, qemu-devel@nongnu.org, sjitindarsingh@gmail.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This patch adds three new capabilities: cap-cfpc -> safe_cache cap-sbbc -> safe_bounds_check cap-ibs -> safe_indirect_branch Each capability is tristate with the possible values "broken", "workaround" or "fixed". Add generic getter and setter functions for this new capability type. Add these new capabilities to the capabilities list. The maximum value for the capabilities is queried from kvm through new kvm capabilities. The requested values are considered to be compatible if kvm can support an equal or higher value for each capability. Note: For TCG we only allow broken for each of these until we decide on a mitigation technique. --- hw/ppc/spapr.c | 6 ++ hw/ppc/spapr_caps.c | 181 ++++++++++++++++++++++++++++++++++++++++++= ++++ include/hw/ppc/spapr.h | 15 +++- linux-headers/linux/kvm.h | 3 + target/ppc/kvm.c | 28 +++++++ target/ppc/kvm_ppc.h | 18 +++++ 6 files changed, 250 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 3e528fe91e..269c1c7857 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1791,6 +1791,9 @@ static const VMStateDescription vmstate_spapr =3D { &vmstate_spapr_cap_htm, &vmstate_spapr_cap_vsx, &vmstate_spapr_cap_dfp, + &vmstate_spapr_cap_cfpc, + &vmstate_spapr_cap_sbbc, + &vmstate_spapr_cap_ibs, NULL } }; @@ -3863,6 +3866,9 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) smc->default_caps.caps[SPAPR_CAP_HTM] =3D SPAPR_CAP_OFF; smc->default_caps.caps[SPAPR_CAP_VSX] =3D SPAPR_CAP_ON; smc->default_caps.caps[SPAPR_CAP_DFP] =3D SPAPR_CAP_ON; + smc->default_caps.caps[SPAPR_CAP_CFPC] =3D SPAPR_CAP_BROKEN; + smc->default_caps.caps[SPAPR_CAP_SBBC] =3D SPAPR_CAP_BROKEN; + smc->default_caps.caps[SPAPR_CAP_IBS] =3D SPAPR_CAP_BROKEN; spapr_caps_add_properties(smc, &error_abort); } =20 diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index f95a78547d..1c0c2c8253 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -74,6 +74,66 @@ static void spapr_cap_set_bool(Object *obj, Visitor *v, = const char *name, spapr->eff.caps[cap->index] =3D value ? SPAPR_CAP_ON : SPAPR_CAP_OFF; } =20 +static void spapr_cap_get_tristate(Object *obj, Visitor *v, const char *na= me, + void *opaque, Error **errp) +{ + sPAPRCapabilityInfo *cap =3D opaque; + sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); + char *val =3D NULL; + uint8_t value =3D spapr_get_cap(spapr, cap->index); + + switch (value) { + case SPAPR_CAP_BROKEN: + val =3D g_strdup("broken"); + break; + case SPAPR_CAP_WORKAROUND: + val =3D g_strdup("workaround"); + break; + case SPAPR_CAP_FIXED: + val =3D g_strdup("fixed"); + break; + default: + error_setg(errp, "Invalid value (%d) for cap-%s", value, cap->name= ); + return; + } + + visit_type_str(v, name, &val, errp); + g_free(val); +} + +static void spapr_cap_set_tristate(Object *obj, Visitor *v, const char *na= me, + void *opaque, Error **errp) +{ + sPAPRCapabilityInfo *cap =3D opaque; + sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); + char *val; + Error *local_err =3D NULL; + uint8_t value; + + visit_type_str(v, name, &val, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + if (!strcasecmp(val, "broken")) { + value =3D SPAPR_CAP_BROKEN; + } else if (!strcasecmp(val, "workaround")) { + value =3D SPAPR_CAP_WORKAROUND; + } else if (!strcasecmp(val, "fixed")) { + value =3D SPAPR_CAP_FIXED; + } else { + error_setg(errp, "Invalid capability mode \"%s\" for cap-%s", val, + cap->name); + goto out; + } + + spapr->cmd_line_caps[cap->index] =3D true; + spapr->eff.caps[cap->index] =3D value; +out: + g_free(val); +} + static void cap_htm_apply(sPAPRMachineState *spapr, uint8_t val, Error **e= rrp) { if (!val) { @@ -121,6 +181,40 @@ static void cap_dfp_apply(sPAPRMachineState *spapr, ui= nt8_t val, Error **errp) } } =20 +static void cap_safe_cache_apply(sPAPRMachineState *spapr, uint8_t val, + Error **errp) +{ + if (tcg_enabled() && val) { + /* TODO - for now only allow broken for TCG */ + error_setg(errp, "Requested safe cache capability level not suppor= ted by tcg, try a different value for cap-cfpc"); + } else if (kvm_enabled() && (val > kvmppc_get_cap_safe_cache())) { + error_setg(errp, "Requested safe cache capability level not suppor= ted by kvm, try a different value for cap-cfpc"); + } +} + +static void cap_safe_bounds_check_apply(sPAPRMachineState *spapr, uint8_t = val, + Error **errp) +{ + if (tcg_enabled() && val) { + /* TODO - for now only allow broken for TCG */ + error_setg(errp, "Requested safe bounds check capability level not= supported by tcg, try a different value for cap-cfpc"); + } else if (kvm_enabled() && (val > kvmppc_get_cap_safe_bounds_check())= ) { + error_setg(errp, "Requested safe bounds check capability level not= supported by kvm, try a different value for cap-sbbc"); + } +} + +static void cap_safe_indirect_branch_apply(sPAPRMachineState *spapr, + uint8_t val, Error **errp) +{ + if (tcg_enabled() && val) { + /* TODO - for now only allow broken for TCG */ + error_setg(errp, "Requested safe indirect branch capability level = not supported by tcg, try a different value for cap-cfpc"); + } else if (kvm_enabled() && (val > kvmppc_get_cap_safe_indirect_branch= ())) { + error_setg(errp, "Requested safe indirect branch capability level = not supported by kvm, try a different value for cap-ibs"); + } +} + +#define VALUE_DESC_TRISTATE " (broken, workaround, fixed)" =20 sPAPRCapabilityInfo capability_table[SPAPR_CAP_NUM] =3D { [SPAPR_CAP_HTM] =3D { @@ -153,6 +247,36 @@ sPAPRCapabilityInfo capability_table[SPAPR_CAP_NUM] = =3D { .type =3D "bool", .apply =3D cap_dfp_apply, }, + [SPAPR_CAP_CFPC] =3D { + .name =3D "cfpc", + .description =3D "Cache Flush on Privilege Change", + .options =3D VALUE_DESC_TRISTATE, + .index =3D SPAPR_CAP_CFPC, + .get =3D spapr_cap_get_tristate, + .set =3D spapr_cap_set_tristate, + .type =3D "string", + .apply =3D cap_safe_cache_apply, + }, + [SPAPR_CAP_SBBC] =3D { + .name =3D "sbbc", + .description =3D "Speculation Barrier Bounds Checking", + .options =3D VALUE_DESC_TRISTATE, + .index =3D SPAPR_CAP_SBBC, + .get =3D spapr_cap_get_tristate, + .set =3D spapr_cap_set_tristate, + .type =3D "string", + .apply =3D cap_safe_bounds_check_apply, + }, + [SPAPR_CAP_IBS] =3D { + .name =3D "ibs", + .description =3D "Indirect Branch Serialisation", + .options =3D VALUE_DESC_TRISTATE, + .index =3D SPAPR_CAP_IBS, + .get =3D spapr_cap_get_tristate, + .set =3D spapr_cap_set_tristate, + .type =3D "string", + .apply =3D cap_safe_indirect_branch_apply, + }, }; =20 static sPAPRCapabilities default_caps_with_cpu(sPAPRMachineState *spapr, @@ -289,6 +413,63 @@ const VMStateDescription vmstate_spapr_cap_dfp =3D { }, }; =20 +static bool spapr_cap_cfpc_needed(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + return spapr->cmd_line_caps[SPAPR_CAP_CFPC] && + (spapr->eff.caps[SPAPR_CAP_CFPC] !=3D spapr->def.caps[SPAPR_CAP= _CFPC]); +} + +const VMStateDescription vmstate_spapr_cap_cfpc =3D { + .name =3D "spapr/cap/cfpc", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D spapr_cap_cfpc_needed, + .fields =3D (VMStateField[]) { + VMSTATE_UINT8(mig.caps[SPAPR_CAP_CFPC], sPAPRMachineState), + VMSTATE_END_OF_LIST() + }, +}; + +static bool spapr_cap_sbbc_needed(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + return spapr->cmd_line_caps[SPAPR_CAP_SBBC] && + (spapr->eff.caps[SPAPR_CAP_SBBC] !=3D spapr->def.caps[SPAPR_CAP= _SBBC]); +} + +const VMStateDescription vmstate_spapr_cap_sbbc =3D { + .name =3D "spapr/cap/sbbc", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D spapr_cap_sbbc_needed, + .fields =3D (VMStateField[]) { + VMSTATE_UINT8(mig.caps[SPAPR_CAP_SBBC], sPAPRMachineState), + VMSTATE_END_OF_LIST() + }, +}; + +static bool spapr_cap_ibs_needed(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + return spapr->cmd_line_caps[SPAPR_CAP_IBS] && + (spapr->eff.caps[SPAPR_CAP_IBS] !=3D spapr->def.caps[SPAPR_CAP_= IBS]); +} + +const VMStateDescription vmstate_spapr_cap_ibs =3D { + .name =3D "spapr/cap/ibs", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D spapr_cap_ibs_needed, + .fields =3D (VMStateField[]) { + VMSTATE_UINT8(mig.caps[SPAPR_CAP_IBS], sPAPRMachineState), + VMSTATE_END_OF_LIST() + }, +}; + void spapr_caps_reset(sPAPRMachineState *spapr) { sPAPRCapabilities default_caps; diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 0f5628f22e..63ffd422b5 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -60,8 +60,14 @@ typedef enum { #define SPAPR_CAP_VSX 0x01 /* Decimal Floating Point */ #define SPAPR_CAP_DFP 0x02 +/* Cache Flush on Privilege Change */ +#define SPAPR_CAP_CFPC 0x03 +/* Speculation Barrier Bounds Checking */ +#define SPAPR_CAP_SBBC 0x04 +/* Indirect Branch Serialisation */ +#define SPAPR_CAP_IBS 0x05 /* Num Caps */ -#define SPAPR_CAP_NUM (SPAPR_CAP_DFP + 1) +#define SPAPR_CAP_NUM (SPAPR_CAP_IBS + 1) =20 /* * Capability Values @@ -69,6 +75,10 @@ typedef enum { /* Bool Caps */ #define SPAPR_CAP_OFF 0x00 #define SPAPR_CAP_ON 0x01 +/* Broken | Workaround | Fixed Caps */ +#define SPAPR_CAP_BROKEN 0x00 +#define SPAPR_CAP_WORKAROUND 0x01 +#define SPAPR_CAP_FIXED 0x02 =20 typedef struct sPAPRCapabilities sPAPRCapabilities; struct sPAPRCapabilities { @@ -763,6 +773,9 @@ int spapr_caps_pre_save(void *opaque); extern const VMStateDescription vmstate_spapr_cap_htm; extern const VMStateDescription vmstate_spapr_cap_vsx; extern const VMStateDescription vmstate_spapr_cap_dfp; +extern const VMStateDescription vmstate_spapr_cap_cfpc; +extern const VMStateDescription vmstate_spapr_cap_sbbc; +extern const VMStateDescription vmstate_spapr_cap_ibs; =20 static inline uint8_t spapr_get_cap(sPAPRMachineState *spapr, int cap) { diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h index ce6c2f11f4..0abe0a0abb 100644 --- a/linux-headers/linux/kvm.h +++ b/linux-headers/linux/kvm.h @@ -932,6 +932,9 @@ struct kvm_ppc_resize_hpt { #define KVM_CAP_HYPERV_SYNIC2 148 #define KVM_CAP_HYPERV_VP_INDEX 149 #define KVM_CAP_S390_AIS_MIGRATION 150 +#define KVM_CAP_PPC_SAFE_CACHE 151 +#define KVM_CAP_PPC_SAFE_BOUNDS_CHECK 152 +#define KVM_CAP_PPC_SAFE_INDIRECT_BRANCH 153 =20 #ifdef KVM_CAP_IRQ_ROUTING =20 diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 914be687e7..94b7ee67e2 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -89,6 +89,9 @@ static int cap_mmu_radix; static int cap_mmu_hash_v3; static int cap_resize_hpt; static int cap_ppc_pvr_compat; +static int cap_ppc_safe_cache; +static int cap_ppc_safe_bounds_check; +static int cap_ppc_safe_indirect_branch; =20 static uint32_t debug_inst_opcode; =20 @@ -147,6 +150,16 @@ int kvm_arch_init(MachineState *ms, KVMState *s) cap_mmu_radix =3D kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_RADIX); cap_mmu_hash_v3 =3D kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_HASH_V3); cap_resize_hpt =3D kvm_vm_check_extension(s, KVM_CAP_SPAPR_RESIZE_HPT); + cap_ppc_safe_cache =3D kvm_vm_check_extension(s, KVM_CAP_PPC_SAFE_CACH= E); + cap_ppc_safe_cache =3D cap_ppc_safe_cache > 0 ? cap_ppc_safe_cache : 0; + cap_ppc_safe_bounds_check =3D kvm_vm_check_extension(s, + KVM_CAP_PPC_SAFE_BOUNDS_CHECK); + cap_ppc_safe_bounds_check =3D cap_ppc_safe_bounds_check > 0 ? + cap_ppc_safe_bounds_check : 0; + cap_ppc_safe_indirect_branch =3D kvm_vm_check_extension(s, + KVM_CAP_PPC_SAFE_INDIRECT_BRANCH); + cap_ppc_safe_indirect_branch =3D cap_ppc_safe_indirect_branch > 0 ? + cap_ppc_safe_indirect_branch : 0; /* * Note: setting it to false because there is not such capability * in KVM at this moment. @@ -2456,6 +2469,21 @@ bool kvmppc_has_cap_mmu_hash_v3(void) return cap_mmu_hash_v3; } =20 +int kvmppc_get_cap_safe_cache(void) +{ + return cap_ppc_safe_cache; +} + +int kvmppc_get_cap_safe_bounds_check(void) +{ + return cap_ppc_safe_bounds_check; +} + +int kvmppc_get_cap_safe_indirect_branch(void) +{ + return cap_ppc_safe_indirect_branch; +} + PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void) { uint32_t host_pvr =3D mfpvr(); diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h index ecb55493cc..39830baa77 100644 --- a/target/ppc/kvm_ppc.h +++ b/target/ppc/kvm_ppc.h @@ -59,6 +59,9 @@ bool kvmppc_has_cap_fixup_hcalls(void); bool kvmppc_has_cap_htm(void); bool kvmppc_has_cap_mmu_radix(void); bool kvmppc_has_cap_mmu_hash_v3(void); +int kvmppc_get_cap_safe_cache(void); +int kvmppc_get_cap_safe_bounds_check(void); +int kvmppc_get_cap_safe_indirect_branch(void); int kvmppc_enable_hwrng(void); int kvmppc_put_books_sregs(PowerPCCPU *cpu); PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void); @@ -290,6 +293,21 @@ static inline bool kvmppc_has_cap_mmu_hash_v3(void) return false; } =20 +static inline int kvmppc_get_cap_safe_cache(void) +{ + return 0; +} + +static inline int kvmppc_get_cap_safe_bounds_check(void) +{ + return 0; +} + +static inline int kvmppc_get_cap_safe_indirect_branch(void) +{ + return 0; +} + static inline int kvmppc_enable_hwrng(void) { return -1; --=20 2.13.6 From nobody Mon Feb 9 23:43:00 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1515735411518531.268334226996; Thu, 11 Jan 2018 21:36:51 -0800 (PST) Received: from localhost ([::1]:44292 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eZs1K-0006ep-Jp for importer@patchew.org; Fri, 12 Jan 2018 00:36:50 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34416) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eZryj-0004oa-P5 for qemu-devel@nongnu.org; Fri, 12 Jan 2018 00:34:10 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eZryi-0007QD-Q9 for qemu-devel@nongnu.org; Fri, 12 Jan 2018 00:34:09 -0500 Received: from mail-pf0-x241.google.com ([2607:f8b0:400e:c00::241]:35256) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eZrye-0007LZ-2m; Fri, 12 Jan 2018 00:34:04 -0500 Received: by mail-pf0-x241.google.com with SMTP id t12so3656966pfg.2; Thu, 11 Jan 2018 21:34:03 -0800 (PST) Received: from surajjs1.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id e79sm17253608pfl.61.2018.01.11.21.34.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 11 Jan 2018 21:34:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=hNKfBnkU43UC0VWhfEVj4s1tqpc+9kcKm401dG2AXd8=; b=Uj6RAR1rZHuzHYJ5tvAerg63p3+qgXiLmX211bP7veYOXeHnDl1mEbIl9grs9HqkFT dAb0R/01ux8HXTBFh0Mqut+5DJ2xM517/6yzBwhvsYixqnGYwABxcxsF9geKIbmrpTDn t8k/1s9xYgeoAJo2racC0p5dyMEZq3Cpv3AZhWKLbBfUv89zU2V5xbWLOMyIF4sPNe6S e7PIh9mR11Va6rr6yoapAfR4zQgPhlIaHM4Adc6xjrdlf0Et4u/Qxk+oq/u+RXacEV/n GbNwmxtM4d1u5r2MbLD8VYLUGInLPe6TJ9Sfra6rd8z7xK62v3ZczJOqvRq5ZQHbj9R8 ZUKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=hNKfBnkU43UC0VWhfEVj4s1tqpc+9kcKm401dG2AXd8=; b=TrtPhBfBpw1kWe7Js/LI7VjlGwfCuWrF0O/9NE7JVsoiIof/hxpYX82PbR228P1ZBD Rmq8x6lL5fXUMmQLl15RWgjwPDmpNFPcvz8ZYyIZXd+ia7q/M/irkHp5zOY9MVpbvWXC NJvH1qkVSRFqPbyRHkWqUcYY+nXz3wIrktHbs+QgFzKzk9ji/lSqGb5fmbtEZ8CorSi9 Cf7h5tzeS6h+XtA52WgYnGeVsxAwrVtGI3v7gUe/M/g7eGmJdzoty8GJlLoFlDlZKPK5 PO/LFPLoS0gFYvIF3cjZVgcIumMPvQ91gRldbdno3q0JmU7rMJz9j8+Z8VuiQhBTa76Z kVVQ== X-Gm-Message-State: AKwxytc1+MSxQw4BtqSzVpR6NyLb1lZuvz1wbp2HJgIzYgMlAZqBYOW5 eHJqMY3Sl2YF75Ok37LhyiohgHWy X-Google-Smtp-Source: ACJfBovtgSqh7MTgOw9sY0MznhF5yUi2gIEVx8w6IBSg4/vTsMVvb3T+qI51v8TK+kWEnoA4FAO/PQ== X-Received: by 10.159.206.196 with SMTP id x4mr3971486plo.271.1515735242992; Thu, 11 Jan 2018 21:34:02 -0800 (PST) From: Suraj Jitindar Singh To: qemu-ppc@nongnu.org Date: Fri, 12 Jan 2018 16:33:45 +1100 Message-Id: <20180112053345.13075-4-sjitindarsingh@gmail.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180112053345.13075-1-sjitindarsingh@gmail.com> References: <20180112053345.13075-1-sjitindarsingh@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::241 Subject: [Qemu-devel] [QEMU-PPC] [PATCH 3/3] target/ppc: Add H-Call H_GET_CPU_CHARACTERISTICS X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: paulus@ozlabs.org, qemu-devel@nongnu.org, sjitindarsingh@gmail.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The new H-Call H_GET_CPU_CHARACTERISTICS is used by the guest to query behaviours and available characteristics of the cpu. Implement the handler for this new H-Call which formulates its response based on the setting of the new capabilities added in the previous patch. --- hw/ppc/spapr_hcall.c | 78 ++++++++++++++++++++++++++++++++++++++++++++++= ++++ include/hw/ppc/spapr.h | 1 + 2 files changed, 79 insertions(+) diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index 51eba52e86..b167554771 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -1654,6 +1654,81 @@ static target_ulong h_client_architecture_support(Po= werPCCPU *cpu, return H_SUCCESS; } =20 +/* H_GET_CPU_CHARACTERISTICS return values */ +#define H_CPU_CHAR_SPEC_BAR_ORI31 PPC_BIT(0) +#define H_CPU_CHAR_BCCTRL_SERIALISED PPC_BIT(1) +#define H_CPU_CHAR_L1D_FLUSH_ORI30 PPC_BIT(2) +#define H_CPU_CHAR_L1D_FLUSH_TRIG2 PPC_BIT(3) +#define H_CPU_CHAR_L1D_THREAD_PRIV PPC_BIT(4) +#define H_CPU_CHAR_HON_BRANCH_HINTS PPC_BIT(5) +#define H_CPU_CHAR_THR_RECONF_TRIG PPC_BIT(6) +#define H_CPU_BEHAV_FAVOUR_SECURITY PPC_BIT(0) +#define H_CPU_BEHAV_L1D_FLUSH_PR PPC_BIT(1) +#define H_CPU_BEHAV_BNDS_CHK_SPEC_BAR PPC_BIT(2) + +static target_ulong h_get_cpu_characteristics(PowerPCCPU *cpu, + sPAPRMachineState *spapr, + target_ulong opcode, + target_ulong *args) +{ + uint64_t characteristics =3D H_CPU_CHAR_HON_BRANCH_HINTS & + ~H_CPU_CHAR_THR_RECONF_TRIG; + uint64_t behaviour =3D H_CPU_BEHAV_FAVOUR_SECURITY; + uint8_t safe_cache =3D spapr_get_cap(spapr, SPAPR_CAP_CFPC); + uint8_t safe_bounds_check =3D spapr_get_cap(spapr, SPAPR_CAP_SBBC); + uint8_t safe_indirect_branch =3D spapr_get_cap(spapr, SPAPR_CAP_IBS); + + switch (safe_cache) { + case SPAPR_CAP_WORKAROUND: + characteristics |=3D H_CPU_CHAR_L1D_FLUSH_ORI30; + characteristics |=3D H_CPU_CHAR_L1D_FLUSH_TRIG2; + characteristics |=3D H_CPU_CHAR_L1D_THREAD_PRIV; + behaviour |=3D H_CPU_BEHAV_L1D_FLUSH_PR; + break; + case SPAPR_CAP_FIXED: + break; + default: /* broken */ + if (safe_cache !=3D SPAPR_CAP_BROKEN) { + error_report("Invalid value for cap-cfpc (%d), assuming broken= ", + safe_cache); + } + behaviour |=3D H_CPU_BEHAV_L1D_FLUSH_PR; + break; + } + + switch (safe_bounds_check) { + case SPAPR_CAP_WORKAROUND: + characteristics |=3D H_CPU_CHAR_SPEC_BAR_ORI31; + behaviour |=3D H_CPU_BEHAV_BNDS_CHK_SPEC_BAR; + break; + case SPAPR_CAP_FIXED: + break; + default: /* broken */ + if (safe_bounds_check !=3D SPAPR_CAP_BROKEN) { + error_report("Invalid value for cap-sbbc (%d), assuming broken= ", + safe_bounds_check); + } + behaviour |=3D H_CPU_BEHAV_BNDS_CHK_SPEC_BAR; + break; + } + + switch (safe_indirect_branch) { + case SPAPR_CAP_FIXED: + characteristics |=3D H_CPU_CHAR_BCCTRL_SERIALISED; + default: /* broken */ + if (safe_indirect_branch !=3D SPAPR_CAP_BROKEN) { + error_report("Invalid value for cap-ibs (%d), assuming broken", + safe_indirect_branch); + } + break; + } + + args[0] =3D characteristics; + args[1] =3D behaviour; + + return H_SUCCESS; +} + static spapr_hcall_fn papr_hypercall_table[(MAX_HCALL_OPCODE / 4) + 1]; static spapr_hcall_fn kvmppc_hypercall_table[KVMPPC_HCALL_MAX - KVMPPC_HCA= LL_BASE + 1]; =20 @@ -1733,6 +1808,9 @@ static void hypercall_register_types(void) spapr_register_hypercall(H_INVALIDATE_PID, h_invalidate_pid); spapr_register_hypercall(H_REGISTER_PROC_TBL, h_register_process_table= ); =20 + /* hcall-get-cpu-characteristics */ + spapr_register_hypercall(H_GET_CPU_CHARACTERISTICS, h_get_cpu_characte= ristics); + /* "debugger" hcalls (also used by SLOF). Note: We do -not- differenci= ate * here between the "CI" and the "CACHE" variants, they will use whate= ver * mapping attributes qemu is using. When using KVM, the kernel will diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 63ffd422b5..98e76d8b9a 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -392,6 +392,7 @@ struct sPAPRMachineState { #define H_GET_HCA_INFO 0x1B8 #define H_GET_PERF_COUNT 0x1BC #define H_MANAGE_TRACE 0x1C0 +#define H_GET_CPU_CHARACTERISTICS 0x1C8 #define H_FREE_LOGICAL_LAN_BUFFER 0x1D4 #define H_QUERY_INT_STATE 0x1E4 #define H_POLL_PENDING 0x1D8 --=20 2.13.6