From nobody Tue Feb 10 20:14:40 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15156993704771012.3995167557961; Thu, 11 Jan 2018 11:36:10 -0800 (PST) Received: from localhost ([::1]:36625 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eZie1-0006wB-Kc for importer@patchew.org; Thu, 11 Jan 2018 14:36:09 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44641) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eZiYl-0002ha-CX for qemu-devel@nongnu.org; Thu, 11 Jan 2018 14:30:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eZiYh-0005HM-Gv for qemu-devel@nongnu.org; Thu, 11 Jan 2018 14:30:43 -0500 Received: from mail-qt0-x244.google.com ([2607:f8b0:400d:c0d::244]:35566) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eZiYh-0005Gp-D6 for qemu-devel@nongnu.org; Thu, 11 Jan 2018 14:30:39 -0500 Received: by mail-qt0-x244.google.com with SMTP id u10so3220314qtg.2 for ; Thu, 11 Jan 2018 11:30:39 -0800 (PST) Received: from x1.local ([138.117.48.219]) by smtp.gmail.com with ESMTPSA id i37sm4870538qtc.80.2018.01.11.11.30.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 11 Jan 2018 11:30:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PkxnL2/val5yDw/QzoIRup2WntU9qCP1aSH/966S3sA=; b=KrayHPsRZz3ttNZ47h5Psiqa7d9UMGP4vm0TN6MQtSXG7rfxY8QHZEZiDoIBXJn9kb jeBvECQA5C4Vhr3vsNPjGXaN2rH9xNm72TH6eyvNEv4nzTpQBjH19jrVuqN5HKXOHV97 T+QfmVJ5ZTx9eAG9pXPKf884z5fRjCEJ02a/reo1hqZ8j+hu7Yy7MT1C8tNSpTbGJvRt 9j5xPZbcv4qSESSJZykKWIbJXxRBJIvarrWXHVG/ngMq4m6DfBJsmi5rxo5EeZ5MVTtj /4EUs9nQpvPS+LOnq/yfqXpfsaICgqvQAPpLBel7+tlX9LFGufz7YA685TdLUgDO5pmk 5G0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=PkxnL2/val5yDw/QzoIRup2WntU9qCP1aSH/966S3sA=; b=fnLPi4ETbfyfnPENghpIdoDCSxibjZ2qBNJunlk0Vl+OvLgEFKxX25eeN5HUAotOIN ApFAPvuF8f4+GIlYDBKBiL4KPkkxNPZYaTNoKjYqEJZBZIhiaJFNeqf5bglIh64vn9C3 bIfHKxbD62SHNmA/U3AvkRY26y+3/cJnD+9XuvjQlL9Ffc6xF+nDYClCbTqBSWABgQNf PbHii1Hgz5XgGQ3ZMkD2tXK8GdmMxoE534pDH51LPRJsrN/a2XoUdQjWifD0MdopzrBf U4WS/GxU5MS3FFBikXIYmKKjksRafK62AAqVGAw9pXHyaZbnOMMmmcWKzTGlzMl1xuGB ocJA== X-Gm-Message-State: AKwxytf+dQ+9mNLghOUZFPL/eQoo4rK8ZU2RSq0QCqVJk5eOltVmqIDy JPrbrjAN4FswPmxcWokRg1k= X-Google-Smtp-Source: ACJfBosBYjb0LMH2BD6xvplGzqiL75+dcQBUG4DN4SjXz9BsSJ6ct45mPq9BOVFTwP2F8lwxvn682g== X-Received: by 10.237.48.161 with SMTP id 30mr33302090qtf.30.1515699038862; Thu, 11 Jan 2018 11:30:38 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: Alistair Francis , Peter Maydell Date: Thu, 11 Jan 2018 16:30:11 -0300 Message-Id: <20180111193021.17466-4-f4bug@amsat.org> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180111193021.17466-1-f4bug@amsat.org> References: <20180111193021.17466-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::244 Subject: [Qemu-devel] [PATCH v6 03/13] sdhci: refactor same sysbus/pci properties into a common one X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E . Iglesias" , Andrey Smirnov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Now both sysbus/pci classes inherit of the 'pending-insert-quirk' property, which is a HCI dependent property (regardless if accessed through a MMIO sysbus or a PCI bus). So far only the BCM implementation has to use it. Add sysbus/pci/sdbus comments to have clearer code blocks separation. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis --- include/hw/sd/sdhci.h | 4 +++- hw/sd/sdhci.c | 21 ++++++++++----------- 2 files changed, 13 insertions(+), 12 deletions(-) diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index dacd726537..8041c9629e 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -79,13 +79,15 @@ typedef struct SDHCIState { uint32_t buf_maxsz; uint16_t data_count; /* current element in FIFO buffer */ uint8_t stopped_state;/* Current SDHC state */ - bool pending_insert_quirk;/* Quirk for Raspberry Pi card insert in= t */ bool pending_insert_state; /* Buffer Data Port Register - virtual access point to R and W buffers= */ /* Software Reset Register - always reads as 0 */ /* Force Event Auto CMD12 Error Interrupt Reg - write only */ /* Force Event Error Interrupt Register- write only */ /* RO Host Controller Version Register always reads as 0x2401 */ + + /* Configurable properties */ + bool pending_insert_quirk; /* Quirk for Raspberry Pi card insert int */ } SDHCIState; =20 #define TYPE_PCI_SDHCI "sdhci-pci" diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 365bc80009..a11469fbca 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1266,13 +1266,17 @@ const VMStateDescription sdhci_vmstate =3D { =20 /* Capabilities registers provide information on supported features of this * specific host controller implementation */ -static Property sdhci_pci_properties[] =3D { +static Property sdhci_properties[] =3D { DEFINE_PROP_UINT32("capareg", SDHCIState, capareg, SDHC_CAPAB_REG_DEFAULT), DEFINE_PROP_UINT32("maxcurr", SDHCIState, maxcurr, 0), + DEFINE_PROP_BOOL("pending-insert-quirk", SDHCIState, pending_insert_qu= irk, + false), DEFINE_PROP_END_OF_LIST(), }; =20 +/* --- qdev PCI --- */ + static void sdhci_pci_realize(PCIDevice *dev, Error **errp) { SDHCIState *s =3D PCI_SDHCI(dev); @@ -1305,7 +1309,7 @@ static void sdhci_pci_class_init(ObjectClass *klass, = void *data) k->class_id =3D PCI_CLASS_SYSTEM_SDHCI; set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); dc->vmsd =3D &sdhci_vmstate; - dc->props =3D sdhci_pci_properties; + dc->props =3D sdhci_properties; dc->reset =3D sdhci_poweron_reset; } =20 @@ -1320,14 +1324,7 @@ static const TypeInfo sdhci_pci_info =3D { }, }; =20 -static Property sdhci_sysbus_properties[] =3D { - DEFINE_PROP_UINT32("capareg", SDHCIState, capareg, - SDHC_CAPAB_REG_DEFAULT), - DEFINE_PROP_UINT32("maxcurr", SDHCIState, maxcurr, 0), - DEFINE_PROP_BOOL("pending-insert-quirk", SDHCIState, pending_insert_qu= irk, - false), - DEFINE_PROP_END_OF_LIST(), -}; +/* --- qdev SysBus --- */ =20 static void sdhci_sysbus_init(Object *obj) { @@ -1360,7 +1357,7 @@ static void sdhci_sysbus_class_init(ObjectClass *klas= s, void *data) DeviceClass *dc =3D DEVICE_CLASS(klass); =20 dc->vmsd =3D &sdhci_vmstate; - dc->props =3D sdhci_sysbus_properties; + dc->props =3D sdhci_properties; dc->realize =3D sdhci_sysbus_realize; dc->reset =3D sdhci_poweron_reset; } @@ -1374,6 +1371,8 @@ static const TypeInfo sdhci_sysbus_info =3D { .class_init =3D sdhci_sysbus_class_init, }; =20 +/* --- qdev bus master --- */ + static void sdhci_bus_class_init(ObjectClass *klass, void *data) { SDBusClass *sbc =3D SD_BUS_CLASS(klass); --=20 2.15.1